147f7bcaeSTom Rini /* 247f7bcaeSTom Rini * (C) Copyright 2010 347f7bcaeSTom Rini * Texas Instruments, <www.ti.com> 447f7bcaeSTom Rini * 547f7bcaeSTom Rini * Aneesh V <aneesh@ti.com> 647f7bcaeSTom Rini * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 847f7bcaeSTom Rini */ 947f7bcaeSTom Rini #include <common.h> 1011516518SSimon Glass #include <dm.h> 1147f7bcaeSTom Rini #include <spl.h> 1247f7bcaeSTom Rini #include <asm/u-boot.h> 1347f7bcaeSTom Rini #include <nand.h> 1447f7bcaeSTom Rini #include <fat.h> 1547f7bcaeSTom Rini #include <version.h> 1647f7bcaeSTom Rini #include <i2c.h> 1747f7bcaeSTom Rini #include <image.h> 1847f7bcaeSTom Rini #include <malloc.h> 1911516518SSimon Glass #include <dm/root.h> 2047f7bcaeSTom Rini #include <linux/compiler.h> 2147f7bcaeSTom Rini 2247f7bcaeSTom Rini DECLARE_GLOBAL_DATA_PTR; 2347f7bcaeSTom Rini 243c6f8a0dSStefan Roese #ifndef CONFIG_SYS_UBOOT_START 253c6f8a0dSStefan Roese #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE 263c6f8a0dSStefan Roese #endif 27ae83d882SStefano Babic #ifndef CONFIG_SYS_MONITOR_LEN 28e76caa62SAndreas Bießmann /* Unknown U-Boot size, let's assume it will not be more than 200 KB */ 29ae83d882SStefano Babic #define CONFIG_SYS_MONITOR_LEN (200 * 1024) 30ae83d882SStefano Babic #endif 31ae83d882SStefano Babic 3247f7bcaeSTom Rini u32 *boot_params_ptr = NULL; 3347f7bcaeSTom Rini struct spl_image_info spl_image; 3447f7bcaeSTom Rini 356507f133STom Rini /* Define board data structure */ 3647f7bcaeSTom Rini static bd_t bdata __attribute__ ((section(".data"))); 3747f7bcaeSTom Rini 3847f7bcaeSTom Rini /* 3947f7bcaeSTom Rini * Default function to determine if u-boot or the OS should 4047f7bcaeSTom Rini * be started. This implementation always returns 1. 4147f7bcaeSTom Rini * 4247f7bcaeSTom Rini * Please implement your own board specific funcion to do this. 4347f7bcaeSTom Rini * 4447f7bcaeSTom Rini * RETURN 4547f7bcaeSTom Rini * 0 to not start u-boot 4647f7bcaeSTom Rini * positive if u-boot should start 4747f7bcaeSTom Rini */ 4847f7bcaeSTom Rini #ifdef CONFIG_SPL_OS_BOOT 4947f7bcaeSTom Rini __weak int spl_start_uboot(void) 5047f7bcaeSTom Rini { 5147f7bcaeSTom Rini puts("SPL: Please implement spl_start_uboot() for your board\n"); 5247f7bcaeSTom Rini puts("SPL: Direct Linux boot not active!\n"); 5347f7bcaeSTom Rini return 1; 5447f7bcaeSTom Rini } 5547f7bcaeSTom Rini #endif 5647f7bcaeSTom Rini 57ea8256f0SStefan Roese /* 58ea8256f0SStefan Roese * Weak default function for board specific cleanup/preparation before 59ea8256f0SStefan Roese * Linux boot. Some boards/platforms might not need it, so just provide 60ea8256f0SStefan Roese * an empty stub here. 61ea8256f0SStefan Roese */ 62ea8256f0SStefan Roese __weak void spl_board_prepare_for_linux(void) 63ea8256f0SStefan Roese { 64ea8256f0SStefan Roese /* Nothing to do! */ 65ea8256f0SStefan Roese } 66ea8256f0SStefan Roese 670c3117b1SHeiko Schocher void spl_set_header_raw_uboot(void) 680c3117b1SHeiko Schocher { 690c3117b1SHeiko Schocher spl_image.size = CONFIG_SYS_MONITOR_LEN; 700c3117b1SHeiko Schocher spl_image.entry_point = CONFIG_SYS_UBOOT_START; 710c3117b1SHeiko Schocher spl_image.load_addr = CONFIG_SYS_TEXT_BASE; 720c3117b1SHeiko Schocher spl_image.os = IH_OS_U_BOOT; 730c3117b1SHeiko Schocher spl_image.name = "U-Boot"; 740c3117b1SHeiko Schocher } 750c3117b1SHeiko Schocher 7647f7bcaeSTom Rini void spl_parse_image_header(const struct image_header *header) 7747f7bcaeSTom Rini { 7847f7bcaeSTom Rini u32 header_size = sizeof(struct image_header); 7947f7bcaeSTom Rini 8077552b06SStefan Roese if (image_get_magic(header) == IH_MAGIC) { 81022b4975SStefan Roese if (spl_image.flags & SPL_COPY_PAYLOAD_ONLY) { 82022b4975SStefan Roese /* 83022b4975SStefan Roese * On some system (e.g. powerpc), the load-address and 84022b4975SStefan Roese * entry-point is located at address 0. We can't load 85022b4975SStefan Roese * to 0-0x40. So skip header in this case. 86022b4975SStefan Roese */ 87022b4975SStefan Roese spl_image.load_addr = image_get_load(header); 88022b4975SStefan Roese spl_image.entry_point = image_get_ep(header); 89022b4975SStefan Roese spl_image.size = image_get_data_size(header); 90022b4975SStefan Roese } else { 9177552b06SStefan Roese spl_image.entry_point = image_get_load(header); 9247f7bcaeSTom Rini /* Load including the header */ 93022b4975SStefan Roese spl_image.load_addr = spl_image.entry_point - 94022b4975SStefan Roese header_size; 95022b4975SStefan Roese spl_image.size = image_get_data_size(header) + 96022b4975SStefan Roese header_size; 97022b4975SStefan Roese } 9877552b06SStefan Roese spl_image.os = image_get_os(header); 9977552b06SStefan Roese spl_image.name = image_get_name(header); 10062cf11c0STaras Kondratiuk debug("spl: payload image: %.*s load addr: 0x%x size: %d\n", 1015d69a5d1SVasili Galka (int)sizeof(spl_image.name), spl_image.name, 10262cf11c0STaras Kondratiuk spl_image.load_addr, spl_image.size); 10347f7bcaeSTom Rini } else { 1048c80eb3bSAlbert ARIBAUD \(3ADEV\) #ifdef CONFIG_SPL_PANIC_ON_RAW_IMAGE 1058c80eb3bSAlbert ARIBAUD \(3ADEV\) /* 1068c80eb3bSAlbert ARIBAUD \(3ADEV\) * CONFIG_SPL_PANIC_ON_RAW_IMAGE is defined when the 1078c80eb3bSAlbert ARIBAUD \(3ADEV\) * code which loads images in SPL cannot guarantee that 1088c80eb3bSAlbert ARIBAUD \(3ADEV\) * absolutely all read errors will be reported. 1098c80eb3bSAlbert ARIBAUD \(3ADEV\) * An example is the LPC32XX MLC NAND driver, which 1108c80eb3bSAlbert ARIBAUD \(3ADEV\) * will consider that a completely unreadable NAND block 1118c80eb3bSAlbert ARIBAUD \(3ADEV\) * is bad, and thus should be skipped silently. 1128c80eb3bSAlbert ARIBAUD \(3ADEV\) */ 1138c80eb3bSAlbert ARIBAUD \(3ADEV\) panic("** no mkimage signature but raw image not supported"); 1148c80eb3bSAlbert ARIBAUD \(3ADEV\) #else 11547f7bcaeSTom Rini /* Signature not found - assume u-boot.bin */ 11647f7bcaeSTom Rini debug("mkimage signature not found - ih_magic = %x\n", 11747f7bcaeSTom Rini header->ih_magic); 1180c3117b1SHeiko Schocher spl_set_header_raw_uboot(); 1198c80eb3bSAlbert ARIBAUD \(3ADEV\) #endif 12047f7bcaeSTom Rini } 12147f7bcaeSTom Rini } 12247f7bcaeSTom Rini 123a759f1e0SAllen Martin __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image) 12447f7bcaeSTom Rini { 1254a0eb757SSRICHARAN R typedef void __noreturn (*image_entry_noargs_t)(void); 1264a0eb757SSRICHARAN R 12747f7bcaeSTom Rini image_entry_noargs_t image_entry = 128b2d5ac59SScott Wood (image_entry_noargs_t)(unsigned long)spl_image->entry_point; 12947f7bcaeSTom Rini 130a759f1e0SAllen Martin debug("image entry point: 0x%X\n", spl_image->entry_point); 1314a0eb757SSRICHARAN R image_entry(); 13247f7bcaeSTom Rini } 13347f7bcaeSTom Rini 134c57b953dSPavel Machek #ifdef CONFIG_SPL_RAM_DEVICE 13536afd451SNikita Kiryanov static int spl_ram_load_image(void) 136c57b953dSPavel Machek { 137c57b953dSPavel Machek const struct image_header *header; 138c57b953dSPavel Machek 139c57b953dSPavel Machek /* 140c57b953dSPavel Machek * Get the header. It will point to an address defined by handoff 141c57b953dSPavel Machek * which will tell where the image located inside the flash. For 142c57b953dSPavel Machek * now, it will temporary fixed to address pointed by U-Boot. 143c57b953dSPavel Machek */ 144c57b953dSPavel Machek header = (struct image_header *) 145c57b953dSPavel Machek (CONFIG_SYS_TEXT_BASE - sizeof(struct image_header)); 146c57b953dSPavel Machek 147c57b953dSPavel Machek spl_parse_image_header(header); 14836afd451SNikita Kiryanov 14936afd451SNikita Kiryanov return 0; 150c57b953dSPavel Machek } 151c57b953dSPavel Machek #endif 152c57b953dSPavel Machek 153070d00b8SSimon Glass int spl_init(void) 15447f7bcaeSTom Rini { 155f3d46bd6SSimon Glass int ret; 156f3d46bd6SSimon Glass 157070d00b8SSimon Glass debug("spl_init()\n"); 158070d00b8SSimon Glass #if defined(CONFIG_SYS_MALLOC_F_LEN) 159293f16b1SSimon Glass gd->malloc_limit = CONFIG_SYS_MALLOC_F_LEN; 160fb4f5e7cSSimon Glass gd->malloc_ptr = 0; 16147f7bcaeSTom Rini #endif 1620f925822SMasahiro Yamada if (CONFIG_IS_ENABLED(OF_CONTROL)) { 163f3d46bd6SSimon Glass ret = fdtdec_setup(); 164f3d46bd6SSimon Glass if (ret) { 165f3d46bd6SSimon Glass debug("fdtdec_setup() returned error %d\n", ret); 166070d00b8SSimon Glass return ret; 167f3d46bd6SSimon Glass } 168f3d46bd6SSimon Glass } 169f3d46bd6SSimon Glass if (IS_ENABLED(CONFIG_SPL_DM)) { 170f3d46bd6SSimon Glass ret = dm_init_and_scan(true); 171f3d46bd6SSimon Glass if (ret) { 172f3d46bd6SSimon Glass debug("dm_init_and_scan() returned error %d\n", ret); 173070d00b8SSimon Glass return ret; 174f3d46bd6SSimon Glass } 175f3d46bd6SSimon Glass } 176070d00b8SSimon Glass gd->flags |= GD_FLG_SPL_INIT; 177070d00b8SSimon Glass 178070d00b8SSimon Glass return 0; 179070d00b8SSimon Glass } 18047f7bcaeSTom Rini 181f101e4bdSNikita Kiryanov #ifndef BOOT_DEVICE_NONE 182f101e4bdSNikita Kiryanov #define BOOT_DEVICE_NONE 0xdeadbeef 183f101e4bdSNikita Kiryanov #endif 184f101e4bdSNikita Kiryanov 185f101e4bdSNikita Kiryanov static u32 spl_boot_list[] = { 186f101e4bdSNikita Kiryanov BOOT_DEVICE_NONE, 187f101e4bdSNikita Kiryanov BOOT_DEVICE_NONE, 188f101e4bdSNikita Kiryanov BOOT_DEVICE_NONE, 189f101e4bdSNikita Kiryanov BOOT_DEVICE_NONE, 190f101e4bdSNikita Kiryanov BOOT_DEVICE_NONE, 191f101e4bdSNikita Kiryanov }; 192f101e4bdSNikita Kiryanov 193f101e4bdSNikita Kiryanov __weak void board_boot_order(u32 *spl_boot_list) 194f101e4bdSNikita Kiryanov { 195f101e4bdSNikita Kiryanov spl_boot_list[0] = spl_boot_device(); 196f101e4bdSNikita Kiryanov } 197f101e4bdSNikita Kiryanov 198310c8466SNikita Kiryanov #ifdef CONFIG_SPL_BOARD_LOAD_IMAGE 199310c8466SNikita Kiryanov __weak void spl_board_announce_boot_device(void) { } 200310c8466SNikita Kiryanov #endif 201310c8466SNikita Kiryanov 202310c8466SNikita Kiryanov #ifdef CONFIG_SPL_LIBCOMMON_SUPPORT 203310c8466SNikita Kiryanov struct boot_device_name { 204310c8466SNikita Kiryanov u32 boot_dev; 205310c8466SNikita Kiryanov const char *name; 206310c8466SNikita Kiryanov }; 207310c8466SNikita Kiryanov 208310c8466SNikita Kiryanov struct boot_device_name boot_name_table[] = { 209310c8466SNikita Kiryanov #ifdef CONFIG_SPL_RAM_DEVICE 210310c8466SNikita Kiryanov { BOOT_DEVICE_RAM, "RAM" }, 211310c8466SNikita Kiryanov #endif 212310c8466SNikita Kiryanov #ifdef CONFIG_SPL_MMC_SUPPORT 213310c8466SNikita Kiryanov { BOOT_DEVICE_MMC1, "MMC" }, 214310c8466SNikita Kiryanov { BOOT_DEVICE_MMC2, "MMC" }, 215310c8466SNikita Kiryanov { BOOT_DEVICE_MMC2_2, "MMC" }, 216310c8466SNikita Kiryanov #endif 217310c8466SNikita Kiryanov #ifdef CONFIG_SPL_NAND_SUPPORT 218310c8466SNikita Kiryanov { BOOT_DEVICE_NAND, "NAND" }, 219310c8466SNikita Kiryanov #endif 220310c8466SNikita Kiryanov #ifdef CONFIG_SPL_ONENAND_SUPPORT 221310c8466SNikita Kiryanov { BOOT_DEVICE_ONENAND, "OneNAND" }, 222310c8466SNikita Kiryanov #endif 223310c8466SNikita Kiryanov #ifdef CONFIG_SPL_NOR_SUPPORT 224310c8466SNikita Kiryanov { BOOT_DEVICE_NOR, "NOR" }, 225310c8466SNikita Kiryanov #endif 226310c8466SNikita Kiryanov #ifdef CONFIG_SPL_YMODEM_SUPPORT 227310c8466SNikita Kiryanov { BOOT_DEVICE_UART, "UART" }, 228310c8466SNikita Kiryanov #endif 229310c8466SNikita Kiryanov #ifdef CONFIG_SPL_SPI_SUPPORT 230310c8466SNikita Kiryanov { BOOT_DEVICE_SPI, "SPI" }, 231310c8466SNikita Kiryanov #endif 232310c8466SNikita Kiryanov #ifdef CONFIG_SPL_ETH_SUPPORT 233310c8466SNikita Kiryanov #ifdef CONFIG_SPL_ETH_DEVICE 234310c8466SNikita Kiryanov { BOOT_DEVICE_CPGMAC, "eth device" }, 235310c8466SNikita Kiryanov #else 236310c8466SNikita Kiryanov { BOOT_DEVICE_CPGMAC, "net" }, 237310c8466SNikita Kiryanov #endif 238310c8466SNikita Kiryanov #endif 239310c8466SNikita Kiryanov #ifdef CONFIG_SPL_USBETH_SUPPORT 240310c8466SNikita Kiryanov { BOOT_DEVICE_USBETH, "USB eth" }, 241310c8466SNikita Kiryanov #endif 242310c8466SNikita Kiryanov #ifdef CONFIG_SPL_USB_SUPPORT 243310c8466SNikita Kiryanov { BOOT_DEVICE_USB, "USB" }, 244310c8466SNikita Kiryanov #endif 245310c8466SNikita Kiryanov #ifdef CONFIG_SPL_SATA_SUPPORT 246310c8466SNikita Kiryanov { BOOT_DEVICE_SATA, "SATA" }, 247310c8466SNikita Kiryanov #endif 248310c8466SNikita Kiryanov /* Keep this entry last */ 249310c8466SNikita Kiryanov { BOOT_DEVICE_NONE, "unknown boot device" }, 250310c8466SNikita Kiryanov }; 251310c8466SNikita Kiryanov 252310c8466SNikita Kiryanov static void announce_boot_device(u32 boot_device) 253310c8466SNikita Kiryanov { 254310c8466SNikita Kiryanov int i; 255310c8466SNikita Kiryanov 256310c8466SNikita Kiryanov puts("Trying to boot from "); 257310c8466SNikita Kiryanov 258310c8466SNikita Kiryanov #ifdef CONFIG_SPL_BOARD_LOAD_IMAGE 259310c8466SNikita Kiryanov if (boot_device == BOOT_DEVICE_BOARD) { 260310c8466SNikita Kiryanov spl_board_announce_boot_device(); 261310c8466SNikita Kiryanov puts("\n"); 262310c8466SNikita Kiryanov return; 263310c8466SNikita Kiryanov } 264310c8466SNikita Kiryanov #endif 265310c8466SNikita Kiryanov for (i = 0; i < ARRAY_SIZE(boot_name_table) - 1; i++) { 266310c8466SNikita Kiryanov if (boot_name_table[i].boot_dev == boot_device) 267310c8466SNikita Kiryanov break; 268310c8466SNikita Kiryanov } 269310c8466SNikita Kiryanov 270310c8466SNikita Kiryanov printf("%s\n", boot_name_table[i].name); 271310c8466SNikita Kiryanov } 272310c8466SNikita Kiryanov #else 273310c8466SNikita Kiryanov static inline void announce_boot_device(u32 boot_device) { } 274310c8466SNikita Kiryanov #endif 275310c8466SNikita Kiryanov 2765211b87eSNikita Kiryanov static int spl_load_image(u32 boot_device) 2775211b87eSNikita Kiryanov { 2785211b87eSNikita Kiryanov switch (boot_device) { 2795211b87eSNikita Kiryanov #ifdef CONFIG_SPL_RAM_DEVICE 2805211b87eSNikita Kiryanov case BOOT_DEVICE_RAM: 2815211b87eSNikita Kiryanov return spl_ram_load_image(); 2825211b87eSNikita Kiryanov #endif 2835211b87eSNikita Kiryanov #ifdef CONFIG_SPL_MMC_SUPPORT 2845211b87eSNikita Kiryanov case BOOT_DEVICE_MMC1: 2855211b87eSNikita Kiryanov case BOOT_DEVICE_MMC2: 2865211b87eSNikita Kiryanov case BOOT_DEVICE_MMC2_2: 287a1e56cf6SNikita Kiryanov return spl_mmc_load_image(boot_device); 2885211b87eSNikita Kiryanov #endif 2895211b87eSNikita Kiryanov #ifdef CONFIG_SPL_NAND_SUPPORT 2905211b87eSNikita Kiryanov case BOOT_DEVICE_NAND: 2915211b87eSNikita Kiryanov return spl_nand_load_image(); 2925211b87eSNikita Kiryanov #endif 2935211b87eSNikita Kiryanov #ifdef CONFIG_SPL_ONENAND_SUPPORT 2945211b87eSNikita Kiryanov case BOOT_DEVICE_ONENAND: 2955211b87eSNikita Kiryanov return spl_onenand_load_image(); 2965211b87eSNikita Kiryanov #endif 2975211b87eSNikita Kiryanov #ifdef CONFIG_SPL_NOR_SUPPORT 2985211b87eSNikita Kiryanov case BOOT_DEVICE_NOR: 2995211b87eSNikita Kiryanov return spl_nor_load_image(); 3005211b87eSNikita Kiryanov #endif 3015211b87eSNikita Kiryanov #ifdef CONFIG_SPL_YMODEM_SUPPORT 3025211b87eSNikita Kiryanov case BOOT_DEVICE_UART: 3035211b87eSNikita Kiryanov return spl_ymodem_load_image(); 3045211b87eSNikita Kiryanov #endif 3055211b87eSNikita Kiryanov #ifdef CONFIG_SPL_SPI_SUPPORT 3065211b87eSNikita Kiryanov case BOOT_DEVICE_SPI: 3075211b87eSNikita Kiryanov return spl_spi_load_image(); 3085211b87eSNikita Kiryanov #endif 3095211b87eSNikita Kiryanov #ifdef CONFIG_SPL_ETH_SUPPORT 3105211b87eSNikita Kiryanov case BOOT_DEVICE_CPGMAC: 3115211b87eSNikita Kiryanov #ifdef CONFIG_SPL_ETH_DEVICE 3125211b87eSNikita Kiryanov return spl_net_load_image(CONFIG_SPL_ETH_DEVICE); 3135211b87eSNikita Kiryanov #else 3145211b87eSNikita Kiryanov return spl_net_load_image(NULL); 3155211b87eSNikita Kiryanov #endif 3165211b87eSNikita Kiryanov #endif 3175211b87eSNikita Kiryanov #ifdef CONFIG_SPL_USBETH_SUPPORT 3185211b87eSNikita Kiryanov case BOOT_DEVICE_USBETH: 3195211b87eSNikita Kiryanov return spl_net_load_image("usb_ether"); 3205211b87eSNikita Kiryanov #endif 3215211b87eSNikita Kiryanov #ifdef CONFIG_SPL_USB_SUPPORT 3225211b87eSNikita Kiryanov case BOOT_DEVICE_USB: 3235211b87eSNikita Kiryanov return spl_usb_load_image(); 3245211b87eSNikita Kiryanov #endif 3255211b87eSNikita Kiryanov #ifdef CONFIG_SPL_SATA_SUPPORT 3265211b87eSNikita Kiryanov case BOOT_DEVICE_SATA: 3275211b87eSNikita Kiryanov return spl_sata_load_image(); 3285211b87eSNikita Kiryanov #endif 3295211b87eSNikita Kiryanov #ifdef CONFIG_SPL_BOARD_LOAD_IMAGE 3305211b87eSNikita Kiryanov case BOOT_DEVICE_BOARD: 3315211b87eSNikita Kiryanov return spl_board_load_image(); 3325211b87eSNikita Kiryanov #endif 3335211b87eSNikita Kiryanov default: 3345211b87eSNikita Kiryanov #if defined(CONFIG_SPL_SERIAL_SUPPORT) && defined(CONFIG_SPL_LIBCOMMON_SUPPORT) 3355211b87eSNikita Kiryanov puts("SPL: Unsupported Boot Device!\n"); 3365211b87eSNikita Kiryanov #endif 3375211b87eSNikita Kiryanov return -ENODEV; 3385211b87eSNikita Kiryanov } 3395211b87eSNikita Kiryanov 3405211b87eSNikita Kiryanov return -EINVAL; 3415211b87eSNikita Kiryanov } 3425211b87eSNikita Kiryanov 343070d00b8SSimon Glass void board_init_r(gd_t *dummy1, ulong dummy2) 344070d00b8SSimon Glass { 345f101e4bdSNikita Kiryanov int i; 346070d00b8SSimon Glass 347070d00b8SSimon Glass debug(">>spl:board_init_r()\n"); 348070d00b8SSimon Glass 349070d00b8SSimon Glass #if defined(CONFIG_SYS_SPL_MALLOC_START) 350070d00b8SSimon Glass mem_malloc_init(CONFIG_SYS_SPL_MALLOC_START, 351070d00b8SSimon Glass CONFIG_SYS_SPL_MALLOC_SIZE); 352070d00b8SSimon Glass gd->flags |= GD_FLG_FULL_MALLOC_INIT; 353070d00b8SSimon Glass #endif 354070d00b8SSimon Glass if (!(gd->flags & GD_FLG_SPL_INIT)) { 355070d00b8SSimon Glass if (spl_init()) 356070d00b8SSimon Glass hang(); 357070d00b8SSimon Glass } 358ea8256f0SStefan Roese #ifndef CONFIG_PPC 359ea8256f0SStefan Roese /* 360ea8256f0SStefan Roese * timer_init() does not exist on PPC systems. The timer is initialized 361ea8256f0SStefan Roese * and enabled (decrementer) in interrupt_init() here. 362ea8256f0SStefan Roese */ 3634063c77dSIlya Yanok timer_init(); 364ea8256f0SStefan Roese #endif 3654063c77dSIlya Yanok 36647f7bcaeSTom Rini #ifdef CONFIG_SPL_BOARD_INIT 36747f7bcaeSTom Rini spl_board_init(); 36847f7bcaeSTom Rini #endif 36947f7bcaeSTom Rini 370f101e4bdSNikita Kiryanov board_boot_order(spl_boot_list); 371f101e4bdSNikita Kiryanov for (i = 0; i < ARRAY_SIZE(spl_boot_list) && 372f101e4bdSNikita Kiryanov spl_boot_list[i] != BOOT_DEVICE_NONE; i++) { 373310c8466SNikita Kiryanov announce_boot_device(spl_boot_list[i]); 374f101e4bdSNikita Kiryanov if (!spl_load_image(spl_boot_list[i])) 375f101e4bdSNikita Kiryanov break; 376f101e4bdSNikita Kiryanov } 377f101e4bdSNikita Kiryanov 378f101e4bdSNikita Kiryanov if (i == ARRAY_SIZE(spl_boot_list) || 379f101e4bdSNikita Kiryanov spl_boot_list[i] == BOOT_DEVICE_NONE) { 380f101e4bdSNikita Kiryanov puts("SPL: failed to boot from all boot devices\n"); 38136afd451SNikita Kiryanov hang(); 382f101e4bdSNikita Kiryanov } 38347f7bcaeSTom Rini 38447f7bcaeSTom Rini switch (spl_image.os) { 38547f7bcaeSTom Rini case IH_OS_U_BOOT: 38647f7bcaeSTom Rini debug("Jumping to U-Boot\n"); 38747f7bcaeSTom Rini break; 38847f7bcaeSTom Rini #ifdef CONFIG_SPL_OS_BOOT 38947f7bcaeSTom Rini case IH_OS_LINUX: 39047f7bcaeSTom Rini debug("Jumping to Linux\n"); 39147f7bcaeSTom Rini spl_board_prepare_for_linux(); 39247f7bcaeSTom Rini jump_to_image_linux((void *)CONFIG_SYS_SPL_ARGS_ADDR); 39347f7bcaeSTom Rini #endif 39447f7bcaeSTom Rini default: 39542120981STom Rini debug("Unsupported OS image.. Jumping nevertheless..\n"); 39647f7bcaeSTom Rini } 397fb4f5e7cSSimon Glass #if defined(CONFIG_SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE) 398fb4f5e7cSSimon Glass debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr, 399fb4f5e7cSSimon Glass gd->malloc_ptr / 1024); 400fb4f5e7cSSimon Glass #endif 401fb4f5e7cSSimon Glass 402aea3d40dSSimon Glass debug("loaded - jumping to U-Boot..."); 403a759f1e0SAllen Martin jump_to_image_no_args(&spl_image); 40447f7bcaeSTom Rini } 40547f7bcaeSTom Rini 4066507f133STom Rini /* 4076507f133STom Rini * This requires UART clocks to be enabled. In order for this to work the 4086507f133STom Rini * caller must ensure that the gd pointer is valid. 4096507f133STom Rini */ 41047f7bcaeSTom Rini void preloader_console_init(void) 41147f7bcaeSTom Rini { 41247f7bcaeSTom Rini gd->bd = &bdata; 41347f7bcaeSTom Rini gd->baudrate = CONFIG_BAUDRATE; 41447f7bcaeSTom Rini 41547f7bcaeSTom Rini serial_init(); /* serial communications setup */ 41647f7bcaeSTom Rini 41747f7bcaeSTom Rini gd->have_console = 1; 41847f7bcaeSTom Rini 41947f7bcaeSTom Rini puts("\nU-Boot SPL " PLAIN_VERSION " (" U_BOOT_DATE " - " \ 42047f7bcaeSTom Rini U_BOOT_TIME ")\n"); 42147f7bcaeSTom Rini #ifdef CONFIG_SPL_DISPLAY_PRINT 42247f7bcaeSTom Rini spl_display_print(); 42347f7bcaeSTom Rini #endif 42447f7bcaeSTom Rini } 425db910353SSimon Glass 426db910353SSimon Glass /** 427db910353SSimon Glass * spl_relocate_stack_gd() - Relocate stack ready for board_init_r() execution 428db910353SSimon Glass * 429db910353SSimon Glass * Sometimes board_init_f() runs with a stack in SRAM but we want to use SDRAM 430db910353SSimon Glass * for the main board_init_r() execution. This is typically because we need 431db910353SSimon Glass * more stack space for things like the MMC sub-system. 432db910353SSimon Glass * 433db910353SSimon Glass * This function calculates the stack position, copies the global_data into 434*adc421e4SAlbert ARIBAUD * place, sets the new gd (except for ARM, for which setting GD within a C 435*adc421e4SAlbert ARIBAUD * function may not always work) and returns the new stack position. The 436*adc421e4SAlbert ARIBAUD * caller is responsible for setting up the sp register and, in the case 437*adc421e4SAlbert ARIBAUD * of ARM, setting up gd. 438*adc421e4SAlbert ARIBAUD * 439*adc421e4SAlbert ARIBAUD * All of this is done using the same layout and alignments as done in 440*adc421e4SAlbert ARIBAUD * board_init_f_init_reserve() / board_init_f_alloc_reserve(). 441db910353SSimon Glass * 442db910353SSimon Glass * @return new stack location, or 0 to use the same stack 443db910353SSimon Glass */ 444db910353SSimon Glass ulong spl_relocate_stack_gd(void) 445db910353SSimon Glass { 446db910353SSimon Glass #ifdef CONFIG_SPL_STACK_R 447db910353SSimon Glass gd_t *new_gd; 448*adc421e4SAlbert ARIBAUD ulong ptr = CONFIG_SPL_STACK_R_ADDR; 449db910353SSimon Glass 450dcfcb8d4SHans de Goede #ifdef CONFIG_SPL_SYS_MALLOC_SIMPLE 451dcfcb8d4SHans de Goede if (CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN) { 452dcfcb8d4SHans de Goede if (!(gd->flags & GD_FLG_SPL_INIT)) 4534363de63SSjoerd Simons panic_str("spl_init must be called before heap reloc"); 454dcfcb8d4SHans de Goede 455dcfcb8d4SHans de Goede ptr -= CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; 456dcfcb8d4SHans de Goede gd->malloc_base = ptr; 457dcfcb8d4SHans de Goede gd->malloc_limit = CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN; 458dcfcb8d4SHans de Goede gd->malloc_ptr = 0; 459dcfcb8d4SHans de Goede } 460dcfcb8d4SHans de Goede #endif 461*adc421e4SAlbert ARIBAUD /* Get stack position: use 8-byte alignment for ABI compliance */ 462*adc421e4SAlbert ARIBAUD ptr = CONFIG_SPL_STACK_R_ADDR - roundup(sizeof(gd_t),16); 463*adc421e4SAlbert ARIBAUD new_gd = (gd_t *)ptr; 464*adc421e4SAlbert ARIBAUD memcpy(new_gd, (void *)gd, sizeof(gd_t)); 465*adc421e4SAlbert ARIBAUD #if !defined(CONFIG_ARM) 466*adc421e4SAlbert ARIBAUD gd = new_gd; 467*adc421e4SAlbert ARIBAUD #endif 468db910353SSimon Glass return ptr; 469db910353SSimon Glass #else 470db910353SSimon Glass return 0; 471db910353SSimon Glass #endif 472db910353SSimon Glass } 473