1bf78b271SMarcel Ziswiler /*
2b891d010SMarcel Ziswiler * (C) Copyright 2014-2016
3bf78b271SMarcel Ziswiler * Marcel Ziswiler <marcel@ziswiler.com>
4bf78b271SMarcel Ziswiler *
5bf78b271SMarcel Ziswiler * SPDX-License-Identifier: GPL-2.0+
6bf78b271SMarcel Ziswiler */
7bf78b271SMarcel Ziswiler
8bf78b271SMarcel Ziswiler #include <common.h>
9bf78b271SMarcel Ziswiler #include <asm/arch/gp_padctrl.h>
10bf78b271SMarcel Ziswiler #include <asm/arch/pinmux.h>
11a5825625SMarcel Ziswiler #include <asm/arch-tegra/ap.h>
12a5825625SMarcel Ziswiler #include <asm/arch-tegra/tegra.h>
13bf78b271SMarcel Ziswiler #include <asm/gpio.h>
14a5825625SMarcel Ziswiler #include <asm/io.h>
1536a01bddSMarcel Ziswiler #include <dm.h>
16bf78b271SMarcel Ziswiler #include <i2c.h>
17*37fa4125SStefan Agner #include "../common/tdx-common.h"
18bf78b271SMarcel Ziswiler
19bf78b271SMarcel Ziswiler #include "pinmux-config-apalis_t30.h"
20bf78b271SMarcel Ziswiler
21b891d010SMarcel Ziswiler DECLARE_GLOBAL_DATA_PTR;
22b891d010SMarcel Ziswiler
23bf78b271SMarcel Ziswiler #define PMU_I2C_ADDRESS 0x2D
24bf78b271SMarcel Ziswiler #define MAX_I2C_RETRY 3
25bf78b271SMarcel Ziswiler
arch_misc_init(void)26a5825625SMarcel Ziswiler int arch_misc_init(void)
27a5825625SMarcel Ziswiler {
28a5825625SMarcel Ziswiler if (readl(NV_PA_BASE_SRAM + NVBOOTINFOTABLE_BOOTTYPE) ==
29a5825625SMarcel Ziswiler NVBOOTTYPE_RECOVERY)
30a5825625SMarcel Ziswiler printf("USB recovery mode\n");
31a5825625SMarcel Ziswiler
32a5825625SMarcel Ziswiler return 0;
33a5825625SMarcel Ziswiler }
34a5825625SMarcel Ziswiler
checkboard(void)35b891d010SMarcel Ziswiler int checkboard(void)
36b891d010SMarcel Ziswiler {
37b891d010SMarcel Ziswiler printf("Model: Toradex Apalis T30 %dGB\n",
38b891d010SMarcel Ziswiler (gd->ram_size == 0x40000000) ? 1 : 2);
39b891d010SMarcel Ziswiler
40b891d010SMarcel Ziswiler return 0;
41b891d010SMarcel Ziswiler }
42b891d010SMarcel Ziswiler
43*37fa4125SStefan Agner #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
ft_board_setup(void * blob,bd_t * bd)44*37fa4125SStefan Agner int ft_board_setup(void *blob, bd_t *bd)
45*37fa4125SStefan Agner {
46*37fa4125SStefan Agner return ft_common_board_setup(blob, bd);
47*37fa4125SStefan Agner }
48*37fa4125SStefan Agner #endif
49*37fa4125SStefan Agner
50bf78b271SMarcel Ziswiler /*
51bf78b271SMarcel Ziswiler * Routine: pinmux_init
52bf78b271SMarcel Ziswiler * Description: Do individual peripheral pinmux configs
53bf78b271SMarcel Ziswiler */
pinmux_init(void)54bf78b271SMarcel Ziswiler void pinmux_init(void)
55bf78b271SMarcel Ziswiler {
56bf78b271SMarcel Ziswiler pinmux_config_pingrp_table(tegra3_pinmux_common,
57bf78b271SMarcel Ziswiler ARRAY_SIZE(tegra3_pinmux_common));
58bf78b271SMarcel Ziswiler
59bf78b271SMarcel Ziswiler pinmux_config_pingrp_table(unused_pins_lowpower,
60bf78b271SMarcel Ziswiler ARRAY_SIZE(unused_pins_lowpower));
61bf78b271SMarcel Ziswiler
62bf78b271SMarcel Ziswiler /* Initialize any non-default pad configs (APB_MISC_GP regs) */
63bf78b271SMarcel Ziswiler pinmux_config_drvgrp_table(apalis_t30_padctrl,
64bf78b271SMarcel Ziswiler ARRAY_SIZE(apalis_t30_padctrl));
65bf78b271SMarcel Ziswiler }
66bf78b271SMarcel Ziswiler
67bf78b271SMarcel Ziswiler #ifdef CONFIG_PCI_TEGRA
tegra_pcie_board_init(void)68bf78b271SMarcel Ziswiler int tegra_pcie_board_init(void)
69bf78b271SMarcel Ziswiler {
70b0e6ef46SSimon Glass struct udevice *dev;
71bf78b271SMarcel Ziswiler u8 addr, data[1];
72bf78b271SMarcel Ziswiler int err;
73bf78b271SMarcel Ziswiler
7425ab4b03SSimon Glass err = i2c_get_chip_for_busnum(0, PMU_I2C_ADDRESS, 1, &dev);
75bf78b271SMarcel Ziswiler if (err) {
76b0e6ef46SSimon Glass debug("%s: Cannot find PMIC I2C chip\n", __func__);
77bf78b271SMarcel Ziswiler return err;
78bf78b271SMarcel Ziswiler }
7936a01bddSMarcel Ziswiler
80bf78b271SMarcel Ziswiler /* TPS659110: VDD2_OP_REG = 1.05V */
81bf78b271SMarcel Ziswiler data[0] = 0x27;
82bf78b271SMarcel Ziswiler addr = 0x25;
83bf78b271SMarcel Ziswiler
84f9a4c2daSSimon Glass err = dm_i2c_write(dev, addr, data, 1);
85bf78b271SMarcel Ziswiler if (err) {
86bf78b271SMarcel Ziswiler debug("failed to set VDD supply\n");
87bf78b271SMarcel Ziswiler return err;
88bf78b271SMarcel Ziswiler }
89bf78b271SMarcel Ziswiler
90bf78b271SMarcel Ziswiler /* TPS659110: VDD2_REG 7.5 mV/us, ACTIVE */
91bf78b271SMarcel Ziswiler data[0] = 0x0D;
92bf78b271SMarcel Ziswiler addr = 0x24;
93bf78b271SMarcel Ziswiler
94f9a4c2daSSimon Glass err = dm_i2c_write(dev, addr, data, 1);
95bf78b271SMarcel Ziswiler if (err) {
96bf78b271SMarcel Ziswiler debug("failed to enable VDD supply\n");
97bf78b271SMarcel Ziswiler return err;
98bf78b271SMarcel Ziswiler }
99bf78b271SMarcel Ziswiler
100bf78b271SMarcel Ziswiler /* TPS659110: LDO6_REG = 1.1V, ACTIVE */
101bf78b271SMarcel Ziswiler data[0] = 0x0D;
102bf78b271SMarcel Ziswiler addr = 0x35;
103bf78b271SMarcel Ziswiler
104f9a4c2daSSimon Glass err = dm_i2c_write(dev, addr, data, 1);
105bf78b271SMarcel Ziswiler if (err) {
106bf78b271SMarcel Ziswiler debug("failed to set AVDD supply\n");
107bf78b271SMarcel Ziswiler return err;
108bf78b271SMarcel Ziswiler }
109bf78b271SMarcel Ziswiler
110bf78b271SMarcel Ziswiler return 0;
111bf78b271SMarcel Ziswiler }
112bf78b271SMarcel Ziswiler #endif /* CONFIG_PCI_TEGRA */
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