xref: /rk3399_rockchip-uboot/board/st/stm32f746-disco/stm32f746-disco.c (revision 2f80a9f72ecf4cfee68279a45e3c155f6516faa1)
1 /*
2  * (C) Copyright 2016
3  * Vikas Manocha, <vikas.manocha@st.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #include <common.h>
9 #include <dm.h>
10 #include <ram.h>
11 #include <asm/io.h>
12 #include <asm/armv7m.h>
13 #include <asm/arch/stm32.h>
14 #include <asm/arch/gpio.h>
15 #include <dm/platdata.h>
16 #include <dm/platform_data/serial_stm32x7.h>
17 #include <asm/arch/stm32_periph.h>
18 #include <asm/arch/stm32_defs.h>
19 #include <asm/arch/syscfg.h>
20 #include <asm/gpio.h>
21 
22 DECLARE_GLOBAL_DATA_PTR;
23 
24 int dram_init(void)
25 {
26 	struct udevice *dev;
27 	struct ram_info ram;
28 	int rv;
29 
30 	rv = uclass_get_device(UCLASS_RAM, 0, &dev);
31 	if (rv) {
32 		debug("DRAM init failed: %d\n", rv);
33 		return rv;
34 	}
35 	rv = ram_get_info(dev, &ram);
36 	if (rv) {
37 		debug("Cannot get DRAM size: %d\n", rv);
38 		return rv;
39 	}
40 	debug("SDRAM base=%lx, size=%x\n", ram.base, ram.size);
41 	gd->ram_size = ram.size;
42 
43 	/*
44 	 * Fill in global info with description of SRAM configuration
45 	 */
46 	gd->bd->bi_dram[0].start = CONFIG_SYS_RAM_BASE;
47 	gd->bd->bi_dram[0].size  = ram.size;
48 
49 	return rv;
50 }
51 
52 #ifdef CONFIG_ETH_DESIGNWARE
53 static int stmmac_setup(void)
54 {
55 	clock_setup(SYSCFG_CLOCK_CFG);
56 	/* Set >RMII mode */
57 	STM32_SYSCFG->pmc |= SYSCFG_PMC_MII_RMII_SEL;
58 	clock_setup(STMMAC_CLOCK_CFG);
59 
60 	return 0;
61 }
62 
63 int board_early_init_f(void)
64 {
65 	stmmac_setup();
66 
67 	return 0;
68 }
69 #endif
70 
71 u32 get_board_rev(void)
72 {
73 	return 0;
74 }
75 
76 int board_late_init(void)
77 {
78 	struct gpio_desc gpio = {};
79 	int node;
80 
81 	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,led1");
82 	if (node < 0)
83 		return -1;
84 
85 	gpio_request_by_name_nodev(gd->fdt_blob, node, "led-gpio", 0, &gpio,
86 				   GPIOD_IS_OUT);
87 
88 	if (dm_gpio_is_valid(&gpio)) {
89 		dm_gpio_set_value(&gpio, 0);
90 		mdelay(10);
91 		dm_gpio_set_value(&gpio, 1);
92 	}
93 
94 	/* read button 1*/
95 	node = fdt_node_offset_by_compatible(gd->fdt_blob, 0, "st,button1");
96 	if (node < 0)
97 		return -1;
98 
99 	gpio_request_by_name_nodev(gd->fdt_blob, node, "button-gpio", 0, &gpio,
100 				   GPIOD_IS_IN);
101 
102 	if (dm_gpio_is_valid(&gpio)) {
103 		if (dm_gpio_get_value(&gpio))
104 			puts("usr button is at HIGH LEVEL\n");
105 		else
106 			puts("usr button is at LOW LEVEL\n");
107 	}
108 
109 	return 0;
110 }
111 
112 int board_init(void)
113 {
114 	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
115 
116 	return 0;
117 }
118