1 /*
2 * Copyright (C) 2016 Amarula Solutions B.V.
3 * Copyright (C) 2016 Engicam S.r.l.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #include <common.h>
10 #include <mmc.h>
11
12 #include <asm/io.h>
13 #include <asm/gpio.h>
14 #include <linux/sizes.h>
15
16 #include <asm/arch/clock.h>
17 #include <asm/arch/crm_regs.h>
18 #include <asm/arch/iomux.h>
19 #include <asm/arch/mx6-pins.h>
20 #include <asm/arch/sys_proto.h>
21 #include <asm/mach-imx/iomux-v3.h>
22
23 #include "../common/board.h"
24
25 DECLARE_GLOBAL_DATA_PTR;
26
27 #ifdef CONFIG_ENV_IS_IN_MMC
board_mmc_get_env_dev(int devno)28 int board_mmc_get_env_dev(int devno)
29 {
30 /* dev 0 for SD/eSD, dev 1 for MMC/eMMC */
31 return (devno == 3) ? 1 : 0;
32 }
33 #endif
34
setenv_fdt_file(void)35 void setenv_fdt_file(void)
36 {
37 if (is_mx6dq())
38 env_set("fdt_file", "imx6q-icore-rqs.dtb");
39 else if(is_mx6dl() || is_mx6solo())
40 env_set("fdt_file", "imx6dl-icore-rqs.dtb");
41 }
42
43 #ifdef CONFIG_SPL_BUILD
44 #include <spl.h>
45
46 /* MMC board initialization is needed till adding DM support in SPL */
47 #if defined(CONFIG_FSL_ESDHC) && !defined(CONFIG_DM_MMC)
48 #include <mmc.h>
49 #include <fsl_esdhc.h>
50
51 #define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
52 PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_HIGH | \
53 PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
54
55 static iomux_v3_cfg_t const usdhc3_pads[] = {
56 IOMUX_PADS(PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
57 IOMUX_PADS(PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
58 IOMUX_PADS(PAD_SD3_DAT0__SD3_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
59 IOMUX_PADS(PAD_SD3_DAT1__SD3_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
60 IOMUX_PADS(PAD_SD3_DAT2__SD3_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
61 IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
62 };
63
64 static iomux_v3_cfg_t const usdhc4_pads[] = {
65 IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
66 IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
67 IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
68 IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
69 IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
70 IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
71 IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
72 IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
73 IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
74 IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)),
75 };
76
77 struct fsl_esdhc_cfg usdhc_cfg[2] = {
78 {USDHC3_BASE_ADDR, 1, 4},
79 {USDHC4_BASE_ADDR, 1, 8},
80 };
81
board_mmc_getcd(struct mmc * mmc)82 int board_mmc_getcd(struct mmc *mmc)
83 {
84 struct fsl_esdhc_cfg *cfg = (struct fsl_esdhc_cfg *)mmc->priv;
85 int ret = 0;
86
87 switch (cfg->esdhc_base) {
88 case USDHC3_BASE_ADDR:
89 case USDHC4_BASE_ADDR:
90 ret = 1;
91 break;
92 }
93
94 return ret;
95 }
96
board_mmc_init(bd_t * bis)97 int board_mmc_init(bd_t *bis)
98 {
99 int i, ret;
100
101 /*
102 * According to the board_mmc_init() the following map is done:
103 * (U-boot device node) (Physical Port)
104 * mmc0 USDHC3
105 * mmc1 USDHC4
106 */
107 for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) {
108 switch (i) {
109 case 0:
110 SETUP_IOMUX_PADS(usdhc3_pads);
111 usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK);
112 break;
113 case 1:
114 SETUP_IOMUX_PADS(usdhc4_pads);
115 usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK);
116 break;
117 default:
118 printf("Warning - USDHC%d controller not supporting\n",
119 i + 1);
120 return 0;
121 }
122
123 ret = fsl_esdhc_initialize(bis, &usdhc_cfg[i]);
124 if (ret) {
125 printf("Warning: failed to initialize mmc dev %d\n", i);
126 return ret;
127 }
128 }
129
130 return 0;
131 }
132
133 #ifdef CONFIG_ENV_IS_IN_MMC
board_boot_order(u32 * spl_boot_list)134 void board_boot_order(u32 *spl_boot_list)
135 {
136 u32 bmode = imx6_src_get_boot_mode();
137 u8 boot_dev = BOOT_DEVICE_MMC1;
138
139 switch ((bmode & IMX6_BMODE_MASK) >> IMX6_BMODE_SHIFT) {
140 case IMX6_BMODE_SD:
141 case IMX6_BMODE_ESD:
142 /* SD/eSD - BOOT_DEVICE_MMC1 */
143 break;
144 case IMX6_BMODE_MMC:
145 case IMX6_BMODE_EMMC:
146 /* MMC/eMMC */
147 boot_dev = BOOT_DEVICE_MMC2;
148 break;
149 default:
150 /* Default - BOOT_DEVICE_MMC1 */
151 printf("Wrong board boot order\n");
152 break;
153 }
154
155 spl_boot_list[0] = boot_dev;
156 }
157 #endif
158 #endif
159
160 #ifdef CONFIG_SPL_LOAD_FIT
board_fit_config_name_match(const char * name)161 int board_fit_config_name_match(const char *name)
162 {
163 if (is_mx6dq() && !strcmp(name, "imx6q-icore-rqs"))
164 return 0;
165 else if ((is_mx6dl() || is_mx6solo()) && !strcmp(name, "imx6dl-icore-rqs"))
166 return 0;
167 else
168 return -1;
169 }
170 #endif
171 #endif /* CONFIG_SPL_BUILD */
172