1/dts-v1/; 2 3/include/ "skeleton.dtsi" 4/include/ "serial.dtsi" 5 6/ { 7 model = "Google Link"; 8 compatible = "google,link", "intel,celeron-ivybridge"; 9 10 aliases { 11 spi0 = "/spi"; 12 }; 13 14 config { 15 silent_console = <0>; 16 }; 17 18 gpioa { 19 compatible = "intel,ich6-gpio"; 20 u-boot,dm-pre-reloc; 21 reg = <0 0x10>; 22 bank-name = "A"; 23 }; 24 25 gpiob { 26 compatible = "intel,ich6-gpio"; 27 u-boot,dm-pre-reloc; 28 reg = <0x30 0x10>; 29 bank-name = "B"; 30 }; 31 32 gpioc { 33 compatible = "intel,ich6-gpio"; 34 u-boot,dm-pre-reloc; 35 reg = <0x40 0x10>; 36 bank-name = "C"; 37 }; 38 39 chosen { 40 stdout-path = "/serial"; 41 }; 42 43 spd { 44 compatible = "memory-spd"; 45 #address-cells = <1>; 46 #size-cells = <0>; 47 elpida_4Gb_1600_x16 { 48 reg = <0>; 49 data = [92 10 0b 03 04 19 02 02 50 03 52 01 08 0a 00 fe 00 51 69 78 69 3c 69 11 18 81 52 20 08 3c 3c 01 40 83 81 53 00 00 00 00 00 00 00 00 54 00 00 00 00 00 00 00 00 55 00 00 00 00 00 00 00 00 56 00 00 00 00 0f 11 42 00 57 00 00 00 00 00 00 00 00 58 00 00 00 00 00 00 00 00 59 00 00 00 00 00 00 00 00 60 00 00 00 00 00 00 00 00 61 00 00 00 00 00 00 00 00 62 00 00 00 00 00 00 00 00 63 00 00 00 00 00 02 fe 00 64 11 52 00 00 00 07 7f 37 65 45 42 4a 32 30 55 47 36 66 45 42 55 30 2d 47 4e 2d 67 46 20 30 20 02 fe 00 00 68 00 00 00 00 00 00 00 00 69 00 00 00 00 00 00 00 00 70 00 00 00 00 00 00 00 00 71 00 00 00 00 00 00 00 00 72 00 00 00 00 00 00 00 00 73 00 00 00 00 00 00 00 00 74 00 00 00 00 00 00 00 00 75 00 00 00 00 00 00 00 00 76 00 00 00 00 00 00 00 00 77 00 00 00 00 00 00 00 00 78 00 00 00 00 00 00 00 00 79 00 00 00 00 00 00 00 00 80 00 00 00 00 00 00 00 00]; 81 }; 82 samsung_4Gb_1600_1.35v_x16 { 83 reg = <1>; 84 data = [92 11 0b 03 04 19 02 02 85 03 11 01 08 0a 00 fe 00 86 69 78 69 3c 69 11 18 81 87 f0 0a 3c 3c 01 40 83 01 88 00 80 00 00 00 00 00 00 89 00 00 00 00 00 00 00 00 90 00 00 00 00 00 00 00 00 91 00 00 00 00 0f 11 02 00 92 00 00 00 00 00 00 00 00 93 00 00 00 00 00 00 00 00 94 00 00 00 00 00 00 00 00 95 00 00 00 00 00 00 00 00 96 00 00 00 00 00 00 00 00 97 00 00 00 00 00 00 00 00 98 00 00 00 00 00 80 ce 01 99 00 00 00 00 00 00 6a 04 100 4d 34 37 31 42 35 36 37 101 34 42 48 30 2d 59 4b 30 102 20 20 00 00 80 ce 00 00 103 00 00 00 00 00 00 00 00 104 00 00 00 00 00 00 00 00 105 00 00 00 00 00 00 00 00 106 00 00 00 00 00 00 00 00 107 00 00 00 00 00 00 00 00 108 00 00 00 00 00 00 00 00 109 00 00 00 00 00 00 00 00 110 00 00 00 00 00 00 00 00 111 00 00 00 00 00 00 00 00 112 00 00 00 00 00 00 00 00 113 00 00 00 00 00 00 00 00 114 00 00 00 00 00 00 00 00 115 00 00 00 00 00 00 00 00]; 116 }; 117 micron_4Gb_1600_1.35v_x16 { 118 reg = <2>; 119 data = [92 11 0b 03 04 19 02 02 120 03 11 01 08 0a 00 fe 00 121 69 78 69 3c 69 11 18 81 122 20 08 3c 3c 01 40 83 05 123 00 00 00 00 00 00 00 00 124 00 00 00 00 00 00 00 00 125 00 00 00 00 00 00 00 00 126 00 00 00 00 0f 01 02 00 127 00 00 00 00 00 00 00 00 128 00 00 00 00 00 00 00 00 129 00 00 00 00 00 00 00 00 130 00 00 00 00 00 00 00 00 131 00 00 00 00 00 00 00 00 132 00 00 00 00 00 00 00 00 133 00 00 00 00 00 80 2c 00 134 00 00 00 00 00 00 ad 75 135 34 4b 54 46 32 35 36 36 136 34 48 5a 2d 31 47 36 45 137 31 20 45 31 80 2c 00 00 138 00 00 00 00 00 00 00 00 139 00 00 00 00 00 00 00 00 140 00 00 00 00 00 00 00 00 141 ff ff ff ff ff ff ff ff 142 ff ff ff ff ff ff ff ff 143 ff ff ff ff ff ff ff ff 144 ff ff ff ff ff ff ff ff 145 ff ff ff ff ff ff ff ff 146 ff ff ff ff ff ff ff ff 147 ff ff ff ff ff ff ff ff 148 ff ff ff ff ff ff ff ff 149 ff ff ff ff ff ff ff ff 150 ff ff ff ff ff ff ff ff]; 151 }; 152 }; 153 154 spi { 155 #address-cells = <1>; 156 #size-cells = <0>; 157 compatible = "intel,ich-spi"; 158 spi-flash@0 { 159 #size-cells = <1>; 160 #address-cells = <1>; 161 reg = <0>; 162 compatible = "winbond,w25q64", "spi-flash"; 163 memory-map = <0xff800000 0x00800000>; 164 rw-mrc-cache { 165 label = "rw-mrc-cache"; 166 /* Alignment: 4k (for updating) */ 167 reg = <0x003e0000 0x00010000>; 168 type = "wiped"; 169 wipe-value = [ff]; 170 }; 171 }; 172 }; 173 174 pci { 175 compatible = "intel,pci-ivybridge", "pci-x86"; 176 #address-cells = <3>; 177 #size-cells = <2>; 178 u-boot,dm-pre-reloc; 179 ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 180 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 181 0x01000000 0x0 0x1000 0x1000 0 0xefff>; 182 sata { 183 compatible = "intel,pantherpoint-ahci"; 184 intel,sata-mode = "ahci"; 185 intel,sata-port-map = <1>; 186 intel,sata-port0-gen3-tx = <0x00880a7f>; 187 }; 188 189 gma { 190 compatible = "intel,gma"; 191 intel,dp_hotplug = <0 0 0x06>; 192 intel,panel-port-select = <1>; 193 intel,panel-power-cycle-delay = <6>; 194 intel,panel-power-up-delay = <2000>; 195 intel,panel-power-down-delay = <500>; 196 intel,panel-power-backlight-on-delay = <2000>; 197 intel,panel-power-backlight-off-delay = <2000>; 198 intel,cpu-backlight = <0x00000200>; 199 intel,pch-backlight = <0x04000000>; 200 }; 201 202 lpc { 203 reg = <0x0000f800 0 0 0 0>; 204 compatible = "intel,bd82x6x"; 205 #address-cells = <1>; 206 #size-cells = <1>; 207 gen-dec = <0x800 0xfc 0x900 0xfc>; 208 intel,gen-dec = <0x800 0xfc 0x900 0xfc>; 209 intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b 210 0x80 0x80 0x80 0x80>; 211 intel,gpi-routing = <0 0 0 0 0 0 0 2 212 1 0 0 0 0 0 0 0>; 213 /* Enable EC SMI source */ 214 intel,alt-gp-smi-enable = <0x0100>; 215 216 cros-ec@200 { 217 compatible = "google,cros-ec"; 218 reg = <0x204 1 0x200 1 0x880 0x80>; 219 220 /* Describes the flash memory within the EC */ 221 #address-cells = <1>; 222 #size-cells = <1>; 223 flash@8000000 { 224 reg = <0x08000000 0x20000>; 225 erase-value = <0xff>; 226 }; 227 }; 228 }; 229 }; 230 231 microcode { 232 update@0 { 233#include "microcode/m12306a9_0000001b.dtsi" 234 }; 235 }; 236 237}; 238