1 /* 2 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <dm.h> 9 #include <pci.h> 10 #include <asm/io.h> 11 #include <asm/irq.h> 12 #include <asm/post.h> 13 #include <asm/arch/device.h> 14 #include <asm/arch/tnc.h> 15 #include <asm/fsp/fsp_support.h> 16 #include <asm/processor.h> 17 18 static int __maybe_unused disable_igd(void) 19 { 20 struct udevice *igd, *sdvo; 21 int ret; 22 23 ret = dm_pci_bus_find_bdf(TNC_IGD, &igd); 24 if (ret) 25 return ret; 26 if (!igd) 27 return 0; 28 29 ret = dm_pci_bus_find_bdf(TNC_SDVO, &sdvo); 30 if (ret) 31 return ret; 32 if (!sdvo) 33 return 0; 34 35 /* 36 * According to Atom E6xx datasheet, setting VGA Disable (bit17) 37 * of Graphics Controller register (offset 0x50) prevents IGD 38 * (D2:F0) from reporting itself as a VGA display controller 39 * class in the PCI configuration space, and should also prevent 40 * it from responding to VGA legacy memory range and I/O addresses. 41 * 42 * However test result shows that with just VGA Disable bit set and 43 * a PCIe graphics card connected to one of the PCIe controllers on 44 * the E6xx, accessing the VGA legacy space still causes system hang. 45 * After a number of attempts, it turns out besides VGA Disable bit, 46 * the SDVO (D3:F0) device should be disabled to make it work. 47 * 48 * To simplify, use the Function Disable register (offset 0xc4) 49 * to disable both IGD (D2:F0) and SDVO (D3:F0) devices. Now these 50 * two devices will be completely disabled (invisible in the PCI 51 * configuration space) unless a system reset is performed. 52 */ 53 dm_pci_write_config32(igd, IGD_FD, FUNC_DISABLE); 54 dm_pci_write_config32(sdvo, IGD_FD, FUNC_DISABLE); 55 56 return 0; 57 } 58 59 int arch_cpu_init(void) 60 { 61 int ret; 62 63 post_code(POST_CPU_INIT); 64 65 ret = x86_cpu_init_f(); 66 if (ret) 67 return ret; 68 69 return 0; 70 } 71 72 int arch_early_init_r(void) 73 { 74 int ret = 0; 75 76 #ifdef CONFIG_DISABLE_IGD 77 ret = disable_igd(); 78 #endif 79 80 return ret; 81 } 82