1 /* 2 * Copyright (c) 2014 Google, Inc 3 * (C) Copyright 2008 4 * Graeme Russ, graeme.russ@gmail.com. 5 * 6 * Some portions from coreboot src/mainboard/google/link/romstage.c 7 * Copyright (C) 2007-2010 coresystems GmbH 8 * Copyright (C) 2011 Google Inc. 9 * 10 * SPDX-License-Identifier: GPL-2.0 11 */ 12 13 #include <common.h> 14 #include <asm/cpu.h> 15 #include <asm/pci.h> 16 #include <asm/post.h> 17 #include <asm/processor.h> 18 19 DECLARE_GLOBAL_DATA_PTR; 20 21 int arch_cpu_init(void) 22 { 23 struct pci_controller *hose; 24 int ret; 25 26 post_code(POST_CPU_INIT); 27 timer_set_base(rdtsc()); 28 29 ret = x86_cpu_init_f(); 30 if (ret) 31 return ret; 32 33 ret = pci_early_init_hose(&hose); 34 if (ret) 35 return ret; 36 37 return 0; 38 } 39 40 int print_cpuinfo(void) 41 { 42 char processor_name[CPU_MAX_NAME_LEN]; 43 const char *name; 44 45 /* Print processor name */ 46 name = cpu_get_name(processor_name); 47 printf("CPU: %s\n", name); 48 49 return 0; 50 } 51