xref: /rk3399_rockchip-uboot/arch/powerpc/include/asm/fsl_liodn.h (revision 8d3eaa970968d744771948a7188b07cb7ea4ea8a)
1db977abfSKumar Gala /*
224995d82SHaiying Wang  * Copyright 2009-2011 Freescale Semiconductor, Inc.
3db977abfSKumar Gala  *
41a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
5db977abfSKumar Gala  */
6db977abfSKumar Gala 
7db977abfSKumar Gala #ifndef _FSL_LIODN_H_
8db977abfSKumar Gala #define _FSL_LIODN_H_
9db977abfSKumar Gala 
10db977abfSKumar Gala #include <asm/types.h>
11db977abfSKumar Gala 
121a0c6421SKumar Gala struct srio_liodn_id_table {
131a0c6421SKumar Gala 	u32 id[2];
141a0c6421SKumar Gala 	unsigned long reg_offset[2];
151a0c6421SKumar Gala 	u8 num_ids;
161a0c6421SKumar Gala 	u8 portid;
171a0c6421SKumar Gala };
181a0c6421SKumar Gala #define SET_SRIO_LIODN_1(port, idA) \
191a0c6421SKumar Gala 	{ .id = { idA }, .num_ids = 1, .portid = port, \
201a0c6421SKumar Gala 	  .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
211a0c6421SKumar Gala 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
221a0c6421SKumar Gala 	}
231a0c6421SKumar Gala 
241a0c6421SKumar Gala #define SET_SRIO_LIODN_2(port, idA, idB) \
251a0c6421SKumar Gala 	{ .id = { idA, idB }, .num_ids = 2, .portid = port, \
261a0c6421SKumar Gala 	  .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
271a0c6421SKumar Gala 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
281a0c6421SKumar Gala 	  .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
291a0c6421SKumar Gala 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
301a0c6421SKumar Gala 	}
311a0c6421SKumar Gala 
32b3831020SLiu Gang #define SET_SRIO_LIODN_BASE(port, id_a) \
33b3831020SLiu Gang 	{ .id = { id_a }, .num_ids = 1, .portid = port, \
34b3831020SLiu Gang 	  .reg_offset[0] = offsetof(struct ccsr_rio, liodn) \
35b3831020SLiu Gang 		+ (port - 1) * 0x200 \
36b3831020SLiu Gang 		+ CONFIG_SYS_FSL_SRIO_ADDR, \
37b3831020SLiu Gang 	}
38b3831020SLiu Gang 
39db977abfSKumar Gala struct liodn_id_table {
40db977abfSKumar Gala 	const char * compat;
41db977abfSKumar Gala 	u32 id[2];
42db977abfSKumar Gala 	u8 num_ids;
43db977abfSKumar Gala 	phys_addr_t compat_offset;
44db977abfSKumar Gala 	unsigned long reg_offset;
45db977abfSKumar Gala };
46db977abfSKumar Gala 
47db977abfSKumar Gala extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
48db977abfSKumar Gala extern void set_liodns(void);
49db977abfSKumar Gala extern void fdt_fixup_liodn(void *blob);
50db977abfSKumar Gala 
51db977abfSKumar Gala #define SET_LIODN_BASE_1(idA) \
52db977abfSKumar Gala 	{ .id = { idA }, .num_ids = 1, }
53db977abfSKumar Gala 
54db977abfSKumar Gala #define SET_LIODN_BASE_2(idA, idB) \
55db977abfSKumar Gala 	{ .id = { idA, idB }, .num_ids = 2 }
56db977abfSKumar Gala 
57db977abfSKumar Gala #define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \
58db977abfSKumar Gala 	{ .compat = name, \
59db977abfSKumar Gala 	  .id = { idA }, .num_ids = 1, \
60db977abfSKumar Gala 	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
61db977abfSKumar Gala 	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
62db977abfSKumar Gala 	}
63db977abfSKumar Gala 
64db977abfSKumar Gala #define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \
65db977abfSKumar Gala 	{ .compat = name, \
66db977abfSKumar Gala 	  .id = { idA, idB }, .num_ids = 2, \
67db977abfSKumar Gala 	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
68db977abfSKumar Gala 	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
69db977abfSKumar Gala 	}
70db977abfSKumar Gala 
71db977abfSKumar Gala #define SET_GUTS_LIODN(compat, liodn, name, compatoff) \
72db977abfSKumar Gala 	SET_LIODN_ENTRY_1(compat, liodn, \
73db977abfSKumar Gala 		offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
74db977abfSKumar Gala 		compatoff)
75db977abfSKumar Gala 
76db977abfSKumar Gala #define SET_USB_LIODN(usbNum, compat, liodn) \
77db977abfSKumar Gala 	SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\
78db977abfSKumar Gala 		CONFIG_SYS_MPC85xx_USB##usbNum##_OFFSET)
79db977abfSKumar Gala 
80db977abfSKumar Gala #define SET_SATA_LIODN(sataNum, liodn) \
81db977abfSKumar Gala 	SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\
82db977abfSKumar Gala 		CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET)
83db977abfSKumar Gala 
8433e68354SLaurentiu TUDOR #define SET_PCI_LIODN(compat, pciNum, liodn) \
8533e68354SLaurentiu TUDOR 	SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
86db977abfSKumar Gala 		CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
87db977abfSKumar Gala 
88e389a377SLaurentiu Tudor #define SET_PCI_LIODN_BASE(compat, pciNum, liodn) \
89e389a377SLaurentiu Tudor 	SET_LIODN_ENTRY_1(compat, liodn,\
90e389a377SLaurentiu Tudor 		offsetof(ccsr_pcix_t, liodn_base) + CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET,\
91e389a377SLaurentiu Tudor 		CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
92e389a377SLaurentiu Tudor 
93db977abfSKumar Gala /* reg nodes for DMA start @ 0x300 */
94*8d3eaa97STudor Laurentiu #define SET_DMA_LIODN(dmaNum, compat, liodn) \
95*8d3eaa97STudor Laurentiu 	SET_GUTS_LIODN(compat, liodn, dma##dmaNum##liodnr,\
96db977abfSKumar Gala 		CONFIG_SYS_MPC85xx_DMA##dmaNum##_OFFSET + 0x300)
97db977abfSKumar Gala 
98db977abfSKumar Gala #define SET_SDHC_LIODN(sdhcNum, liodn) \
99db977abfSKumar Gala 	SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
100db977abfSKumar Gala 		CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
101db977abfSKumar Gala 
1022a44efebSZhao Qiang #define SET_QE_LIODN(liodn) \
1032a44efebSZhao Qiang 	SET_GUTS_LIODN("fsl,qe", liodn, qeliodnr,\
1042a44efebSZhao Qiang 		CONFIG_SYS_MPC85xx_QE_OFFSET)
1052a44efebSZhao Qiang 
106377ffcfaSSandeep Singh #define SET_TDM_LIODN(liodn) \
107377ffcfaSSandeep Singh 	SET_GUTS_LIODN("fsl,tdm1.0", liodn, tdmliodnr,\
108377ffcfaSSandeep Singh 		CONFIG_SYS_MPC85xx_TDM_OFFSET)
109377ffcfaSSandeep Singh 
110db977abfSKumar Gala #define SET_QMAN_LIODN(liodn) \
111db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
11224995d82SHaiying Wang 		CONFIG_SYS_FSL_QMAN_OFFSET, \
11324995d82SHaiying Wang 		CONFIG_SYS_FSL_QMAN_OFFSET)
114db977abfSKumar Gala 
115db977abfSKumar Gala #define SET_BMAN_LIODN(liodn) \
116db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,bman", liodn, offsetof(ccsr_bman_t, liodnr) + \
11724995d82SHaiying Wang 		CONFIG_SYS_FSL_BMAN_OFFSET, \
11824995d82SHaiying Wang 		CONFIG_SYS_FSL_BMAN_OFFSET)
119db977abfSKumar Gala 
120db977abfSKumar Gala #define SET_PME_LIODN(liodn) \
121db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
122db977abfSKumar Gala 		CONFIG_SYS_FSL_CORENET_PME_OFFSET, \
123db977abfSKumar Gala 		CONFIG_SYS_FSL_CORENET_PME_OFFSET)
124db977abfSKumar Gala 
125f311838dSAndy Fleming #define SET_PMAN_LIODN(num, liodn) \
126f311838dSAndy Fleming 	SET_LIODN_ENTRY_2("fsl,pman", liodn, 0, \
127f311838dSAndy Fleming 		offsetof(struct ccsr_pman, ppa1) + \
128f311838dSAndy Fleming 		CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET, \
129f311838dSAndy Fleming 		CONFIG_SYS_FSL_CORENET_PMAN##num##_OFFSET)
130f311838dSAndy Fleming 
131db977abfSKumar Gala /* -1 from portID due to how immap has the registers */
132db977abfSKumar Gala #define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \
133db977abfSKumar Gala 	CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
134db977abfSKumar Gala 	offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])
135db977abfSKumar Gala 
136db977abfSKumar Gala /* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
137db977abfSKumar Gala #define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
138db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,fman-port-1g-rx", liodn, \
139db977abfSKumar Gala 		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
140db977abfSKumar Gala 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \
141db977abfSKumar Gala 
142db977abfSKumar Gala /* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
143db977abfSKumar Gala #define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
144db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
145db977abfSKumar Gala 		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
146db977abfSKumar Gala 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) \
147db977abfSKumar Gala 
148416202f6SKim Phillips /*
149416202f6SKim Phillips  * handle both old and new versioned SEC properties:
150416202f6SKim Phillips  * "fsl,secX.Y" became "fsl,sec-vX.Y" during development
151416202f6SKim Phillips  */
152ed062e0fSKumar Gala #define SET_SEC_JR_LIODN_ENTRY(jrNum, liodnA, liodnB) \
153ed062e0fSKumar Gala 	SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB,\
154ed062e0fSKumar Gala 		offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
155db977abfSKumar Gala 		CONFIG_SYS_FSL_SEC_OFFSET, \
156416202f6SKim Phillips 		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum), \
157416202f6SKim Phillips 	SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\
158416202f6SKim Phillips 		offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
159416202f6SKim Phillips 		CONFIG_SYS_FSL_SEC_OFFSET, \
160ed062e0fSKumar Gala 		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum)
161db977abfSKumar Gala 
162db977abfSKumar Gala /* This is a bit evil since we treat rtic param as both a string & hex value */
163db977abfSKumar Gala #define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \
164db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \
165db977abfSKumar Gala 		liodnA,	\
166db977abfSKumar Gala 		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
167db977abfSKumar Gala 		CONFIG_SYS_FSL_SEC_OFFSET, \
168416202f6SKim Phillips 		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
169416202f6SKim Phillips 	SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \
170416202f6SKim Phillips 		liodnA,	\
171416202f6SKim Phillips 		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
172416202f6SKim Phillips 		CONFIG_SYS_FSL_SEC_OFFSET, \
173db977abfSKumar Gala 		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
174db977abfSKumar Gala 
175db977abfSKumar Gala #define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \
176db977abfSKumar Gala 	SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \
177db977abfSKumar Gala 		offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
178db977abfSKumar Gala 		CONFIG_SYS_FSL_SEC_OFFSET, 0)
179db977abfSKumar Gala 
1806b3a8d00SKumar Gala #define SET_RAID_ENGINE_JQ_LIODN_ENTRY(jqNum, rNum, liodnA) \
1816b3a8d00SKumar Gala 	SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \
1826b3a8d00SKumar Gala 	liodnA, \
1836b3a8d00SKumar Gala 	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
1846b3a8d00SKumar Gala 	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET, \
1856b3a8d00SKumar Gala 	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \
1866b3a8d00SKumar Gala 	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
1876b3a8d00SKumar Gala 
1884d28db8aSKumar Gala #define SET_RMAN_LIODN(ibNum, liodn) \
1894d28db8aSKumar Gala 	SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \
1904d28db8aSKumar Gala 		offsetof(struct ccsr_rman, mmitdr) + \
1914d28db8aSKumar Gala 		CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \
1924d28db8aSKumar Gala 		CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000)
1934d28db8aSKumar Gala 
194db977abfSKumar Gala extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
1956b3a8d00SKumar Gala extern struct liodn_id_table raide_liodn_tbl[];
196db977abfSKumar Gala extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
197fd946040STimur Tabi #ifdef CONFIG_SYS_SRIO
1981a0c6421SKumar Gala extern struct srio_liodn_id_table srio_liodn_tbl[];
199fd946040STimur Tabi extern int srio_liodn_tbl_sz;
200fd946040STimur Tabi #endif
2014d28db8aSKumar Gala extern struct liodn_id_table rman_liodn_tbl[];
2026b3a8d00SKumar Gala extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
203db977abfSKumar Gala extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
2044d28db8aSKumar Gala extern int rman_liodn_tbl_sz;
205db977abfSKumar Gala 
206db977abfSKumar Gala #endif
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