xref: /rk3399_rockchip-uboot/arch/powerpc/include/asm/fsl_liodn.h (revision 1a0c64219df1fe4f8c40ed2ecaa0da1b4e0e26f7)
1db977abfSKumar Gala /*
224995d82SHaiying Wang  * Copyright 2009-2011 Freescale Semiconductor, Inc.
3db977abfSKumar Gala  *
4db977abfSKumar Gala  * See file CREDITS for list of people who contributed to this
5db977abfSKumar Gala  * project.
6db977abfSKumar Gala  *
7db977abfSKumar Gala  * This program is free software; you can redistribute it and/or
8db977abfSKumar Gala  * modify it under the terms of the GNU General Public License as
9db977abfSKumar Gala  * published by the Free Software Foundation; either version 2 of
10db977abfSKumar Gala  * the License, or (at your option) any later version.
11db977abfSKumar Gala  *
12db977abfSKumar Gala  * This program is distributed in the hope that it will be useful,
13db977abfSKumar Gala  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14db977abfSKumar Gala  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15db977abfSKumar Gala  * GNU General Public License for more details.
16db977abfSKumar Gala  *
17db977abfSKumar Gala  * You should have received a copy of the GNU General Public License
18db977abfSKumar Gala  * along with this program; if not, write to the Free Software
19db977abfSKumar Gala  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
20db977abfSKumar Gala  * MA 02111-1307 USA
21db977abfSKumar Gala  */
22db977abfSKumar Gala 
23db977abfSKumar Gala #ifndef _FSL_LIODN_H_
24db977abfSKumar Gala #define _FSL_LIODN_H_
25db977abfSKumar Gala 
26db977abfSKumar Gala #include <asm/types.h>
27db977abfSKumar Gala 
28*1a0c6421SKumar Gala struct srio_liodn_id_table {
29*1a0c6421SKumar Gala 	u32 id[2];
30*1a0c6421SKumar Gala 	unsigned long reg_offset[2];
31*1a0c6421SKumar Gala 	u8 num_ids;
32*1a0c6421SKumar Gala 	u8 portid;
33*1a0c6421SKumar Gala };
34*1a0c6421SKumar Gala #define SET_SRIO_LIODN_1(port, idA) \
35*1a0c6421SKumar Gala 	{ .id = { idA }, .num_ids = 1, .portid = port, \
36*1a0c6421SKumar Gala 	  .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
37*1a0c6421SKumar Gala 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
38*1a0c6421SKumar Gala 	}
39*1a0c6421SKumar Gala 
40*1a0c6421SKumar Gala #define SET_SRIO_LIODN_2(port, idA, idB) \
41*1a0c6421SKumar Gala 	{ .id = { idA, idB }, .num_ids = 2, .portid = port, \
42*1a0c6421SKumar Gala 	  .reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
43*1a0c6421SKumar Gala 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
44*1a0c6421SKumar Gala 	  .reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
45*1a0c6421SKumar Gala 		+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
46*1a0c6421SKumar Gala 	}
47*1a0c6421SKumar Gala 
48db977abfSKumar Gala struct liodn_id_table {
49db977abfSKumar Gala 	const char * compat;
50db977abfSKumar Gala 	u32 id[2];
51db977abfSKumar Gala 	u8 num_ids;
52db977abfSKumar Gala 	phys_addr_t compat_offset;
53db977abfSKumar Gala 	unsigned long reg_offset;
54db977abfSKumar Gala };
55db977abfSKumar Gala 
56db977abfSKumar Gala extern u32 get_ppid_liodn(int ppid_tbl_idx, int ppid);
57db977abfSKumar Gala extern void set_liodns(void);
58db977abfSKumar Gala extern void fdt_fixup_liodn(void *blob);
59db977abfSKumar Gala 
60db977abfSKumar Gala #define SET_LIODN_BASE_1(idA) \
61db977abfSKumar Gala 	{ .id = { idA }, .num_ids = 1, }
62db977abfSKumar Gala 
63db977abfSKumar Gala #define SET_LIODN_BASE_2(idA, idB) \
64db977abfSKumar Gala 	{ .id = { idA, idB }, .num_ids = 2 }
65db977abfSKumar Gala 
66db977abfSKumar Gala #define SET_LIODN_ENTRY_1(name, idA, off, compatoff) \
67db977abfSKumar Gala 	{ .compat = name, \
68db977abfSKumar Gala 	  .id = { idA }, .num_ids = 1, \
69db977abfSKumar Gala 	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
70db977abfSKumar Gala 	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
71db977abfSKumar Gala 	}
72db977abfSKumar Gala 
73db977abfSKumar Gala #define SET_LIODN_ENTRY_2(name, idA, idB, off, compatoff) \
74db977abfSKumar Gala 	{ .compat = name, \
75db977abfSKumar Gala 	  .id = { idA, idB }, .num_ids = 2, \
76db977abfSKumar Gala 	  .reg_offset = off + CONFIG_SYS_CCSRBAR, \
77db977abfSKumar Gala 	  .compat_offset = compatoff + CONFIG_SYS_CCSRBAR_PHYS, \
78db977abfSKumar Gala 	}
79db977abfSKumar Gala 
80db977abfSKumar Gala #define SET_GUTS_LIODN(compat, liodn, name, compatoff) \
81db977abfSKumar Gala 	SET_LIODN_ENTRY_1(compat, liodn, \
82db977abfSKumar Gala 		offsetof(ccsr_gur_t, name) + CONFIG_SYS_MPC85xx_GUTS_OFFSET, \
83db977abfSKumar Gala 		compatoff)
84db977abfSKumar Gala 
85db977abfSKumar Gala #define SET_USB_LIODN(usbNum, compat, liodn) \
86db977abfSKumar Gala 	SET_GUTS_LIODN(compat, liodn, usb##usbNum##liodnr,\
87db977abfSKumar Gala 		CONFIG_SYS_MPC85xx_USB##usbNum##_OFFSET)
88db977abfSKumar Gala 
89db977abfSKumar Gala #define SET_SATA_LIODN(sataNum, liodn) \
90db977abfSKumar Gala 	SET_GUTS_LIODN("fsl,pq-sata-v2", liodn, sata##sataNum##liodnr,\
91db977abfSKumar Gala 		CONFIG_SYS_MPC85xx_SATA##sataNum##_OFFSET)
92db977abfSKumar Gala 
9333e68354SLaurentiu TUDOR #define SET_PCI_LIODN(compat, pciNum, liodn) \
9433e68354SLaurentiu TUDOR 	SET_GUTS_LIODN(compat, liodn, pex##pciNum##liodnr,\
95db977abfSKumar Gala 		CONFIG_SYS_MPC85xx_PCIE##pciNum##_OFFSET)
96db977abfSKumar Gala 
97db977abfSKumar Gala /* reg nodes for DMA start @ 0x300 */
98db977abfSKumar Gala #define SET_DMA_LIODN(dmaNum, liodn) \
99db977abfSKumar Gala 	SET_GUTS_LIODN("fsl,eloplus-dma", liodn, dma##dmaNum##liodnr,\
100db977abfSKumar Gala 		CONFIG_SYS_MPC85xx_DMA##dmaNum##_OFFSET + 0x300)
101db977abfSKumar Gala 
102db977abfSKumar Gala #define SET_SDHC_LIODN(sdhcNum, liodn) \
103db977abfSKumar Gala 	SET_GUTS_LIODN("fsl,esdhc", liodn, sdmmc##sdhcNum##liodnr,\
104db977abfSKumar Gala 		CONFIG_SYS_MPC85xx_ESDHC_OFFSET)
105db977abfSKumar Gala 
106db977abfSKumar Gala #define SET_QMAN_LIODN(liodn) \
107db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,qman", liodn, offsetof(ccsr_qman_t, liodnr) + \
10824995d82SHaiying Wang 		CONFIG_SYS_FSL_QMAN_OFFSET, \
10924995d82SHaiying Wang 		CONFIG_SYS_FSL_QMAN_OFFSET)
110db977abfSKumar Gala 
111db977abfSKumar Gala #define SET_BMAN_LIODN(liodn) \
112db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,bman", liodn, offsetof(ccsr_bman_t, liodnr) + \
11324995d82SHaiying Wang 		CONFIG_SYS_FSL_BMAN_OFFSET, \
11424995d82SHaiying Wang 		CONFIG_SYS_FSL_BMAN_OFFSET)
115db977abfSKumar Gala 
116db977abfSKumar Gala #define SET_PME_LIODN(liodn) \
117db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,pme", liodn, offsetof(ccsr_pme_t, liodnr) + \
118db977abfSKumar Gala 		CONFIG_SYS_FSL_CORENET_PME_OFFSET, \
119db977abfSKumar Gala 		CONFIG_SYS_FSL_CORENET_PME_OFFSET)
120db977abfSKumar Gala 
121db977abfSKumar Gala /* -1 from portID due to how immap has the registers */
122db977abfSKumar Gala #define FM_PPID_RX_PORT_OFFSET(fmNum, portID) \
123db977abfSKumar Gala 	CONFIG_SYS_FSL_FM##fmNum##_OFFSET + \
124db977abfSKumar Gala 	offsetof(struct ccsr_fman, fm_bmi_common.fmbm_ppid[portID - 1])
125db977abfSKumar Gala 
126db977abfSKumar Gala /* enetNum is 0, 1, 2... so we + 8 for 1g to get to HW Port ID */
127db977abfSKumar Gala #define SET_FMAN_RX_1G_LIODN(fmNum, enetNum, liodn) \
128db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,fman-port-1g-rx", liodn, \
129db977abfSKumar Gala 		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 8), \
130db977abfSKumar Gala 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_1G_OFFSET) \
131db977abfSKumar Gala 
132db977abfSKumar Gala /* enetNum is 0, 1, 2... so we + 16 for 10g to get to HW Port ID */
133db977abfSKumar Gala #define SET_FMAN_RX_10G_LIODN(fmNum, enetNum, liodn) \
134db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,fman-port-10g-rx", liodn, \
135db977abfSKumar Gala 		FM_PPID_RX_PORT_OFFSET(fmNum, enetNum + 16), \
136db977abfSKumar Gala 		CONFIG_SYS_FSL_FM##fmNum##_RX##enetNum##_10G_OFFSET) \
137db977abfSKumar Gala 
138416202f6SKim Phillips /*
139416202f6SKim Phillips  * handle both old and new versioned SEC properties:
140416202f6SKim Phillips  * "fsl,secX.Y" became "fsl,sec-vX.Y" during development
141416202f6SKim Phillips  */
142ed062e0fSKumar Gala #define SET_SEC_JR_LIODN_ENTRY(jrNum, liodnA, liodnB) \
143ed062e0fSKumar Gala 	SET_LIODN_ENTRY_2("fsl,sec4.0-job-ring", liodnA, liodnB,\
144ed062e0fSKumar Gala 		offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
145db977abfSKumar Gala 		CONFIG_SYS_FSL_SEC_OFFSET, \
146416202f6SKim Phillips 		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum), \
147416202f6SKim Phillips 	SET_LIODN_ENTRY_2("fsl,sec-v4.0-job-ring", liodnA, liodnB,\
148416202f6SKim Phillips 		offsetof(ccsr_sec_t, jrliodnr[jrNum].ls) + \
149416202f6SKim Phillips 		CONFIG_SYS_FSL_SEC_OFFSET, \
150ed062e0fSKumar Gala 		CONFIG_SYS_FSL_SEC_OFFSET + 0x1000 + 0x1000 * jrNum)
151db977abfSKumar Gala 
152db977abfSKumar Gala /* This is a bit evil since we treat rtic param as both a string & hex value */
153db977abfSKumar Gala #define SET_SEC_RTIC_LIODN_ENTRY(rtic, liodnA) \
154db977abfSKumar Gala 	SET_LIODN_ENTRY_1("fsl,sec4.0-rtic-memory", \
155db977abfSKumar Gala 		liodnA,	\
156db977abfSKumar Gala 		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
157db977abfSKumar Gala 		CONFIG_SYS_FSL_SEC_OFFSET, \
158416202f6SKim Phillips 		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa)), \
159416202f6SKim Phillips 	SET_LIODN_ENTRY_1("fsl,sec-v4.0-rtic-memory", \
160416202f6SKim Phillips 		liodnA,	\
161416202f6SKim Phillips 		offsetof(ccsr_sec_t, rticliodnr[0x##rtic-0xa].ls) + \
162416202f6SKim Phillips 		CONFIG_SYS_FSL_SEC_OFFSET, \
163db977abfSKumar Gala 		CONFIG_SYS_FSL_SEC_OFFSET + 0x6100 + 0x20 * (0x##rtic-0xa))
164db977abfSKumar Gala 
165db977abfSKumar Gala #define SET_SEC_DECO_LIODN_ENTRY(num, liodnA, liodnB) \
166db977abfSKumar Gala 	SET_LIODN_ENTRY_2(NULL, liodnA, liodnB, \
167db977abfSKumar Gala 		offsetof(ccsr_sec_t, decoliodnr[num].ls) + \
168db977abfSKumar Gala 		CONFIG_SYS_FSL_SEC_OFFSET, 0)
169db977abfSKumar Gala 
1706b3a8d00SKumar Gala #define SET_RAID_ENGINE_JQ_LIODN_ENTRY(jqNum, rNum, liodnA) \
1716b3a8d00SKumar Gala 	SET_LIODN_ENTRY_1("fsl,raideng-v1.0-job-ring", \
1726b3a8d00SKumar Gala 	liodnA, \
1736b3a8d00SKumar Gala 	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg1) + \
1746b3a8d00SKumar Gala 	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET, \
1756b3a8d00SKumar Gala 	offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \
1766b3a8d00SKumar Gala 	CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
1776b3a8d00SKumar Gala 
178db977abfSKumar Gala extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
1796b3a8d00SKumar Gala extern struct liodn_id_table raide_liodn_tbl[];
180db977abfSKumar Gala extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
181*1a0c6421SKumar Gala extern struct srio_liodn_id_table srio_liodn_tbl[];
1826b3a8d00SKumar Gala extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
183db977abfSKumar Gala extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
184*1a0c6421SKumar Gala extern int srio_liodn_tbl_sz;
185db977abfSKumar Gala 
186db977abfSKumar Gala #endif
187