179ee3448SKumar Gala /* 2d621da00SJerry Huang * Copyright 2010-2011 Freescale Semiconductor, Inc. 379ee3448SKumar Gala * 479ee3448SKumar Gala * See file CREDITS for list of people who contributed to this 579ee3448SKumar Gala * project. 679ee3448SKumar Gala * 779ee3448SKumar Gala * This program is free software; you can redistribute it and/or 879ee3448SKumar Gala * modify it under the terms of the GNU General Public License as 979ee3448SKumar Gala * published by the Free Software Foundation; either version 2 of 1079ee3448SKumar Gala * the License, or (at your option) any later version. 1179ee3448SKumar Gala * 1279ee3448SKumar Gala * This program is distributed in the hope that it will be useful, 1379ee3448SKumar Gala * but WITHOUT ANY WARRANTY; without even the implied warranty of 1479ee3448SKumar Gala * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 1579ee3448SKumar Gala * GNU General Public License for more details. 1679ee3448SKumar Gala * 1779ee3448SKumar Gala * You should have received a copy of the GNU General Public License 1879ee3448SKumar Gala * along with this program; if not, write to the Free Software 1979ee3448SKumar Gala * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 2079ee3448SKumar Gala * MA 02111-1307 USA 2179ee3448SKumar Gala */ 2279ee3448SKumar Gala 2379ee3448SKumar Gala #include <common.h> 2479ee3448SKumar Gala #include <command.h> 2579ee3448SKumar Gala #include <linux/compiler.h> 2679ee3448SKumar Gala #include <asm/processor.h> 2779ee3448SKumar Gala 2879ee3448SKumar Gala static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]) 2979ee3448SKumar Gala { 3057125f22SYork Sun #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 3157125f22SYork Sun extern int enable_cpu_a011_workaround; 3257125f22SYork Sun #endif 3379ee3448SKumar Gala __maybe_unused u32 svr = get_svr(); 3479ee3448SKumar Gala 3579ee3448SKumar Gala #if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001) 3679ee3448SKumar Gala if (IS_SVR_REV(svr, 1, 0)) { 3779ee3448SKumar Gala switch (SVR_SOC_VER(svr)) { 3879ee3448SKumar Gala case SVR_P1013: 3979ee3448SKumar Gala case SVR_P1022: 4079ee3448SKumar Gala puts("Work-around for Erratum SATA A001 enabled\n"); 4179ee3448SKumar Gala } 4279ee3448SKumar Gala } 4379ee3448SKumar Gala #endif 4479ee3448SKumar Gala 4561054ffaSKumar Gala #if defined(CONFIG_SYS_P4080_ERRATUM_SERDES8) 4661054ffaSKumar Gala puts("Work-around for Erratum SERDES8 enabled\n"); 4761054ffaSKumar Gala #endif 48df8af0b4SEmil Medve #if defined(CONFIG_SYS_P4080_ERRATUM_SERDES9) 49df8af0b4SEmil Medve puts("Work-around for Erratum SERDES9 enabled\n"); 50df8af0b4SEmil Medve #endif 51da30b9fdSTimur Tabi #if defined(CONFIG_SYS_P4080_ERRATUM_SERDES_A005) 52da30b9fdSTimur Tabi puts("Work-around for Erratum SERDES-A005 enabled\n"); 53da30b9fdSTimur Tabi #endif 54fd3c9befSKumar Gala #if defined(CONFIG_SYS_P4080_ERRATUM_CPU22) 551e9ea85fSYork Sun if (SVR_MAJ(svr) < 3) 56fd3c9befSKumar Gala puts("Work-around for Erratum CPU22 enabled\n"); 57fd3c9befSKumar Gala #endif 585e23ab0aSYork Sun #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011 595e23ab0aSYork Sun /* 605e23ab0aSYork Sun * NMG_CPU_A011 applies to P4080 rev 1.0, 2.0, fixed in 3.0 615e23ab0aSYork Sun * also applies to P3041 rev 1.0, 1.1, P2041 rev 1.0, 1.1 6257125f22SYork Sun * The SVR has been checked by cpu_init_r(). 635e23ab0aSYork Sun */ 6457125f22SYork Sun if (enable_cpu_a011_workaround) 655e23ab0aSYork Sun puts("Work-around for Erratum CPU-A011 enabled\n"); 665e23ab0aSYork Sun #endif 6743f082bbSKumar Gala #if defined(CONFIG_SYS_FSL_ERRATUM_CPU_A003999) 6843f082bbSKumar Gala puts("Work-around for Erratum CPU-A003999 enabled\n"); 6943f082bbSKumar Gala #endif 704108508aSYork Sun #if defined(CONFIG_SYS_FSL_ERRATUM_DDR_A003474) 714108508aSYork Sun puts("Work-around for Erratum DDR-A003473 enabled\n"); 724108508aSYork Sun #endif 73810c4427SBecky Bruce #if defined(CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN) 74810c4427SBecky Bruce puts("Work-around for DDR MSYNC_IN Erratum enabled\n"); 75810c4427SBecky Bruce #endif 76d621da00SJerry Huang #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC111) 77d621da00SJerry Huang puts("Work-around for Erratum ESDHC111 enabled\n"); 78d621da00SJerry Huang #endif 793b4456ecSRoy Zang #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC135) 803b4456ecSRoy Zang puts("Work-around for Erratum ESDHC135 enabled\n"); 813b4456ecSRoy Zang #endif 82*4e0be34aSZang Roy-R61911 #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC13) 83*4e0be34aSZang Roy-R61911 if (SVR_MAJ(svr) < 3) 84*4e0be34aSZang Roy-R61911 puts("Work-around for Erratum ESDHC13 enabled\n"); 85ae026ffdSRoy Zang #endif 865103a03aSKumar Gala #if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC_A001) 875103a03aSKumar Gala puts("Work-around for Erratum ESDHC-A001 enabled\n"); 885103a03aSKumar Gala #endif 891d2c2a62SKumar Gala #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002 901d2c2a62SKumar Gala puts("Work-around for Erratum CPC-A002 enabled\n"); 911d2c2a62SKumar Gala #endif 92868da593SKumar Gala #ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A003 93868da593SKumar Gala puts("Work-around for Erratum CPC-A003 enabled\n"); 94868da593SKumar Gala #endif 95f133796dSKumar Gala #ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001 96f133796dSKumar Gala puts("Work-around for Erratum ELBC-A001 enabled\n"); 97f133796dSKumar Gala #endif 98fa8d23c0SYork Sun #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003 99fa8d23c0SYork Sun puts("Work-around for Erratum DDR-A003 enabled\n"); 100fa8d23c0SYork Sun #endif 101eb0aff77SYork Sun #ifdef CONFIG_SYS_FSL_ERRATUM_DDR_115 102eb0aff77SYork Sun puts("Work-around for Erratum DDR115 enabled\n"); 103eb0aff77SYork Sun #endif 10491671913SYork Sun #ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134 10591671913SYork Sun puts("Work-around for Erratum DDR111 enabled\n"); 10691671913SYork Sun puts("Work-around for Erratum DDR134 enabled\n"); 10791671913SYork Sun #endif 10842aee64bSPoonam Aggrwal #ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A002769 10942aee64bSPoonam Aggrwal puts("Work-around for Erratum IFC-A002769 enabled\n"); 11042aee64bSPoonam Aggrwal #endif 111fb855f43SPoonam Aggrwal #ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549 112fb855f43SPoonam Aggrwal puts("Work-around for Erratum P1010-A003549 enabled\n"); 113fb855f43SPoonam Aggrwal #endif 114bc6bbd6bSPoonam Aggrwal #ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399 115bc6bbd6bSPoonam Aggrwal puts("Work-around for Erratum IFC A-003399 enabled\n"); 116bc6bbd6bSPoonam Aggrwal #endif 1175ace2992SKumar Gala #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_DDR120 1185ace2992SKumar Gala if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0)) 1195ace2992SKumar Gala puts("Work-around for Erratum NMG DDR120 enabled\n"); 1205ace2992SKumar Gala #endif 1212b3a1cddSKumar Gala #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_LBC103 1222b3a1cddSKumar Gala puts("Work-around for Erratum NMG_LBC103 enabled\n"); 1232b3a1cddSKumar Gala #endif 124aada81deSchenhui zhao #ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129 125aada81deSchenhui zhao if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0)) 126aada81deSchenhui zhao puts("Work-around for Erratum NMG ETSEC129 enabled\n"); 127aada81deSchenhui zhao #endif 12833eee330SScott Wood #ifdef CONFIG_SYS_FSL_ERRATUM_A004510 12933eee330SScott Wood puts("Work-around for Erratum A004510 enabled\n"); 13033eee330SScott Wood #endif 13179ee3448SKumar Gala return 0; 13279ee3448SKumar Gala } 13379ee3448SKumar Gala 13479ee3448SKumar Gala U_BOOT_CMD( 13579ee3448SKumar Gala errata, 1, 0, do_errata, 13679ee3448SKumar Gala "Report errata workarounds", 13779ee3448SKumar Gala "" 13879ee3448SKumar Gala ); 139