xref: /rk3399_rockchip-uboot/arch/arm/mach-rockchip/spl.c (revision 5e8564cf419797f9095431e6eb6f0c00dfa423d2)
1 /*
2  * (C) Copyright 2018 Rockchip Electronics Co., Ltd
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6 
7 #include <common.h>
8 #include <debug_uart.h>
9 #include <dm.h>
10 #include <ram.h>
11 #include <spl.h>
12 #include <asm/arch/bootrom.h>
13 #include <asm/arch/sdram_common.h>
14 #include <asm/arch-rockchip/sys_proto.h>
15 #include <asm/io.h>
16 
17 DECLARE_GLOBAL_DATA_PTR;
18 
19 void board_return_to_bootrom(void)
20 {
21 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
22 }
23 
24 __weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
25 };
26 
27 const char *board_spl_was_booted_from(void)
28 {
29 	u32  bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR);
30 	const char *bootdevice_ofpath = NULL;
31 
32 	if (bootdevice_brom_id < ARRAY_SIZE(boot_devices))
33 		bootdevice_ofpath = boot_devices[bootdevice_brom_id];
34 
35 	if (bootdevice_ofpath)
36 		debug("%s: brom_bootdevice_id %x maps to '%s'\n",
37 		      __func__, bootdevice_brom_id, bootdevice_ofpath);
38 	else
39 		debug("%s: failed to resolve brom_bootdevice_id %x\n",
40 		      __func__, bootdevice_brom_id);
41 
42 	return bootdevice_ofpath;
43 }
44 
45 u32 spl_boot_device(void)
46 {
47 	u32 boot_device = BOOT_DEVICE_MMC1;
48 
49 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \
50 		defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \
51 		defined(CONFIG_TARGET_CHROMEBOOK_MINNIE)
52 	return BOOT_DEVICE_SPI;
53 #endif
54 	if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM))
55 		return BOOT_DEVICE_BOOTROM;
56 
57 	return boot_device;
58 }
59 
60 u32 spl_boot_mode(const u32 boot_device)
61 {
62 	return MMCSD_MODE_RAW;
63 }
64 
65 __weak void rockchip_stimer_init(void)
66 {
67 	/* If Timer already enabled, don't re-init it */
68 	u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
69 	if ( reg & 0x1 )
70 		return;
71 #ifndef CONFIG_ARM64
72 	asm volatile("mcr p15, 0, %0, c14, c0, 0"
73 		     : : "r"(COUNTER_FREQUENCY));
74 #endif
75 	writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
76 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);
77 	writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4);
78 	writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10);
79 }
80 
81 __weak int arch_cpu_init(void)
82 {
83 	return 0;
84 }
85 
86 __weak int rk_board_init_f(void)
87 {
88 	return 0;
89 }
90 
91 #ifndef CONFIG_SPL_LIBGENERIC_SUPPORT
92 void udelay(unsigned long usec)
93 {
94 	__udelay(usec);
95 }
96 
97 void hang(void)
98 {
99 	bootstage_error(BOOTSTAGE_ID_NEED_RESET);
100 	for (;;)
101 		;
102 }
103 
104 /**
105  * memset - Fill a region of memory with the given value
106  * @s: Pointer to the start of the area.
107  * @c: The byte to fill the area with
108  * @count: The size of the area.
109  *
110  * Do not use memset() to access IO space, use memset_io() instead.
111  */
112 void *memset(void *s, int c, size_t count)
113 {
114 	unsigned long *sl = (unsigned long *)s;
115 	char *s8;
116 
117 #if !CONFIG_IS_ENABLED(TINY_MEMSET)
118 	unsigned long cl = 0;
119 	int i;
120 
121 	/* do it one word at a time (32 bits or 64 bits) while possible */
122 	if (((ulong)s & (sizeof(*sl) - 1)) == 0) {
123 		for (i = 0; i < sizeof(*sl); i++) {
124 			cl <<= 8;
125 			cl |= c & 0xff;
126 		}
127 		while (count >= sizeof(*sl)) {
128 			*sl++ = cl;
129 			count -= sizeof(*sl);
130 		}
131 	}
132 #endif /* fill 8 bits at a time */
133 	s8 = (char *)sl;
134 	while (count--)
135 		*s8++ = c;
136 
137 	return s;
138 }
139 #endif
140 
141 void board_init_f(ulong dummy)
142 {
143 #ifdef CONFIG_SPL_FRAMEWORK
144 	int ret;
145 #if !defined(CONFIG_SUPPORT_TPL)
146 	struct udevice *dev;
147 #endif
148 #endif
149 
150 	rockchip_stimer_init();
151 #define EARLY_UART
152 #if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART)
153 	/*
154 	 * Debug UART can be used from here if required:
155 	 *
156 	 * debug_uart_init();
157 	 * printch('a');
158 	 * printhex8(0x1234);
159 	 * printascii("string");
160 	 */
161 	debug_uart_init();
162 	printascii("U-Boot SPL board init");
163 #endif
164 
165 #ifdef CONFIG_SPL_FRAMEWORK
166 	ret = spl_early_init();
167 	if (ret) {
168 		printf("spl_early_init() failed: %d\n", ret);
169 		hang();
170 	}
171 #if !defined(CONFIG_SUPPORT_TPL)
172 	debug("\nspl:init dram\n");
173 	ret = uclass_get_device(UCLASS_RAM, 0, &dev);
174 	if (ret) {
175 		printf("DRAM init failed: %d\n", ret);
176 		return;
177 	}
178 #endif
179 	preloader_console_init();
180 #else
181 	/* Some SoCs like rk3036 does not use any frame work */
182 	sdram_init();
183 #endif
184 
185 	arch_cpu_init();
186 	rk_board_init_f();
187 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT)
188 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
189 #endif
190 
191 }
192 
193 #ifdef CONFIG_SPL_LOAD_FIT
194 int board_fit_config_name_match(const char *name)
195 {
196 	/* Just empty function now - can't decide what to choose */
197 	debug("%s: %s\n", __func__, name);
198 
199 	return 0;
200 }
201 #endif
202 
203 #ifdef CONFIG_SPL_BOARD_INIT
204 __weak int rk_spl_board_init(void)
205 {
206 	return 0;
207 }
208 
209 static int setup_led(void)
210 {
211 #ifdef CONFIG_SPL_LED
212 	struct udevice *dev;
213 	char *led_name;
214 	int ret;
215 
216 	led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
217 	if (!led_name)
218 		return 0;
219 	ret = led_get_by_label(led_name, &dev);
220 	if (ret) {
221 		debug("%s: get=%d\n", __func__, ret);
222 		return ret;
223 	}
224 	ret = led_set_on(dev, 1);
225 	if (ret)
226 		return ret;
227 #endif
228 
229 	return 0;
230 }
231 
232 void spl_board_init(void)
233 {
234 	int ret;
235 
236 	ret = setup_led();
237 
238 	if (ret) {
239 		debug("LED ret=%d\n", ret);
240 		hang();
241 	}
242 
243 	rk_spl_board_init();
244 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)
245 	back_to_bootrom(BROM_BOOT_NEXTSTAGE);
246 #endif
247 	return;
248 }
249 #endif
250