1 /* 2 * (C) Copyright 2018 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #include <common.h> 8 #include <boot_rkimg.h> 9 #include <debug_uart.h> 10 #include <dm.h> 11 #include <key.h> 12 #include <led.h> 13 #include <misc.h> 14 #include <ram.h> 15 #include <spl.h> 16 #include <optee_include/OpteeClientInterface.h> 17 #include <asm/arch/bootrom.h> 18 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 19 #include <asm/arch/rk_atags.h> 20 #endif 21 #include <asm/arch/sdram.h> 22 #include <asm/arch/boot_mode.h> 23 #include <asm/arch-rockchip/sys_proto.h> 24 #include <asm/io.h> 25 26 DECLARE_GLOBAL_DATA_PTR; 27 28 void board_return_to_bootrom(void) 29 { 30 back_to_bootrom(BROM_BOOT_NEXTSTAGE); 31 } 32 33 __weak const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = { 34 }; 35 36 const char *board_spl_was_booted_from(void) 37 { 38 u32 bootdevice_brom_id = readl(BROM_BOOTSOURCE_ID_ADDR); 39 const char *bootdevice_ofpath = NULL; 40 41 if (bootdevice_brom_id < ARRAY_SIZE(boot_devices)) 42 bootdevice_ofpath = boot_devices[bootdevice_brom_id]; 43 44 if (bootdevice_ofpath) 45 debug("%s: brom_bootdevice_id %x maps to '%s'\n", 46 __func__, bootdevice_brom_id, bootdevice_ofpath); 47 else 48 debug("%s: failed to resolve brom_bootdevice_id %x\n", 49 __func__, bootdevice_brom_id); 50 51 return bootdevice_ofpath; 52 } 53 54 u32 spl_boot_device(void) 55 { 56 u32 boot_device = BOOT_DEVICE_MMC1; 57 58 #if defined(CONFIG_TARGET_CHROMEBOOK_JERRY) || \ 59 defined(CONFIG_TARGET_CHROMEBIT_MICKEY) || \ 60 defined(CONFIG_TARGET_CHROMEBOOK_MINNIE) 61 return BOOT_DEVICE_SPI; 62 #endif 63 if (CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM)) 64 return BOOT_DEVICE_BOOTROM; 65 66 return boot_device; 67 } 68 69 u32 spl_boot_mode(const u32 boot_device) 70 { 71 return MMCSD_MODE_RAW; 72 } 73 74 __weak void rockchip_stimer_init(void) 75 { 76 /* If Timer already enabled, don't re-init it */ 77 u32 reg = readl(CONFIG_ROCKCHIP_STIMER_BASE + 0x10); 78 if ( reg & 0x1 ) 79 return; 80 #ifndef CONFIG_ARM64 81 asm volatile("mcr p15, 0, %0, c14, c0, 0" 82 : : "r"(COUNTER_FREQUENCY)); 83 #endif 84 writel(0, CONFIG_ROCKCHIP_STIMER_BASE + 0x10); 85 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); 86 writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE + 4); 87 writel(1, CONFIG_ROCKCHIP_STIMER_BASE + 0x10); 88 } 89 90 __weak int arch_cpu_init(void) 91 { 92 return 0; 93 } 94 95 __weak int rk_board_init_f(void) 96 { 97 return 0; 98 } 99 100 #ifndef CONFIG_SPL_LIBGENERIC_SUPPORT 101 void udelay(unsigned long usec) 102 { 103 __udelay(usec); 104 } 105 106 void hang(void) 107 { 108 bootstage_error(BOOTSTAGE_ID_NEED_RESET); 109 for (;;) 110 ; 111 } 112 113 /** 114 * memset - Fill a region of memory with the given value 115 * @s: Pointer to the start of the area. 116 * @c: The byte to fill the area with 117 * @count: The size of the area. 118 * 119 * Do not use memset() to access IO space, use memset_io() instead. 120 */ 121 void *memset(void *s, int c, size_t count) 122 { 123 unsigned long *sl = (unsigned long *)s; 124 char *s8; 125 126 #if !CONFIG_IS_ENABLED(TINY_MEMSET) 127 unsigned long cl = 0; 128 int i; 129 130 /* do it one word at a time (32 bits or 64 bits) while possible */ 131 if (((ulong)s & (sizeof(*sl) - 1)) == 0) { 132 for (i = 0; i < sizeof(*sl); i++) { 133 cl <<= 8; 134 cl |= c & 0xff; 135 } 136 while (count >= sizeof(*sl)) { 137 *sl++ = cl; 138 count -= sizeof(*sl); 139 } 140 } 141 #endif /* fill 8 bits at a time */ 142 s8 = (char *)sl; 143 while (count--) 144 *s8++ = c; 145 146 return s; 147 } 148 #endif 149 150 void board_init_f(ulong dummy) 151 { 152 #ifdef CONFIG_SPL_FRAMEWORK 153 int ret; 154 #if !defined(CONFIG_SUPPORT_TPL) 155 struct udevice *dev; 156 #endif 157 #endif 158 159 rockchip_stimer_init(); 160 #define EARLY_UART 161 #if defined(EARLY_UART) && defined(CONFIG_DEBUG_UART) 162 /* 163 * Debug UART can be used from here if required: 164 * 165 * debug_uart_init(); 166 * printch('a'); 167 * printhex8(0x1234); 168 * printascii("string"); 169 */ 170 debug_uart_init(); 171 printascii("U-Boot SPL board init"); 172 #endif 173 gd->sys_start_tick = get_ticks(); 174 #ifdef CONFIG_SPL_FRAMEWORK 175 ret = spl_early_init(); 176 if (ret) { 177 printf("spl_early_init() failed: %d\n", ret); 178 hang(); 179 } 180 #if !defined(CONFIG_SUPPORT_TPL) 181 debug("\nspl:init dram\n"); 182 ret = uclass_get_device(UCLASS_RAM, 0, &dev); 183 if (ret) { 184 printf("DRAM init failed: %d\n", ret); 185 return; 186 } 187 #endif 188 preloader_console_init(); 189 #else 190 /* Some SoCs like rk3036 does not use any frame work */ 191 sdram_init(); 192 #endif 193 194 arch_cpu_init(); 195 rk_board_init_f(); 196 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) && !defined(CONFIG_SPL_BOARD_INIT) 197 back_to_bootrom(BROM_BOOT_NEXTSTAGE); 198 #endif 199 200 } 201 202 #ifdef CONFIG_SPL_LOAD_FIT 203 int board_fit_config_name_match(const char *name) 204 { 205 /* Just empty function now - can't decide what to choose */ 206 debug("%s: %s\n", __func__, name); 207 208 return 0; 209 } 210 #endif 211 212 #ifdef CONFIG_SPL_BOARD_INIT 213 __weak int rk_spl_board_init(void) 214 { 215 return 0; 216 } 217 218 static int setup_led(void) 219 { 220 #ifdef CONFIG_SPL_LED 221 struct udevice *dev; 222 char *led_name; 223 int ret; 224 225 led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led"); 226 if (!led_name) 227 return 0; 228 ret = led_get_by_label(led_name, &dev); 229 if (ret) { 230 debug("%s: get=%d\n", __func__, ret); 231 return ret; 232 } 233 ret = led_set_state(dev, LEDST_ON); 234 if (ret) 235 return ret; 236 #endif 237 238 return 0; 239 } 240 241 void spl_board_init(void) 242 { 243 int ret; 244 245 ret = setup_led(); 246 247 if (ret) { 248 debug("LED ret=%d\n", ret); 249 hang(); 250 } 251 252 rk_spl_board_init(); 253 #if CONFIG_IS_ENABLED(ROCKCHIP_BACK_TO_BROM) 254 back_to_bootrom(BROM_BOOT_NEXTSTAGE); 255 #endif 256 return; 257 } 258 #endif 259 260 void spl_perform_fixups(struct spl_image_info *spl_image) 261 { 262 #ifdef CONFIG_ROCKCHIP_PRELOADER_ATAGS 263 atags_set_bootdev_by_spl_bootdevice(spl_image->boot_device); 264 #endif 265 return; 266 } 267 268 #ifdef CONFIG_SPL_KERNEL_BOOT 269 static int spl_rockchip_dnl_key_pressed(void) 270 { 271 #if defined(CONFIG_SPL_INPUT) 272 return key_read(KEY_VOLUMEUP); 273 #else 274 return 0; 275 #endif 276 } 277 278 void spl_next_stage(struct spl_image_info *spl) 279 { 280 uint32_t reg_boot_mode; 281 282 if (spl_rockchip_dnl_key_pressed()) { 283 spl->next_stage = SPL_NEXT_STAGE_UBOOT; 284 return; 285 } 286 287 reg_boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG); 288 switch (reg_boot_mode) { 289 case BOOT_COLD: 290 case BOOT_PANIC: 291 case BOOT_WATCHDOG: 292 case BOOT_NORMAL: 293 case BOOT_RECOVERY: 294 spl->next_stage = SPL_NEXT_STAGE_KERNEL; 295 break; 296 default: 297 spl->next_stage = SPL_NEXT_STAGE_UBOOT; 298 } 299 } 300 #endif 301 302 #ifdef CONFIG_SPL_KERNEL_BOOT 303 const char *spl_kernel_partition(struct spl_image_info *spl, 304 struct spl_load_info *info) 305 { 306 struct bootloader_message *bmsg = NULL; 307 u32 boot_mode; 308 int ret, cnt; 309 u32 sector = 0; 310 311 #ifdef CONFIG_SPL_LIBDISK_SUPPORT 312 disk_partition_t part_info; 313 314 ret = part_get_info_by_name(info->dev, PART_MISC, &part_info); 315 if (ret >= 0) 316 sector = part_info.start; 317 #else 318 sector = CONFIG_SPL_MISC_SECTOR; 319 #endif 320 if (sector) { 321 cnt = DIV_ROUND_UP(sizeof(*bmsg), info->bl_len); 322 bmsg = memalign(ARCH_DMA_MINALIGN, cnt * info->bl_len); 323 ret = info->read(info, sector + BCB_MESSAGE_BLK_OFFSET, 324 cnt, bmsg); 325 if (ret == cnt && !strcmp(bmsg->command, "boot-recovery")) { 326 free(bmsg); 327 return PART_RECOVERY; 328 } else { 329 free(bmsg); 330 } 331 } 332 333 boot_mode = readl((void *)CONFIG_ROCKCHIP_BOOT_MODE_REG); 334 335 return (boot_mode == BOOT_RECOVERY) ? PART_RECOVERY : PART_BOOT; 336 } 337 #endif 338 339 void spl_hang_reset(void) 340 { 341 printf("# Reset the board to bootrom #\n"); 342 #if defined(CONFIG_SPL_SYSRESET) && defined(CONFIG_SPL_DRIVERS_MISC_SUPPORT) 343 writel(BOOT_BROM_DOWNLOAD, CONFIG_ROCKCHIP_BOOT_MODE_REG); 344 do_reset(NULL, 0, 0, NULL); 345 #endif 346 } 347 348 #ifdef CONFIG_SPL_FIT_ROLLBACK_PROTECT 349 int fit_read_otp_rollback_index(uint32_t fit_index, uint32_t *otp_index) 350 { 351 int ret = 0; 352 353 *otp_index = 0; 354 #if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2) 355 struct udevice *dev; 356 u32 index, i, otp_version; 357 u32 bit_count; 358 359 dev = misc_otp_get_device(OTP_S); 360 if (!dev) 361 return -ENODEV; 362 363 otp_version = 0; 364 for (i = 0; i < OTP_UBOOT_ROLLBACK_WORDS; i++) { 365 if (misc_otp_read(dev, 4 * 366 (OTP_UBOOT_ROLLBACK_OFFSET + i), 367 &index, 368 4)) { 369 printf("Can't read rollback index\n"); 370 return -EIO; 371 } 372 bit_count = fls(index); 373 otp_version += bit_count; 374 } 375 *otp_index = otp_version; 376 #endif 377 378 return ret; 379 } 380 381 static int fit_write_otp_rollback_index(u32 fit_index) 382 { 383 #if defined(CONFIG_SPL_ROCKCHIP_SECURE_OTP_V2) 384 struct udevice *dev; 385 u32 index, i, otp_index; 386 387 if (!fit_index) 388 return 0; 389 390 if (fit_index > OTP_UBOOT_ROLLBACK_WORDS * 32) 391 return -EINVAL; 392 393 dev = misc_otp_get_device(OTP_S); 394 if (!dev) 395 return -ENODEV; 396 397 if (fit_read_otp_rollback_index(fit_index, &otp_index)) 398 return -EIO; 399 400 if (otp_index < fit_index) { 401 /* Write new SW version to otp */ 402 for (i = 0; i < OTP_UBOOT_ROLLBACK_WORDS; i++) { 403 /* convert to base-1 representation */ 404 index = 0xffffffff >> (OTP_ALL_ONES_NUM_BITS - 405 min(fit_index, (u32)OTP_ALL_ONES_NUM_BITS)); 406 fit_index -= min(fit_index, 407 (u32)OTP_ALL_ONES_NUM_BITS); 408 if (index) { 409 if (misc_otp_write(dev, 4 * 410 (OTP_UBOOT_ROLLBACK_OFFSET + i), 411 &index, 412 4)) { 413 printf("Can't write rollback index\n"); 414 return -EIO; 415 } 416 } 417 } 418 } 419 #endif 420 421 return 0; 422 } 423 #endif 424 425 int spl_board_prepare_for_jump(struct spl_image_info *spl_image) 426 { 427 #ifdef CONFIG_SPL_FIT_ROLLBACK_PROTECT 428 int ret; 429 430 ret = fit_write_otp_rollback_index(gd->rollback_index); 431 if (ret) { 432 panic("Failed to write fit rollback index %d, ret=%d", 433 gd->rollback_index, ret); 434 } 435 #endif 436 437 #ifdef CONFIG_SPL_ROCKCHIP_HW_DECOMPRESS 438 misc_decompress_cleanup(); 439 #endif 440 return 0; 441 } 442