xref: /rk3399_rockchip-uboot/arch/arm/include/asm/global_data.h (revision f2ccf7f7aacf75bd9c521459d1d20df07d1ebe41)
1819833afSPeter Tyser /*
291a76751SWolfgang Denk  * (C) Copyright 2002-2010
3819833afSPeter Tyser  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4819833afSPeter Tyser  *
51a459660SWolfgang Denk  * SPDX-License-Identifier:	GPL-2.0+
6819833afSPeter Tyser  */
7819833afSPeter Tyser 
8819833afSPeter Tyser #ifndef	__ASM_GBL_DATA_H
9819833afSPeter Tyser #define __ASM_GBL_DATA_H
105cb48582SSimon Glass 
115cb48582SSimon Glass /* Architecture-specific global data */
125cb48582SSimon Glass struct arch_global_data {
13e9adeca3SSimon Glass #if defined(CONFIG_FSL_ESDHC)
14e9adeca3SSimon Glass 	u32 sdhc_clk;
15e9adeca3SSimon Glass #endif
1693d33204SZhao Qiang 
1793d33204SZhao Qiang #if defined(CONFIG_U_QE)
1893d33204SZhao Qiang 	u32 qe_clk;
1993d33204SZhao Qiang 	u32 brg_clk;
2093d33204SZhao Qiang 	uint mp_alloc_base;
2193d33204SZhao Qiang 	uint mp_alloc_top;
2293d33204SZhao Qiang #endif /* CONFIG_U_QE */
2393d33204SZhao Qiang 
24f47e6ecdSSimon Glass #ifdef CONFIG_AT91FAMILY
25f47e6ecdSSimon Glass 	/* "static data" needed by at91's clock.c */
26f47e6ecdSSimon Glass 	unsigned long	cpu_clk_rate_hz;
27f47e6ecdSSimon Glass 	unsigned long	main_clk_rate_hz;
28f47e6ecdSSimon Glass 	unsigned long	mck_rate_hz;
29f47e6ecdSSimon Glass 	unsigned long	plla_rate_hz;
30f47e6ecdSSimon Glass 	unsigned long	pllb_rate_hz;
31f47e6ecdSSimon Glass 	unsigned long	at91_pllb_usb_init;
32f47e6ecdSSimon Glass #endif
33b339051cSSimon Glass 	/* "static data" needed by most of timer.c on ARM platforms */
34b339051cSSimon Glass 	unsigned long timer_rate_hz;
358ff43b03SSimon Glass 	unsigned long tbu;
3666ee6923SSimon Glass 	unsigned long tbl;
37582601daSSimon Glass 	unsigned long lastinc;
385f70714cSSimon Glass 	unsigned long long timer_reset_value;
3934fd5d25SSimon Glass #if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
4034fd5d25SSimon Glass 	unsigned long tlb_addr;
4134fd5d25SSimon Glass 	unsigned long tlb_size;
427985cdf7SAlexander Graf #if defined(CONFIG_ARM64)
435e2ec773SAlexander Graf 	unsigned long tlb_fillptr;
445e2ec773SAlexander Graf 	unsigned long tlb_emerg;
455e2ec773SAlexander Graf #endif
4634fd5d25SSimon Glass #endif
47e61a7534SYork Sun #ifdef CONFIG_SYS_MEM_RESERVE_SECURE
48e61a7534SYork Sun #define MEM_RESERVE_SECURE_SECURED	0x1
49e61a7534SYork Sun #define MEM_RESERVE_SECURE_MAINTAINED	0x2
50e61a7534SYork Sun #define MEM_RESERVE_SECURE_ADDR_MASK	(~0x3)
51e61a7534SYork Sun 	/*
52e61a7534SYork Sun 	 * Secure memory addr
53e61a7534SYork Sun 	 * This variable needs maintenance if the RAM base is not zero,
54e61a7534SYork Sun 	 * or if RAM splits into non-consecutive banks. It also has a
55e61a7534SYork Sun 	 * flag indicating the secure memory is marked as secure by MMU.
56e61a7534SYork Sun 	 * Flags used: 0x1 secured
57e61a7534SYork Sun 	 *             0x2 maintained
58e61a7534SYork Sun 	 */
59e61a7534SYork Sun 	phys_addr_t secure_ram;
6050e93b95SYork Sun 	unsigned long tlb_allocated;
61e61a7534SYork Sun #endif
62*f2ccf7f7SYork Sun #ifdef CONFIG_RESV_RAM
63*f2ccf7f7SYork Sun 	/*
64*f2ccf7f7SYork Sun 	 * Reserved RAM for memory resident, eg. Management Complex (MC)
65*f2ccf7f7SYork Sun 	 * driver which continues to run after U-Boot exits.
66*f2ccf7f7SYork Sun 	 */
67*f2ccf7f7SYork Sun 	phys_addr_t resv_ram;
68*f2ccf7f7SYork Sun #endif
69fda06812SSRICHARAN R 
70187f9dc3STom Rini #ifdef CONFIG_ARCH_OMAP2
7160c7c30aSPaul Kocialkowski 	u32 omap_boot_device;
7260c7c30aSPaul Kocialkowski 	u32 omap_boot_mode;
7360c7c30aSPaul Kocialkowski 	u8 omap_ch_flags;
74fda06812SSRICHARAN R #endif
7544937214SPrabhakar Kushwaha #if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
76b87e6f88SYork Sun 	unsigned long mem2_clk;
77b87e6f88SYork Sun #endif
785cb48582SSimon Glass };
795cb48582SSimon Glass 
80baa1e536SSimon Glass #include <asm-generic/global_data.h>
81819833afSPeter Tyser 
82c65a2abbSJeroen Hofstee #ifdef __clang__
83c65a2abbSJeroen Hofstee 
84c65a2abbSJeroen Hofstee #define DECLARE_GLOBAL_DATA_PTR
85c65a2abbSJeroen Hofstee #define gd	get_gd()
86c65a2abbSJeroen Hofstee 
87c65a2abbSJeroen Hofstee static inline gd_t *get_gd(void)
88c65a2abbSJeroen Hofstee {
89c65a2abbSJeroen Hofstee 	gd_t *gd_ptr;
90c65a2abbSJeroen Hofstee 
91c65a2abbSJeroen Hofstee #ifdef CONFIG_ARM64
92c65a2abbSJeroen Hofstee 	/*
93c65a2abbSJeroen Hofstee 	 * Make will already error that reserving x18 is not supported at the
94c65a2abbSJeroen Hofstee 	 * time of writing, clang: error: unknown argument: '-ffixed-x18'
95c65a2abbSJeroen Hofstee 	 */
96c65a2abbSJeroen Hofstee 	__asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
97c65a2abbSJeroen Hofstee #else
98c65a2abbSJeroen Hofstee 	__asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
99c65a2abbSJeroen Hofstee #endif
100c65a2abbSJeroen Hofstee 
101c65a2abbSJeroen Hofstee 	return gd_ptr;
102c65a2abbSJeroen Hofstee }
103c65a2abbSJeroen Hofstee 
104c65a2abbSJeroen Hofstee #else
105c65a2abbSJeroen Hofstee 
1060ae76531SDavid Feng #ifdef CONFIG_ARM64
1070ae76531SDavid Feng #define DECLARE_GLOBAL_DATA_PTR		register volatile gd_t *gd asm ("x18")
1080ae76531SDavid Feng #else
109fe1378a9SJeroen Hofstee #define DECLARE_GLOBAL_DATA_PTR		register volatile gd_t *gd asm ("r9")
1100ae76531SDavid Feng #endif
111c65a2abbSJeroen Hofstee #endif
112819833afSPeter Tyser 
113819833afSPeter Tyser #endif /* __ASM_GBL_DATA_H */
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