include: global_data: fix compiler error if disable I/D cache

common/spl/spl.c: In function ‘spl_dcache_enable’:
common/spl/spl.c:266:10: error: ‘volatile struct arch_global_data’ has no member name

include: global_data: fix compiler error if disable I/D cache

common/spl/spl.c: In function ‘spl_dcache_enable’:
common/spl/spl.c:266:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_size’
gd->arch.tlb_size = PGTABLE_SIZE;
^
common/spl/spl.c:267:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_addr’
gd->arch.tlb_addr = (ulong)memalign(SZ_16K, ALIGN(PGTABLE_SIZE, SZ_4K));
^
common/spl/spl.c:268:15: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_addr’
if (!gd->arch.tlb_addr) {
^
CC tpl/arch/arm/lib/spl.o
CC spl/common/fdt_support.o

Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ifd6cf6cd8309867e1b51ce5c1f32dcfdb600c515

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arm: change tbu/l type to unsigned int

Change tbu/l type to unsigned int.
>From the timer file for arm,
"(((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;" is used,
This piece code is based

arm: change tbu/l type to unsigned int

Change tbu/l type to unsigned int.
>From the timer file for arm,
"(((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;" is used,
This piece code is based on tbu/tbl is 32bits, so change the type to
unsigned int.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>

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Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig

In Linux, CONFIG_ARCH_OMAP2PLUS is used for OMAP2 or later SoCs.
Rename CONFIG_ARCH_OMAP2 to CONFIG_ARCH_OMAP2PLUS to follow this

ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig

In Linux, CONFIG_ARCH_OMAP2PLUS is used for OMAP2 or later SoCs.
Rename CONFIG_ARCH_OMAP2 to CONFIG_ARCH_OMAP2PLUS to follow this
naming.

Move the OMAP2+ board/SoC choice down to mach-omap2/Kconfig to slim
down the arch/arm/Kconfig level.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

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Merge git://git.denx.de/u-boot-fsl-qoriq

armv8: Add global variable resv_ram

Use gd->arch.resv_ram to track reserved memory allocation.

Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

TI: Remove CONFIG_OMAP_COMMON in favor of CONFIG_ARCH_OMAP2

With the move to arch/arm/mach-omap2 there are now very few uses of
CONFIG_OMAP_COMMON and further they can all be replaced with
CONFIG_AR

TI: Remove CONFIG_OMAP_COMMON in favor of CONFIG_ARCH_OMAP2

With the move to arch/arm/mach-omap2 there are now very few uses of
CONFIG_OMAP_COMMON and further they can all be replaced with
CONFIG_ARCH_OMAP2, so do so.

Signed-off-by: Tom Rini <trini@konsulko.com>

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Merge git://git.denx.de/u-boot-fsl-qoriq

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
arch/arm/cpu/armv8/Makefile
arch/arm/lib/bootm-fdt.c

armv8: Add tlb_allocated to arch global data

When secure ram is used, MMU tables have to be put into secure ram.
To use common MMU code, gd->arch.tlb_addr will be used to host TLB
entry pointer. To

armv8: Add tlb_allocated to arch global data

When secure ram is used, MMU tables have to be put into secure ram.
To use common MMU code, gd->arch.tlb_addr will be used to host TLB
entry pointer. To save allocated memory for later use, tlb_allocated
variable is added to global data structure.

Signed-off-by: York Sun <york.sun@nxp.com>

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armv8: Move secure_ram variable out of generic global data

Secure_ram variable was put in generic global data. But only ARMv8
uses this variable. Move it to ARM specific data structure.

Signed-off-

armv8: Move secure_ram variable out of generic global data

Secure_ram variable was put in generic global data. But only ARMv8
uses this variable. Move it to ARM specific data structure.

Signed-off-by: York Sun <york.sun@nxp.com>

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arm64: Remove non-full-va map code

By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove

arm64: Remove non-full-va map code

By now the code to only have a single page table level with 64k page
size and 42 bit address space is no longer used by any board in tree,
so we can safely remove it.

To clean up code, move the layerscape mmu code to the new defines,
removing redundant field definitions.

Signed-off-by: Alexander Graf <agraf@suse.de>

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arm64: Make full va map code more dynamic

The idea to generate our pages tables from an array of memory ranges
is very sound. However, instead of hard coding the code to create up
to 2 levels of 64k

arm64: Make full va map code more dynamic

The idea to generate our pages tables from an array of memory ranges
is very sound. However, instead of hard coding the code to create up
to 2 levels of 64k granule page tables, we really should just create
normal 4k page tables that allow us to set caching attributes on 2M
or 4k level later on.

So this patch moves the full_va mapping code to 4k page size and
makes it fully flexible to dynamically create as many levels as
necessary for a map (including dynamic 1G/2M pages). It also adds
support to dynamically split a large map into smaller ones when
some code wants to set dcache attributes.

With all this in place, there is very little reason to create your
own page tables in board specific files.

Signed-off-by: Alexander Graf <agraf@suse.de>

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armv8: New MMU setup code allowing to use 48+ bits PA/VA

This patch adds code which sets up 2-level page tables on ARM64 thus
extending available VA space. CPUs implementing 64k translation
granule

armv8: New MMU setup code allowing to use 48+ bits PA/VA

This patch adds code which sets up 2-level page tables on ARM64 thus
extending available VA space. CPUs implementing 64k translation
granule are able to use direct PA-VA mapping of the whole 48 bit
address space.
It also adds the ability to reset the SCTRL register at the very beginning
of execution to avoid interference from stale mappings set up by early
firmware/loaders/etc.

Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com>
Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>

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Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

armv8: LS2080A: Rename LS2085A to reflect LS2080A

LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP
personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc.
S

armv8: LS2080A: Rename LS2085A to reflect LS2080A

LS2080A is a prime personality of Freescale’s LS2085A. It is a non-AIOP
personality without support of DP-DDR, L2 switch, 1588, PCIe endpoint etc.
So renaming existing LS2085A code base to reflect LS2080A (Prime personality)

Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: Dropped #ifdef in cpu.c for cpu_type_list]
Reviewed-by: York Sun <yorksun@freescale.com>

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omap-common: Common boot code OMAP3 support and cleanup

This introduces OMAP3 support for the common omap boot code, as well as a
major cleanup of the common omap boot code.

First, the omap_boot_pa

omap-common: Common boot code OMAP3 support and cleanup

This introduces OMAP3 support for the common omap boot code, as well as a
major cleanup of the common omap boot code.

First, the omap_boot_parameters structure becomes platform-specific, since its
definition differs a bit across omap platforms. The offsets are removed as well
since it is U-Boot's coding style to use structures for mapping such kind of
data (in the sense that it is similar to registers). It is correct to assume
that romcode structure encoding is the same as U-Boot, given the description
of these structures in the TRMs.

The original address provided by the bootrom is passed to the U-Boot binary
instead of a duplicate of the structure stored in global data. This allows to
have only the relevant (boot device and mode) information stored in global data.
It is also expected that the address where the bootrom stores that information
is not overridden by the U-Boot SPL or U-Boot.

The save_omap_boot_params is expected to handle all special cases where the data
provided by the bootrom cannot be used as-is, so that spl_boot_device and
spl_boot_mode only return the data from global data.

All of this is only relevant when the U-Boot SPL is used. In cases it is not,
save_boot_params should fallback to its weak (or board-specific) definition.
save_omap_boot_params should not be called in that context either.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>

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Merge branch 'master' of git://git.denx.de/u-boot

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

armv8/fsl-lsch3: Add support for second DDR clock

FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for
general DDR controlers, and another clock for DP-DDR. DDR driver needs t

armv8/fsl-lsch3: Add support for second DDR clock

FSL-LSCH3 platforms can have multiple DDR clocks. LS2085A has one clock for
general DDR controlers, and another clock for DP-DDR. DDR driver needs to
change to support multiple clocks.

Signed-off-by: York Sun <yorksun@freescale.com>

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Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq

qe: add u-qe support to arm board

ls1021 is arm-core and support qe which is u-qe.
add u-qe init for arm board.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
[York Sun: Fix compiling error cause

qe: add u-qe support to arm board

ls1021 is arm-core and support qe which is u-qe.
add u-qe init for arm board.

Signed-off-by: Zhao Qiang <B45475@freescale.com>
[York Sun: Fix compiling error caused by u_qe_init()]
Reviewed-by: York Sun <yorksun@freescale.com>

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Merge branch 'master' of git://git.denx.de/u-boot-arm

Merge branch 'master' of git://git.denx.de/u-boot-arm

ARM: make gd a function for clang

"clang does not support global register variables; this is
unlikely to be implemented soon because it requires additional
LLVM backend support" [1]

Workaround it b

ARM: make gd a function for clang

"clang does not support global register variables; this is
unlikely to be implemented soon because it requires additional
LLVM backend support" [1]

Workaround it by obtaining the value of gd/r9 by an inline
asm routine. Note there is no set routine added for ARM at the
moment, since most if not all updates of gd from c are actually
not needed for ARM.

[1] http://clang.llvm.org/docs/UsersManual.html

cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>

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