1 /* 2 * (C) Copyright 2015 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0 5 */ 6 7 #ifndef _ASM_ARCH_CLOCK_H 8 #define _ASM_ARCH_CLOCK_H 9 10 /* define pll mode */ 11 #define RKCLK_PLL_MODE_SLOW 0 12 #define RKCLK_PLL_MODE_NORMAL 1 13 14 enum { 15 ROCKCHIP_SYSCON_NOC, 16 ROCKCHIP_SYSCON_GRF, 17 ROCKCHIP_SYSCON_SGRF, 18 ROCKCHIP_SYSCON_PMU, 19 ROCKCHIP_SYSCON_PMUGRF, 20 ROCKCHIP_SYSCON_PMUSGRF, 21 ROCKCHIP_SYSCON_CIC, 22 ROCKCHIP_SYSCON_MSCH, 23 ROCKCHIP_SYSCON_USBGRF, 24 }; 25 26 /* Standard Rockchip clock numbers */ 27 enum rk_clk_id { 28 CLK_OSC, 29 CLK_ARM, 30 CLK_DDR, 31 CLK_CODEC, 32 CLK_GENERAL, 33 CLK_NEW, 34 35 CLK_COUNT, 36 }; 37 38 static inline int rk_pll_id(enum rk_clk_id clk_id) 39 { 40 return clk_id - 1; 41 } 42 43 struct sysreset_reg { 44 unsigned int glb_srst_fst_value; 45 unsigned int glb_srst_snd_value; 46 }; 47 48 struct softreset_reg { 49 void __iomem *base; 50 unsigned int sf_reset_offset; 51 unsigned int sf_reset_num; 52 }; 53 54 /** 55 * clk_get_divisor() - Calculate the required clock divisior 56 * 57 * Given an input rate and a required output_rate, calculate the Rockchip 58 * divisor needed to achieve this. 59 * 60 * @input_rate: Input clock rate in Hz 61 * @output_rate: Output clock rate in Hz 62 * @return divisor register value to use 63 */ 64 static inline u32 clk_get_divisor(ulong input_rate, uint output_rate) 65 { 66 uint clk_div; 67 68 clk_div = input_rate / output_rate; 69 clk_div = (clk_div + 1) & 0xfffe; 70 71 return clk_div; 72 } 73 74 /** 75 * rockchip_get_cru() - get a pointer to the clock/reset unit registers 76 * 77 * @return pointer to registers, or -ve error on error 78 */ 79 void *rockchip_get_cru(void); 80 81 /** 82 * rockchip_get_pmucru() - get a pointer to the clock/reset unit registers 83 * 84 * @return pointer to registers, or -ve error on error 85 */ 86 void *rockchip_get_pmucru(void); 87 88 struct rk3288_cru; 89 struct rk3288_grf; 90 91 void rk3288_clk_configure_cpu(struct rk3288_cru *cru, struct rk3288_grf *grf); 92 93 int rockchip_get_clk(struct udevice **devp); 94 95 #endif 96