13d54eabcSPhilipp Tomsich /* 23d54eabcSPhilipp Tomsich * Copyright 2017 Theobroma Systems Design und Consulting GmbH 33d54eabcSPhilipp Tomsich * 43d54eabcSPhilipp Tomsich * SPDX-License-Identifier: GPL-2.0+ 53d54eabcSPhilipp Tomsich */ 63d54eabcSPhilipp Tomsich 73d54eabcSPhilipp Tomsich /* 83d54eabcSPhilipp Tomsich * Execution starts on the instruction following this 4-byte header 95577f854SKever Yang * (containing the magic 'RK30', 'RK31', 'RK32' or 'RK33'). This 105577f854SKever Yang * magic constant will be written into the final image by the rkimage 115577f854SKever Yang * tool, but we need to reserve space for it here. 123d54eabcSPhilipp Tomsich * 133d54eabcSPhilipp Tomsich * To make life easier for everyone, we build the SPL binary with 143d54eabcSPhilipp Tomsich * space for this 4-byte header already included in the binary. 153d54eabcSPhilipp Tomsich */ 163d54eabcSPhilipp Tomsich #ifdef CONFIG_SPL_BUILD 17700f3108SPhilipp Tomsich /* 18700f3108SPhilipp Tomsich * We need to add 4 bytes of space for the 'RK33' at the 19700f3108SPhilipp Tomsich * beginning of the executable. However, as we want to keep 20700f3108SPhilipp Tomsich * this generic and make it applicable to builds that are like 21700f3108SPhilipp Tomsich * the RK3368 (TPL needs this, SPL doesn't) or the RK3399 (no 22*dff737c4SPhilipp Tomsich * TPL, but extra space needed in the SPL), we simply insert 23*dff737c4SPhilipp Tomsich * a branch-to-next-instruction-word with the expectation that 24*dff737c4SPhilipp Tomsich * the first one may be overwritten, if this is the first stage 25*dff737c4SPhilipp Tomsich * contained in the final image created with mkimage)... 26700f3108SPhilipp Tomsich */ 27*dff737c4SPhilipp Tomsich b 1f /* if overwritten, entry-address is at the next word */ 28*dff737c4SPhilipp Tomsich 1: 29*dff737c4SPhilipp Tomsich #endif 30*dff737c4SPhilipp Tomsich #if CONFIG_IS_ENABLED(ROCKCHIP_EARLYRETURN_TO_BROM) 31*dff737c4SPhilipp Tomsich adr r3, entry_counter 32*dff737c4SPhilipp Tomsich ldr r0, [r3] 33*dff737c4SPhilipp Tomsich cmp r0, #1 /* check if entry_counter == 1 */ 34*dff737c4SPhilipp Tomsich beq reset /* regular bootup */ 35*dff737c4SPhilipp Tomsich add r0, #1 36*dff737c4SPhilipp Tomsich str r0, [r3] /* increment the entry_counter in memory */ 37*dff737c4SPhilipp Tomsich mov r0, #0 /* return 0 to the BROM to signal 'OK' */ 38*dff737c4SPhilipp Tomsich bx lr /* return control to the BROM */ 39*dff737c4SPhilipp Tomsich entry_counter: 40*dff737c4SPhilipp Tomsich .word 0 413d54eabcSPhilipp Tomsich #endif 423d54eabcSPhilipp Tomsich b reset 435577f854SKever Yang #if !defined(CONFIG_ARM64) 445577f854SKever Yang /* 455577f854SKever Yang * For armv7, the addr '_start' will used as vector start address 465577f854SKever Yang * and write to VBAR register, which needs to aligned to 0x20. 475577f854SKever Yang */ 48*dff737c4SPhilipp Tomsich .align(5), 0x0 495577f854SKever Yang _start: 505577f854SKever Yang ARM_VECTORS 515577f854SKever Yang #endif 52fa1392a2SKever Yang 53fa1392a2SKever Yang #if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD) 54fa1392a2SKever Yang .space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */ 55fa1392a2SKever Yang #endif 56