xref: /rk3399_rockchip-uboot/arch/arm/include/asm/arch-ls102xa/fsl_serdes.h (revision cbe7706ab8aab06c18edaa9b120371f9c8012728)
1d60a2099SWang Huan /*
2d60a2099SWang Huan  * Copyright 2014 Freescale Semiconductor, Inc.
3d60a2099SWang Huan  *
4d60a2099SWang Huan  * SPDX-License-Identifier:	GPL-2.0+
5d60a2099SWang Huan  */
6d60a2099SWang Huan 
7d60a2099SWang Huan #ifndef __FSL_SERDES_H
8d60a2099SWang Huan #define __FSL_SERDES_H
9d60a2099SWang Huan 
10d60a2099SWang Huan #include <config.h>
11d60a2099SWang Huan 
12d60a2099SWang Huan enum srds_prtcl {
13*71fe2225SHou Zhiqiang 	/*
14*71fe2225SHou Zhiqiang 	 * Nobody will check whether the device 'NONE' has been configured,
15*71fe2225SHou Zhiqiang 	 * So use it to indicate if the serdes_prtcl_map has been initialized.
16*71fe2225SHou Zhiqiang 	 */
17d60a2099SWang Huan 	NONE = 0,
18d60a2099SWang Huan 	PCIE1,
19d60a2099SWang Huan 	PCIE2,
20d60a2099SWang Huan 	SATA1,
21d60a2099SWang Huan 	SGMII_TSEC1,
22d60a2099SWang Huan 	SGMII_TSEC2,
23d60a2099SWang Huan };
24d60a2099SWang Huan 
25d60a2099SWang Huan enum srds {
26d60a2099SWang Huan 	FSL_SRDS_1  = 0,
27d60a2099SWang Huan 	FSL_SRDS_2  = 1,
28d60a2099SWang Huan };
29d60a2099SWang Huan 
30d60a2099SWang Huan int is_serdes_configured(enum srds_prtcl device);
31d60a2099SWang Huan void fsl_serdes_init(void);
32d60a2099SWang Huan const char *serdes_clock_to_string(u32 clock);
33d60a2099SWang Huan 
34d60a2099SWang Huan int serdes_get_first_lane(u32 sd, enum srds_prtcl device);
35d60a2099SWang Huan enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane);
36d60a2099SWang Huan 
37d60a2099SWang Huan #endif /* __FSL_SERDES_H */
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