1 /* 2 * Copyright (c) 2016 Google, Inc 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 #ifndef _ASM_ARCH_SCU_AST2500_H 7 #define _ASM_ARCH_SCU_AST2500_H 8 9 #define SCU_UNLOCK_VALUE 0x1688a8a8 10 11 #define SCU_HWSTRAP_VGAMEM_MASK 3 12 #define SCU_HWSTRAP_VGAMEM_SHIFT 2 13 #define SCU_HWSTRAP_DDR4 (1 << 24) 14 #define SCU_HWSTRAP_CLKIN_25MHZ (1 << 23) 15 16 #define SCU_MPLL_DENUM_SHIFT 0 17 #define SCU_MPLL_DENUM_MASK 0x1f 18 #define SCU_MPLL_NUM_SHIFT 5 19 #define SCU_MPLL_NUM_MASK 0xff 20 #define SCU_MPLL_POST_SHIFT 13 21 #define SCU_MPLL_POST_MASK 0x3f 22 23 #define SCU_HPLL_DENUM_SHIFT 0 24 #define SCU_HPLL_DENUM_MASK 0x1f 25 #define SCU_HPLL_NUM_SHIFT 5 26 #define SCU_HPLL_NUM_MASK 0xff 27 #define SCU_HPLL_POST_SHIFT 13 28 #define SCU_HPLL_POST_MASK 0x3f 29 30 #define SCU_MISC2_UARTCLK_SHIFT 24 31 32 #define SCU_MISC_UARTCLK_DIV13 (1 << 12) 33 34 /* 35 * SYSRESET is actually more like a Power register, 36 * except that corresponding bit set to 1 means that 37 * the peripheral is off. 38 */ 39 #define SCU_SYSRESET_XDMA (1 << 25) 40 #define SCU_SYSRESET_MCTP (1 << 24) 41 #define SCU_SYSRESET_ADC (1 << 23) 42 #define SCU_SYSRESET_JTAG (1 << 22) 43 #define SCU_SYSRESET_MIC (1 << 18) 44 #define SCU_SYSRESET_SDIO (1 << 16) 45 #define SCU_SYSRESET_USB11HOST (1 << 15) 46 #define SCU_SYSRESET_USBHUB (1 << 14) 47 #define SCU_SYSRESET_CRT (1 << 13) 48 #define SCU_SYSRESET_MAC2 (1 << 12) 49 #define SCU_SYSRESET_MAC1 (1 << 11) 50 #define SCU_SYSRESET_PECI (1 << 10) 51 #define SCU_SYSRESET_PWM (1 << 9) 52 #define SCU_SYSRESET_PCI_VGA (1 << 8) 53 #define SCU_SYSRESET_2D (1 << 7) 54 #define SCU_SYSRESET_VIDEO (1 << 6) 55 #define SCU_SYSRESET_LPC (1 << 5) 56 #define SCU_SYSRESET_HAC (1 << 4) 57 #define SCU_SYSRESET_USBHID (1 << 3) 58 #define SCU_SYSRESET_I2C (1 << 2) 59 #define SCU_SYSRESET_AHB (1 << 1) 60 #define SCU_SYSRESET_SDRAM_WDT (1 << 0) 61 62 #ifndef __ASSEMBLY__ 63 64 struct ast2500_clk_priv { 65 struct ast2500_scu *scu; 66 }; 67 68 struct ast2500_scu { 69 u32 protection_key; 70 u32 sysreset_ctrl1; 71 u32 clk_sel1; 72 u32 clk_stop_ctrl1; 73 u32 freq_counter_ctrl; 74 u32 freq_counter_cmp; 75 u32 intr_ctrl; 76 u32 d2_pll_param; 77 u32 m_pll_param; 78 u32 h_pll_param; 79 u32 d_pll_param; 80 u32 misc_ctrl1; 81 u32 pci_config[3]; 82 u32 sysreset_status; 83 u32 vga_handshake[2]; 84 u32 mac_clk_delay; 85 u32 misc_ctrl2; 86 u32 vga_scratch[8]; 87 u32 hwstrap; 88 u32 rng_ctrl; 89 u32 rng_data; 90 u32 rev_id; 91 u32 pinmux_ctrl[6]; 92 u32 reserved0; 93 u32 extrst_sel; 94 u32 pinmux_ctrl1[4]; 95 u32 reserved1[2]; 96 u32 mac_clk_delay_100M; 97 u32 mac_clk_delay_10M; 98 u32 wakeup_enable; 99 u32 wakeup_control; 100 u32 reserved2[3]; 101 u32 sysreset_ctrl2; 102 u32 clk_sel2; 103 u32 clk_stop_ctrl2; 104 u32 freerun_counter; 105 u32 freerun_counter_ext; 106 u32 clk_duty_meas_ctrl; 107 u32 clk_duty_meas_res; 108 u32 reserved3[4]; 109 /* The next registers are not key-protected */ 110 struct ast2500_cpu2 { 111 u32 ctrl; 112 u32 base_addr[9]; 113 u32 cache_ctrl; 114 } cpu2; 115 u32 reserved4; 116 u32 d_pll_ext_param[3]; 117 u32 d2_pll_ext_param[3]; 118 u32 mh_pll_ext_param; 119 u32 reserved5; 120 u32 chip_id[2]; 121 u32 reserved6[2]; 122 u32 uart_clk_ctrl; 123 u32 reserved7[7]; 124 u32 pcie_config; 125 u32 mmio_decode; 126 u32 reloc_ctrl_decode[2]; 127 u32 mailbox_addr; 128 u32 shared_sram_decode[2]; 129 u32 bmc_rev_id; 130 u32 reserved8; 131 u32 bmc_device_id; 132 u32 reserved9[13]; 133 u32 clk_duty_sel; 134 }; 135 136 /** 137 * ast_get_clk() - get a pointer to Clock Driver 138 * 139 * @devp, OUT - pointer to Clock Driver 140 * @return zero on success, error code (< 0) otherwise. 141 */ 142 int ast_get_clk(struct udevice **devp); 143 144 /** 145 * ast_get_scu() - get a pointer to SCU registers 146 * 147 * @return pointer to struct ast2500_scu on success, ERR_PTR otherwise 148 */ 149 void *ast_get_scu(void); 150 151 /** 152 * ast_scu_unlock() - unlock protected registers 153 * 154 * @scu, pointer to ast2500_scu 155 */ 156 void ast_scu_unlock(struct ast2500_scu *scu); 157 158 /** 159 * ast_scu_lock() - lock protected registers 160 * 161 * @scu, pointer to ast2500_scu 162 */ 163 void ast_scu_lock(struct ast2500_scu *scu); 164 165 #endif /* __ASSEMBLY__ */ 166 167 #endif /* _ASM_ARCH_SCU_AST2500_H */ 168