1/* 2 * dts file for Xilinx ZynqMP 3 * 4 * (C) Copyright 2014 - 2015, Xilinx, Inc. 5 * 6 * Michal Simek <michal.simek@xilinx.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10/ { 11 compatible = "xlnx,zynqmp"; 12 #address-cells = <2>; 13 #size-cells = <1>; 14 15 cpus { 16 #address-cells = <1>; 17 #size-cells = <0>; 18 19 cpu@0 { 20 compatible = "arm,cortex-a53", "arm,armv8"; 21 device_type = "cpu"; 22 enable-method = "psci"; 23 reg = <0x0>; 24 }; 25 26 cpu@1 { 27 compatible = "arm,cortex-a53", "arm,armv8"; 28 device_type = "cpu"; 29 enable-method = "psci"; 30 reg = <0x1>; 31 }; 32 33 cpu@2 { 34 compatible = "arm,cortex-a53", "arm,armv8"; 35 device_type = "cpu"; 36 enable-method = "psci"; 37 reg = <0x2>; 38 }; 39 40 cpu@3 { 41 compatible = "arm,cortex-a53", "arm,armv8"; 42 device_type = "cpu"; 43 enable-method = "psci"; 44 reg = <0x3>; 45 }; 46 }; 47 48 pmu { 49 compatible = "arm,armv8-pmuv3"; 50 interrupts = <0 143 4>, 51 <0 144 4>, 52 <0 145 4>, 53 <0 146 4>; 54 }; 55 56 psci { 57 compatible = "arm,psci-0.2"; 58 method = "smc"; 59 }; 60 61 firmware { 62 compatible = "xlnx,zynqmp-pm"; 63 method = "smc"; 64 }; 65 66 timer { 67 compatible = "arm,armv8-timer"; 68 interrupt-parent = <&gic>; 69 interrupts = <1 13 0xf01>, 70 <1 14 0xf01>, 71 <1 11 0xf01>, 72 <1 10 0xf01>; 73 }; 74 75 amba_apu: amba_apu { 76 compatible = "simple-bus"; 77 #address-cells = <2>; 78 #size-cells = <1>; 79 ranges; 80 81 gic: interrupt-controller@f9010000 { 82 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 83 #interrupt-cells = <3>; 84 reg = <0x0 0xf9010000 0x10000>, 85 <0x0 0xf902f000 0x2000>, 86 <0x0 0xf9040000 0x20000>, 87 <0x0 0xf906f000 0x2000>; 88 interrupt-controller; 89 interrupt-parent = <&gic>; 90 interrupts = <1 9 0xf04>; 91 }; 92 }; 93 94 amba: amba { 95 compatible = "simple-bus"; 96 #address-cells = <2>; 97 #size-cells = <1>; 98 ranges; 99 100 can0: can@ff060000 { 101 compatible = "xlnx,zynq-can-1.0"; 102 status = "disabled"; 103 clock-names = "can_clk", "pclk"; 104 reg = <0x0 0xff060000 0x1000>; 105 interrupts = <0 23 4>; 106 interrupt-parent = <&gic>; 107 tx-fifo-depth = <0x40>; 108 rx-fifo-depth = <0x40>; 109 }; 110 111 can1: can@ff070000 { 112 compatible = "xlnx,zynq-can-1.0"; 113 status = "disabled"; 114 clock-names = "can_clk", "pclk"; 115 reg = <0x0 0xff070000 0x1000>; 116 interrupts = <0 24 4>; 117 interrupt-parent = <&gic>; 118 tx-fifo-depth = <0x40>; 119 rx-fifo-depth = <0x40>; 120 }; 121 122 /* GDMA */ 123 fpd_dma_chan1: dma@fd500000 { 124 status = "disabled"; 125 compatible = "xlnx,zynqmp-dma-1.0"; 126 reg = <0x0 0xfd500000 0x1000>; 127 interrupt-parent = <&gic>; 128 interrupts = <0 124 4>; 129 xlnx,id = <0>; 130 xlnx,bus-width = <128>; 131 }; 132 133 fpd_dma_chan2: dma@fd510000 { 134 status = "disabled"; 135 compatible = "xlnx,zynqmp-dma-1.0"; 136 reg = <0x0 0xfd510000 0x1000>; 137 interrupt-parent = <&gic>; 138 interrupts = <0 125 4>; 139 xlnx,id = <1>; 140 xlnx,bus-width = <128>; 141 }; 142 143 fpd_dma_chan3: dma@fd520000 { 144 status = "disabled"; 145 compatible = "xlnx,zynqmp-dma-1.0"; 146 reg = <0x0 0xfd520000 0x1000>; 147 interrupt-parent = <&gic>; 148 interrupts = <0 126 4>; 149 xlnx,id = <2>; 150 xlnx,bus-width = <128>; 151 }; 152 153 fpd_dma_chan4: dma@fd530000 { 154 status = "disabled"; 155 compatible = "xlnx,zynqmp-dma-1.0"; 156 reg = <0x0 0xfd530000 0x1000>; 157 interrupt-parent = <&gic>; 158 interrupts = <0 127 4>; 159 xlnx,id = <3>; 160 xlnx,bus-width = <128>; 161 }; 162 163 fpd_dma_chan5: dma@fd540000 { 164 status = "disabled"; 165 compatible = "xlnx,zynqmp-dma-1.0"; 166 reg = <0x0 0xfd540000 0x1000>; 167 interrupt-parent = <&gic>; 168 interrupts = <0 128 4>; 169 xlnx,id = <4>; 170 xlnx,bus-width = <128>; 171 }; 172 173 fpd_dma_chan6: dma@fd550000 { 174 status = "disabled"; 175 compatible = "xlnx,zynqmp-dma-1.0"; 176 reg = <0x0 0xfd550000 0x1000>; 177 interrupt-parent = <&gic>; 178 interrupts = <0 129 4>; 179 xlnx,id = <5>; 180 xlnx,bus-width = <128>; 181 }; 182 183 fpd_dma_chan7: dma@fd560000 { 184 status = "disabled"; 185 compatible = "xlnx,zynqmp-dma-1.0"; 186 reg = <0x0 0xfd560000 0x1000>; 187 interrupt-parent = <&gic>; 188 interrupts = <0 130 4>; 189 xlnx,id = <6>; 190 xlnx,bus-width = <128>; 191 }; 192 193 fpd_dma_chan8: dma@fd570000 { 194 status = "disabled"; 195 compatible = "xlnx,zynqmp-dma-1.0"; 196 reg = <0x0 0xfd570000 0x1000>; 197 interrupt-parent = <&gic>; 198 interrupts = <0 131 4>; 199 xlnx,id = <7>; 200 xlnx,bus-width = <128>; 201 }; 202 203 gpu: gpu@fd4b0000 { 204 status = "disabled"; 205 compatible = "arm,mali-400", "arm,mali-utgard"; 206 reg = <0x0 0xfd4b0000 0x30000>; 207 interrupt-parent = <&gic>; 208 interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>; 209 interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1"; 210 }; 211 212 /* ADMA */ 213 lpd_dma_chan1: dma@ffa80000 { 214 status = "disabled"; 215 compatible = "xlnx,zynqmp-dma-1.0"; 216 reg = <0x0 0xffa80000 0x1000>; 217 interrupt-parent = <&gic>; 218 interrupts = <0 77 4>; 219 xlnx,id = <0>; 220 xlnx,bus-width = <64>; 221 }; 222 223 lpd_dma_chan2: dma@ffa90000 { 224 status = "disabled"; 225 compatible = "xlnx,zynqmp-dma-1.0"; 226 reg = <0x0 0xffa90000 0x1000>; 227 interrupt-parent = <&gic>; 228 interrupts = <0 78 4>; 229 xlnx,id = <1>; 230 xlnx,bus-width = <64>; 231 }; 232 233 lpd_dma_chan3: dma@ffaa0000 { 234 status = "disabled"; 235 compatible = "xlnx,zynqmp-dma-1.0"; 236 reg = <0x0 0xffaa0000 0x1000>; 237 interrupt-parent = <&gic>; 238 interrupts = <0 79 4>; 239 xlnx,id = <2>; 240 xlnx,bus-width = <64>; 241 }; 242 243 lpd_dma_chan4: dma@ffab0000 { 244 status = "disabled"; 245 compatible = "xlnx,zynqmp-dma-1.0"; 246 reg = <0x0 0xffab0000 0x1000>; 247 interrupt-parent = <&gic>; 248 interrupts = <0 80 4>; 249 xlnx,id = <3>; 250 xlnx,bus-width = <64>; 251 }; 252 253 lpd_dma_chan5: dma@ffac0000 { 254 status = "disabled"; 255 compatible = "xlnx,zynqmp-dma-1.0"; 256 reg = <0x0 0xffac0000 0x1000>; 257 interrupt-parent = <&gic>; 258 interrupts = <0 81 4>; 259 xlnx,id = <4>; 260 xlnx,bus-width = <64>; 261 }; 262 263 lpd_dma_chan6: dma@ffad0000 { 264 status = "disabled"; 265 compatible = "xlnx,zynqmp-dma-1.0"; 266 reg = <0x0 0xffad0000 0x1000>; 267 interrupt-parent = <&gic>; 268 interrupts = <0 82 4>; 269 xlnx,id = <5>; 270 xlnx,bus-width = <64>; 271 }; 272 273 lpd_dma_chan7: dma@ffae0000 { 274 status = "disabled"; 275 compatible = "xlnx,zynqmp-dma-1.0"; 276 reg = <0x0 0xffae0000 0x1000>; 277 interrupt-parent = <&gic>; 278 interrupts = <0 83 4>; 279 xlnx,id = <6>; 280 xlnx,bus-width = <64>; 281 }; 282 283 lpd_dma_chan8: dma@ffaf0000 { 284 status = "disabled"; 285 compatible = "xlnx,zynqmp-dma-1.0"; 286 reg = <0x0 0xffaf0000 0x1000>; 287 interrupt-parent = <&gic>; 288 interrupts = <0 84 4>; 289 xlnx,id = <7>; 290 xlnx,bus-width = <64>; 291 }; 292 293 nand0: nand@ff100000 { 294 compatible = "arasan,nfc-v3p10"; 295 status = "disabled"; 296 reg = <0x0 0xff100000 0x1000>; 297 clock-names = "clk_sys", "clk_flash"; 298 interrupt-parent = <&gic>; 299 interrupts = <0 14 4>; 300 #address-cells = <2>; 301 #size-cells = <1>; 302 }; 303 304 gem0: ethernet@ff0b0000 { 305 compatible = "cdns,zynqmp-gem"; 306 status = "disabled"; 307 interrupt-parent = <&gic>; 308 interrupts = <0 57 4>, <0 57 4>; 309 reg = <0x0 0xff0b0000 0x1000>; 310 clock-names = "pclk", "hclk", "tx_clk"; 311 #address-cells = <1>; 312 #size-cells = <0>; 313 #stream-id-cells = <1>; 314 }; 315 316 gem1: ethernet@ff0c0000 { 317 compatible = "cdns,zynqmp-gem"; 318 status = "disabled"; 319 interrupt-parent = <&gic>; 320 interrupts = <0 59 4>, <0 59 4>; 321 reg = <0x0 0xff0c0000 0x1000>; 322 clock-names = "pclk", "hclk", "tx_clk"; 323 #address-cells = <1>; 324 #size-cells = <0>; 325 #stream-id-cells = <1>; 326 }; 327 328 gem2: ethernet@ff0d0000 { 329 compatible = "cdns,zynqmp-gem"; 330 status = "disabled"; 331 interrupt-parent = <&gic>; 332 interrupts = <0 61 4>, <0 61 4>; 333 reg = <0x0 0xff0d0000 0x1000>; 334 clock-names = "pclk", "hclk", "tx_clk"; 335 #address-cells = <1>; 336 #size-cells = <0>; 337 #stream-id-cells = <1>; 338 }; 339 340 gem3: ethernet@ff0e0000 { 341 compatible = "cdns,zynqmp-gem"; 342 status = "disabled"; 343 interrupt-parent = <&gic>; 344 interrupts = <0 63 4>, <0 63 4>; 345 reg = <0x0 0xff0e0000 0x1000>; 346 clock-names = "pclk", "hclk", "tx_clk"; 347 #address-cells = <1>; 348 #size-cells = <0>; 349 #stream-id-cells = <1>; 350 }; 351 352 gpio: gpio@ff0a0000 { 353 compatible = "xlnx,zynqmp-gpio-1.0"; 354 status = "disabled"; 355 #gpio-cells = <0x2>; 356 interrupt-parent = <&gic>; 357 interrupts = <0 16 4>; 358 reg = <0x0 0xff0a0000 0x1000>; 359 }; 360 361 i2c0: i2c@ff020000 { 362 compatible = "cdns,i2c-r1p10"; 363 status = "disabled"; 364 interrupt-parent = <&gic>; 365 interrupts = <0 17 4>; 366 reg = <0x0 0xff020000 0x1000>; 367 #address-cells = <1>; 368 #size-cells = <0>; 369 }; 370 371 i2c1: i2c@ff030000 { 372 compatible = "cdns,i2c-r1p10"; 373 status = "disabled"; 374 interrupt-parent = <&gic>; 375 interrupts = <0 18 4>; 376 reg = <0x0 0xff030000 0x1000>; 377 #address-cells = <1>; 378 #size-cells = <0>; 379 }; 380 381 pcie: pcie@fd0e0000 { 382 compatible = "xlnx,nwl-pcie-2.11"; 383 status = "disabled"; 384 #address-cells = <3>; 385 #size-cells = <2>; 386 #interrupt-cells = <1>; 387 device_type = "pci"; 388 interrupt-parent = <&gic>; 389 interrupts = < 0 118 4>, 390 < 0 116 4>, 391 < 0 115 4>, /* MSI_1 [63...32] */ 392 < 0 114 4 >; /* MSI_0 [31...0] */ 393 interrupt-names = "misc", "intx", "msi_1", "msi_0"; 394 reg = <0x0 0xfd0e0000 0x1000>, 395 <0x0 0xfd480000 0x1000>, 396 <0x0 0xe0000000 0x1000000>; 397 reg-names = "breg", "pcireg", "cfg"; 398 ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>; 399 }; 400 401 qspi: spi@ff0f0000 { 402 compatible = "xlnx,zynqmp-qspi-1.0"; 403 status = "disabled"; 404 clock-names = "ref_clk", "pclk"; 405 interrupts = <0 15 4>; 406 interrupt-parent = <&gic>; 407 num-cs = <1>; 408 reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>; 409 #address-cells = <1>; 410 #size-cells = <0>; 411 }; 412 413 rtc: rtc@ffa60000 { 414 compatible = "xlnx,zynqmp-rtc"; 415 status = "disabled"; 416 reg = <0x0 0xffa60000 0x100>; 417 interrupt-parent = <&gic>; 418 interrupts = <0 26 4>, <0 27 4>; 419 interrupt-names = "alarm", "sec"; 420 }; 421 422 sata: ahci@fd0c0000 { 423 compatible = "ceva,ahci-1v84"; 424 status = "disabled"; 425 reg = <0x0 0xfd0c0000 0x2000>; 426 interrupt-parent = <&gic>; 427 interrupts = <0 133 4>; 428 }; 429 430 sdhci0: sdhci@ff160000 { 431 compatible = "arasan,sdhci-8.9a"; 432 status = "disabled"; 433 interrupt-parent = <&gic>; 434 interrupts = <0 48 4>; 435 reg = <0x0 0xff160000 0x1000>; 436 clock-names = "clk_xin", "clk_ahb"; 437 }; 438 439 sdhci1: sdhci@ff170000 { 440 compatible = "arasan,sdhci-8.9a"; 441 status = "disabled"; 442 interrupt-parent = <&gic>; 443 interrupts = <0 49 4>; 444 reg = <0x0 0xff170000 0x1000>; 445 clock-names = "clk_xin", "clk_ahb"; 446 }; 447 448 smmu: smmu@fd800000 { 449 compatible = "arm,mmu-500"; 450 reg = <0x0 0xfd800000 0x20000>; 451 #global-interrupts = <1>; 452 interrupt-parent = <&gic>; 453 interrupts = <0 155 4>, 454 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, 455 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, 456 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>, 457 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>; 458 mmu-masters = < &gem0 0x874 459 &gem1 0x875 460 &gem2 0x876 461 &gem3 0x877 >; 462 }; 463 464 spi0: spi@ff040000 { 465 compatible = "cdns,spi-r1p6"; 466 status = "disabled"; 467 interrupt-parent = <&gic>; 468 interrupts = <0 19 4>; 469 reg = <0x0 0xff040000 0x1000>; 470 clock-names = "ref_clk", "pclk"; 471 #address-cells = <1>; 472 #size-cells = <0>; 473 }; 474 475 spi1: spi@ff050000 { 476 compatible = "cdns,spi-r1p6"; 477 status = "disabled"; 478 interrupt-parent = <&gic>; 479 interrupts = <0 20 4>; 480 reg = <0x0 0xff050000 0x1000>; 481 clock-names = "ref_clk", "pclk"; 482 #address-cells = <1>; 483 #size-cells = <0>; 484 }; 485 486 ttc0: timer@ff110000 { 487 compatible = "cdns,ttc"; 488 status = "disabled"; 489 interrupt-parent = <&gic>; 490 interrupts = <0 36 4>, <0 37 4>, <0 38 4>; 491 reg = <0x0 0xff110000 0x1000>; 492 timer-width = <32>; 493 }; 494 495 ttc1: timer@ff120000 { 496 compatible = "cdns,ttc"; 497 status = "disabled"; 498 interrupt-parent = <&gic>; 499 interrupts = <0 39 4>, <0 40 4>, <0 41 4>; 500 reg = <0x0 0xff120000 0x1000>; 501 timer-width = <32>; 502 }; 503 504 ttc2: timer@ff130000 { 505 compatible = "cdns,ttc"; 506 status = "disabled"; 507 interrupt-parent = <&gic>; 508 interrupts = <0 42 4>, <0 43 4>, <0 44 4>; 509 reg = <0x0 0xff130000 0x1000>; 510 timer-width = <32>; 511 }; 512 513 ttc3: timer@ff140000 { 514 compatible = "cdns,ttc"; 515 status = "disabled"; 516 interrupt-parent = <&gic>; 517 interrupts = <0 45 4>, <0 46 4>, <0 47 4>; 518 reg = <0x0 0xff140000 0x1000>; 519 timer-width = <32>; 520 }; 521 522 uart0: serial@ff000000 { 523 compatible = "cdns,uart-r1p12"; 524 status = "disabled"; 525 interrupt-parent = <&gic>; 526 interrupts = <0 21 4>; 527 reg = <0x0 0xff000000 0x1000>; 528 clock-names = "uart_clk", "pclk"; 529 }; 530 531 uart1: serial@ff010000 { 532 compatible = "cdns,uart-r1p12"; 533 status = "disabled"; 534 interrupt-parent = <&gic>; 535 interrupts = <0 22 4>; 536 reg = <0x0 0xff010000 0x1000>; 537 clock-names = "uart_clk", "pclk"; 538 }; 539 540 usb0: usb@fe200000 { 541 compatible = "snps,dwc3"; 542 status = "disabled"; 543 interrupt-parent = <&gic>; 544 interrupts = <0 65 4>; 545 reg = <0x0 0xfe200000 0x40000>; 546 clock-names = "clk_xin", "clk_ahb"; 547 }; 548 549 usb1: usb@fe300000 { 550 compatible = "snps,dwc3"; 551 status = "disabled"; 552 interrupt-parent = <&gic>; 553 interrupts = <0 70 4>; 554 reg = <0x0 0xfe300000 0x40000>; 555 clock-names = "clk_xin", "clk_ahb"; 556 }; 557 558 watchdog0: watchdog@fd4d0000 { 559 compatible = "cdns,wdt-r1p2"; 560 status = "disabled"; 561 interrupt-parent = <&gic>; 562 interrupts = <0 113 1>; 563 reg = <0x0 0xfd4d0000 0x1000>; 564 timeout-sec = <10>; 565 }; 566 567 xilinx_drm: xilinx_drm { 568 compatible = "xlnx,drm"; 569 status = "disabled"; 570 xlnx,encoder-slave = <&xlnx_dp>; 571 xlnx,connector-type = "DisplayPort"; 572 xlnx,dp-sub = <&xlnx_dp_sub>; 573 planes { 574 xlnx,pixel-format = "rgb565"; 575 plane0 { 576 dmas = <&xlnx_dpdma 3>; 577 dma-names = "dma"; 578 }; 579 plane1 { 580 dmas = <&xlnx_dpdma 0>; 581 dma-names = "dma"; 582 }; 583 }; 584 }; 585 586 xlnx_dp: dp@43c00000 { 587 compatible = "xlnx,v-dp"; 588 status = "disabled"; 589 reg = <0x0 0xfd4a0000 0x1000>; 590 interrupts = <0 119 4>; 591 interrupt-parent = <&gic>; 592 clock-names = "aclk", "aud_clk"; 593 xlnx,dp-version = "v1.2"; 594 xlnx,max-lanes = <2>; 595 xlnx,max-link-rate = <540000>; 596 xlnx,max-bpc = <16>; 597 xlnx,enable-ycrcb; 598 xlnx,colormetry = "rgb"; 599 xlnx,bpc = <8>; 600 xlnx,audio-chan = <2>; 601 xlnx,dp-sub = <&xlnx_dp_sub>; 602 }; 603 604 xlnx_dp_snd_card: dp_snd_card { 605 compatible = "xlnx,dp-snd-card"; 606 status = "disabled"; 607 xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>; 608 xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>; 609 }; 610 611 xlnx_dp_snd_codec0: dp_snd_codec0 { 612 compatible = "xlnx,dp-snd-codec"; 613 status = "disabled"; 614 clock-names = "aud_clk"; 615 }; 616 617 xlnx_dp_snd_pcm0: dp_snd_pcm0 { 618 compatible = "xlnx,dp-snd-pcm"; 619 status = "disabled"; 620 dmas = <&xlnx_dpdma 4>; 621 dma-names = "tx"; 622 }; 623 624 xlnx_dp_snd_pcm1: dp_snd_pcm1 { 625 compatible = "xlnx,dp-snd-pcm"; 626 status = "disabled"; 627 dmas = <&xlnx_dpdma 5>; 628 dma-names = "tx"; 629 }; 630 631 xlnx_dp_sub: dp_sub@43c0a000 { 632 compatible = "xlnx,dp-sub"; 633 status = "disabled"; 634 reg = <0x0 0xfd4aa000 0x1000>, <0x0 0xfd4ab000 0x1000>, <0x0 0xfd4ac000 0x1000>; 635 reg-names = "blend", "av_buf", "aud"; 636 xlnx,output-fmt = "rgb"; 637 }; 638 639 xlnx_dpdma: dma@fd4c0000 { 640 compatible = "xlnx,dpdma"; 641 status = "disabled"; 642 reg = <0x0 0xfd4c0000 0x1000>; 643 interrupts = <0 122 4>; 644 interrupt-parent = <&gic>; 645 clock-names = "axi_clk"; 646 dma-channels = <6>; 647 #dma-cells = <1>; 648 dma-video0channel@43c10000 { 649 compatible = "xlnx,video0"; 650 }; 651 dma-video1channel@43c10000 { 652 compatible = "xlnx,video1"; 653 }; 654 dma-video2channel@43c10000 { 655 compatible = "xlnx,video2"; 656 }; 657 dma-graphicschannel@43c10000 { 658 compatible = "xlnx,graphics"; 659 }; 660 dma-audio0channel@43c10000 { 661 compatible = "xlnx,audio0"; 662 }; 663 dma-audio1channel@43c10000 { 664 compatible = "xlnx,audio1"; 665 }; 666 }; 667 }; 668}; 669