1/* 2 * (C) Copyright 2025 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8 9/ { 10 aliases { 11 mmc0 = &emmc; 12 mmc1 = &sdmmc0; 13 }; 14 15 chosen { 16 stdout-path = &uart0; 17 u-boot,spl-boot-order = &sdmmc0, &spi_nand, &spi_nor, &emmc; 18 }; 19 20 secure-otp@20b10000 { 21 compatible = "rockchip,rv1126b-secure-otp"; 22 reg = <0x20b10000 0x10000>; 23 secure_conf = <0x2022001c>; 24 cru_rst_addr = <0x20200a00>; 25 mask_addr = <0x20ba0000>; 26 key_reader_addr = <0x20b20000>; 27 u-boot,dm-spl; 28 status = "okay"; 29 }; 30}; 31 32&gpio0 { 33 u-boot,dm-spl; 34 status = "okay"; 35}; 36 37&gpio1 { 38 u-boot,dm-pre-reloc; 39 status = "okay"; 40}; 41 42&gpio2 { 43 u-boot,dm-spl; 44 status = "okay"; 45}; 46 47&gpio3 { 48 u-boot,dm-pre-reloc; 49 status = "okay"; 50}; 51 52&gpio4 { 53 u-boot,dm-pre-reloc; 54 status = "okay"; 55}; 56 57&grf { 58 u-boot,dm-spl; 59 status = "okay"; 60}; 61 62&ioc_grf { 63 u-boot,dm-spl; 64 status = "okay"; 65}; 66 67&cru { 68 u-boot,dm-spl; 69 status = "okay"; 70}; 71 72&crypto { 73 u-boot,dm-spl; 74 status = "okay"; 75}; 76 77&psci { 78 u-boot,dm-pre-reloc; 79 status = "okay"; 80}; 81 82&uart0 { 83 u-boot,dm-spl; 84 status = "okay"; 85}; 86 87&hw_decompress { 88 u-boot,dm-spl; 89 status = "okay"; 90}; 91 92&rng { 93 u-boot,dm-pre-reloc; 94 status = "okay"; 95}; 96 97&fspi0 { 98 u-boot,dm-spl; 99 status = "okay"; 100 101 #address-cells = <1>; 102 #size-cells = <0>; 103 spi_nand: flash@0 { 104 u-boot,dm-spl; 105 compatible = "spi-nand"; 106 reg = <0>; 107 spi-tx-bus-width = <1>; 108 spi-rx-bus-width = <4>; 109 spi-max-frequency = <80000000>; 110 }; 111 112 spi_nor: flash@1 { 113 u-boot,dm-spl; 114 compatible = "jedec,spi-nor"; 115 label = "sfc_nor"; 116 reg = <0>; 117 spi-tx-bus-width = <1>; 118 spi-rx-bus-width = <4>; 119 spi-max-frequency = <80000000>; 120 }; 121}; 122 123&saradc0 { 124 u-boot,dm-pre-reloc; 125 status = "okay"; 126}; 127 128&sdmmc0 { 129 bus-width = <4>; 130 pinctrl-names = "default"; 131 pinctrl-0 = <&sdmmc0_bus4_pins &sdmmc0_cmd_pins &sdmmc0_clk_pins &sdmmc0_detn_pins>; 132 u-boot,dm-spl; 133 status = "okay"; 134}; 135 136&emmc { 137 bus-width = <8>; 138 mmc-hs200-1_8v; 139 u-boot,dm-spl; 140 status = "okay"; 141}; 142 143&sdmmc0_pins { 144 u-boot,dm-spl; 145}; 146 147&sdmmc0_bus4_pins { 148 u-boot,dm-spl; 149}; 150 151&sdmmc0_cmd_pins { 152 u-boot,dm-spl; 153}; 154 155&sdmmc0_clk_pins { 156 u-boot,dm-spl; 157}; 158 159&sdmmc0_detn_pins { 160 u-boot,dm-spl; 161}; 162 163&pinctrl { 164 u-boot,dm-spl; 165 status = "okay"; 166}; 167 168&pcfg_pull_up { 169 u-boot,dm-spl; 170}; 171 172&pcfg_pull_none { 173 u-boot,dm-spl; 174}; 175 176&usb2phy { 177 u-boot,dm-pre-reloc; 178 status = "okay"; 179}; 180 181&usb2phy_otg { 182 u-boot,dm-pre-reloc; 183 status = "okay"; 184}; 185