xref: /rk3399_rockchip-uboot/arch/arm/dts/rk3568-u-boot.dtsi (revision 782f7efb2c4e6292e8600e55f067e647a42650eb)
1/*
2 * (C) Copyright 2020 Rockchip Electronics Co., Ltd
3 *
4 * SPDX-License-Identifier:     GPL-2.0+
5 */
6
7/ {
8	aliases {
9		mmc0 = &sdhci;
10		mmc1 = &sdmmc0;
11		mmc2 = &sdmmc1;
12	};
13
14	chosen {
15		stdout-path = &uart2;
16	};
17};
18
19&uart2 {
20	clock-frequency = <24000000>;
21	u-boot,dm-pre-reloc;
22	status = "okay";
23};
24
25&grf {
26	u-boot,dm-pre-reloc;
27	status = "okay";
28};
29
30&pmugrf {
31	u-boot,dm-pre-reloc;
32	status = "okay";
33};
34
35&usb2phy0_grf {
36	u-boot,dm-pre-reloc;
37	status = "okay";
38};
39
40&usb2phy1_grf {
41	u-boot,dm-pre-reloc;
42	status = "okay";
43};
44
45&usbdrd30 {
46	u-boot,dm-pre-reloc;
47	status = "okay";
48};
49
50&usbdrd_dwc3 {
51	u-boot,dm-pre-reloc;
52	status = "okay";
53};
54
55&usbhost30 {
56	u-boot,dm-pre-reloc;
57	status = "okay";
58};
59
60&usbhost_dwc3 {
61	u-boot,dm-pre-reloc;
62	status = "okay";
63};
64
65&usb_host0_ehci {
66	u-boot,dm-pre-reloc;
67	status = "okay";
68};
69
70&usb_host0_ohci {
71	u-boot,dm-pre-reloc;
72	status = "okay";
73};
74
75&usb_host1_ehci {
76	u-boot,dm-pre-reloc;
77	status = "okay";
78};
79
80&usb_host1_ohci {
81	u-boot,dm-pre-reloc;
82	status = "okay";
83};
84
85&usb2phy0 {
86	u-boot,dm-pre-reloc;
87	status = "okay";
88};
89
90&u2phy0_otg {
91	u-boot,dm-pre-reloc;
92	status = "okay";
93};
94
95&u2phy0_host {
96	u-boot,dm-pre-reloc;
97	status = "okay";
98};
99
100&usb2phy1 {
101	u-boot,dm-pre-reloc;
102	status = "okay";
103};
104
105&u2phy1_otg {
106	u-boot,dm-pre-reloc;
107	status = "okay";
108};
109
110&u2phy1_host {
111	u-boot,dm-pre-reloc;
112	status = "okay";
113};
114
115&cru {
116	u-boot,dm-pre-reloc;
117	status = "okay";
118};
119
120&pmucru {
121	u-boot,dm-pre-reloc;
122	status = "okay";
123};
124
125&sfc {
126	u-boot,dm-spl;
127	/delete-property/ assigned-clocks;
128	/delete-property/ assigned-clock-rates;
129	status = "okay";
130
131	#address-cells = <1>;
132	#size-cells = <0>;
133	spi_nand: flash@0 {
134		u-boot,dm-spl;
135		compatible = "spi-nand";
136		reg = <0>;
137		spi-tx-bus-width = <1>;
138		spi-rx-bus-width = <4>;
139		spi-max-frequency = <96000000>;
140	};
141
142	spi_nor: flash@1 {
143		u-boot,dm-spl;
144		compatible = "jedec,spi-nor";
145		label = "sfc_nor";
146		reg = <0>;
147		spi-tx-bus-width = <1>;
148		spi-rx-bus-width = <4>;
149		spi-max-frequency = <100000000>;
150	};
151};
152
153&saradc {
154	u-boot,dm-spl;
155	status = "okay";
156};
157
158&sdmmc0 {
159	u-boot,dm-pre-reloc;
160	status = "okay";
161};
162
163&sdmmc1 {
164	u-boot,dm-pre-reloc;
165	status = "okay";
166};
167
168&sdhci {
169	u-boot,dm-pre-reloc;
170	status = "okay";
171};
172
173