1/* 2 * (C) Copyright 2020 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7/ { 8 aliases { 9 mmc0 = &sdhci; 10 mmc1 = &sdmmc0; 11 mmc2 = &sdmmc1; 12 }; 13 14 chosen { 15 stdout-path = &uart2; 16 u-boot,spl-boot-order = &sdmmc0, &sdhci, &nandc0, &spi_nand, &spi_nor; 17 }; 18}; 19 20&crypto { 21 u-boot,dm-pre-reloc; 22}; 23 24&uart2 { 25 clock-frequency = <24000000>; 26 u-boot,dm-spl; 27 /delete-property/ pinctrl-names; 28 /delete-property/ pinctrl-0; 29 status = "okay"; 30}; 31 32&grf { 33 u-boot,dm-pre-reloc; 34 status = "okay"; 35}; 36 37&pmugrf { 38 u-boot,dm-pre-reloc; 39 status = "okay"; 40}; 41 42&usb2phy0_grf { 43 u-boot,dm-pre-reloc; 44 status = "okay"; 45}; 46 47&usbdrd30 { 48 u-boot,dm-pre-reloc; 49 status = "okay"; 50}; 51 52&usbdrd_dwc3 { 53 u-boot,dm-pre-reloc; 54 status = "okay"; 55}; 56 57&usbhost30 { 58 u-boot,dm-pre-reloc; 59 status = "okay"; 60}; 61 62&usbhost_dwc3 { 63 u-boot,dm-pre-reloc; 64 status = "okay"; 65}; 66 67&usb2phy0 { 68 u-boot,dm-pre-reloc; 69 status = "okay"; 70}; 71 72&u2phy0_otg { 73 u-boot,dm-pre-reloc; 74 status = "okay"; 75}; 76 77&u2phy0_host { 78 u-boot,dm-pre-reloc; 79 status = "okay"; 80}; 81 82&cru { 83 u-boot,dm-pre-reloc; 84 status = "okay"; 85}; 86 87&pmucru { 88 u-boot,dm-pre-reloc; 89 status = "okay"; 90}; 91 92&sfc { 93 u-boot,dm-spl; 94 /delete-property/ pinctrl-names; 95 /delete-property/ pinctrl-0; 96 /delete-property/ assigned-clocks; 97 /delete-property/ assigned-clock-rates; 98 status = "okay"; 99 100 #address-cells = <1>; 101 #size-cells = <0>; 102 spi_nand: flash@0 { 103 u-boot,dm-spl; 104 compatible = "spi-nand"; 105 reg = <0>; 106 spi-tx-bus-width = <1>; 107 spi-rx-bus-width = <4>; 108 spi-max-frequency = <96000000>; 109 }; 110 111 spi_nor: flash@1 { 112 u-boot,dm-spl; 113 compatible = "jedec,spi-nor"; 114 label = "sfc_nor"; 115 reg = <0>; 116 spi-tx-bus-width = <1>; 117 spi-rx-bus-width = <4>; 118 spi-max-frequency = <100000000>; 119 }; 120}; 121 122&saradc { 123 u-boot,dm-spl; 124 status = "okay"; 125}; 126 127&sdmmc0 { 128 u-boot,dm-spl; 129 status = "okay"; 130}; 131 132&sdmmc0_pins { 133 u-boot,dm-spl; 134}; 135 136&sdmmc0_bus4 { 137 u-boot,dm-spl; 138}; 139 140&sdmmc0_clk { 141 u-boot,dm-spl; 142}; 143 144&sdmmc0_cmd { 145 u-boot,dm-spl; 146}; 147 148&sdmmc0_det { 149 u-boot,dm-spl; 150}; 151 152&sdmmc1 { 153 u-boot,dm-spl; 154 /delete-property/ pinctrl-names; 155 /delete-property/ pinctrl-0; 156 status = "okay"; 157}; 158 159&sdhci { 160 bus-width = <8>; 161 u-boot,dm-spl; 162 /delete-property/ pinctrl-names; 163 /delete-property/ pinctrl-0; 164 mmc-hs200-1_8v; 165 status = "okay"; 166}; 167 168&nandc0 { 169 u-boot,dm-spl; 170 status = "okay"; 171 #address-cells = <1>; 172 #size-cells = <0>; 173 /delete-property/ pinctrl-names; 174 /delete-property/ pinctrl-0; 175 176 nand@0 { 177 u-boot,dm-spl; 178 reg = <0>; 179 nand-ecc-mode = "hw_syndrome"; 180 nand-ecc-strength = <16>; 181 nand-ecc-step-size = <1024>; 182 }; 183}; 184 185&pinctrl { 186 u-boot,dm-spl; 187 status = "okay"; 188}; 189 190&gpio0 { 191 u-boot,dm-spl; 192}; 193 194&gpio1 { 195 u-boot,dm-spl; 196}; 197 198&gpio2 { 199 u-boot,dm-spl; 200}; 201 202&pcfg_pull_up_drv_level_2 { 203 u-boot,dm-spl; 204}; 205 206&pcfg_pull_none { 207 u-boot,dm-spl; 208}; 209 210&secure_otp { 211 u-boot,dm-spl; 212}; 213 214&wdt { 215 u-boot,dm-pre-reloc; 216 status = "okay"; 217}; 218