1/* 2 * Copyright (c) 2017 Fuzhou Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ X11 5 */ 6 7/dts-v1/; 8 9#include "rk322x.dtsi" 10#include "rk322x-u-boot.dtsi" 11#include <dt-bindings/input/input.h> 12 13/ { 14 model = "RK3229 GVA/Android Things Board V1.0"; 15 compatible = "rockchip,rk3229-gva", "rockchip,rk3229"; 16 17 chosen { 18 stdout-path = &uart2; 19 }; 20 21 memory@60000000 { 22 device_type = "memory"; 23 reg = <0x60000000 0x40000000>; 24 }; 25 26 sdio_pwrseq: sdio-pwrseq { 27 compatible = "mmc-pwrseq-simple"; 28 clocks = <&rk805 1>; 29 clock-names = "ext_clock"; 30 pinctrl-names = "default"; 31 pinctrl-0 = <&wifi_enable_h>; 32 33 /* 34 * On the module itself this is one of these (depending 35 * on the actual card populated): 36 * - SDIO_RESET_L_WL_REG_ON 37 * - PDN (power down when low) 38 */ 39 reset-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>; /* GPIO2_D2 */ 40 }; 41 42 vcc_host: vcc-host-regulator { 43 compatible = "regulator-fixed"; 44 enable-active-high; 45 gpio = <&gpio3 20 GPIO_ACTIVE_HIGH>; 46 pinctrl-names = "default"; 47 pinctrl-0 = <&host_vbus_drv>; 48 regulator-name = "vcc_host"; 49 regulator-always-on; 50 regulator-boot-on; 51 }; 52 53 wireless-bluetooth { 54 compatible = "bluetooth-platdata"; 55 clocks = <&rk805 1>; 56 clock-names = "ext_clock"; 57 uart_rts_gpios = <&gpio3 6 GPIO_ACTIVE_LOW>; 58 pinctrl-names = "default", "rts_gpio"; 59 BT,reset_gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; 60 BT,wake_gpio = <&gpio3 27 GPIO_ACTIVE_HIGH>; 61 BT,wake_host_irq = <&gpio3 26 GPIO_ACTIVE_HIGH>; 62 status = "okay"; 63 }; 64 65 wireless-wlan { 66 compatible = "wlan-platdata"; 67 rockchip,grf = <&grf>; 68 wifi_chip_type = "ap6255"; 69 WIFI,host_wake_irq = <&gpio0 28 GPIO_ACTIVE_HIGH>; 70 status = "okay"; 71 }; 72 73 gpio_keys { 74 compatible = "gpio-keys"; 75 #address-cells = <1>; 76 #size-cells = <0>; 77 autorepeat; 78 79 pinctrl-names = "default"; 80 pinctrl-0 = <&pwr_key>; 81 82 power_key: power-key { 83 label = "GPIO Key Power"; 84 gpios = <&gpio3 23 GPIO_ACTIVE_LOW>; 85 linux,code = <116>; 86 debounce-interval = <100>; 87 wakeup-source; 88 }; 89 }; 90}; 91 92 93&i2c0 { 94 status = "okay"; 95 96 rk805: rk805@18 { 97 compatible = "rockchip,rk805"; 98 status = "okay"; 99 reg = <0x18>; 100 interrupt-parent = <&gpio1>; 101 interrupts = <12 IRQ_TYPE_LEVEL_LOW>; 102 pinctrl-names = "default"; 103 pinctrl-0 = <&pmic_int_l>; 104 rockchip,system-power-controller; 105 wakeup-source; 106 gpio-controller; 107 #gpio-cells = <2>; 108 #clock-cells = <1>; 109 clock-output-names = "xin32k", "rk805-clkout2"; 110 111 rtc { 112 status = "okay"; 113 }; 114 115 pwrkey { 116 status = "okay"; 117 }; 118 119 gpio { 120 status = "okay"; 121 }; 122 123 regulators { 124 compatible = "rk805-regulator"; 125 status = "okay"; 126 #address-cells = <1>; 127 #size-cells = <0>; 128 129 vdd_arm: RK805_DCDC1@0 { 130 regulator-compatible = "RK805_DCDC1"; 131 regulator-name = "vdd_arm"; 132 regulator-min-microvolt = <712500>; 133 regulator-max-microvolt = <1450000>; 134 regulator-initial-mode = <0x1>; 135 regulator-ramp-delay = <12500>; 136 regulator-boot-on; 137 regulator-always-on; 138 regulator-state-mem { 139 regulator-mode = <0x2>; 140 regulator-on-in-suspend; 141 regulator-suspend-microvolt = <950000>; 142 }; 143 }; 144 145 vdd_logic: RK805_DCDC2@1 { 146 regulator-compatible = "RK805_DCDC2"; 147 regulator-name = "vdd_logic"; 148 regulator-min-microvolt = <712500>; 149 regulator-max-microvolt = <1450000>; 150 regulator-initial-mode = <0x1>; 151 regulator-ramp-delay = <12500>; 152 regulator-boot-on; 153 regulator-always-on; 154 regulator-state-mem { 155 regulator-mode = <0x2>; 156 regulator-on-in-suspend; 157 regulator-suspend-microvolt = <1000000>; 158 }; 159 }; 160 161 vcc_ddr: RK805_DCDC3@2 { 162 regulator-compatible = "RK805_DCDC3"; 163 regulator-name = "vcc_ddr"; 164 regulator-initial-mode = <0x1>; 165 regulator-boot-on; 166 regulator-always-on; 167 regulator-state-mem { 168 regulator-mode = <0x2>; 169 regulator-on-in-suspend; 170 }; 171 }; 172 173 vcc_io: RK805_DCDC4@3 { 174 regulator-compatible = "RK805_DCDC4"; 175 regulator-name = "vcc_io"; 176 regulator-min-microvolt = <3300000>; 177 regulator-max-microvolt = <3300000>; 178 regulator-initial-mode = <0x1>; 179 regulator-boot-on; 180 regulator-always-on; 181 regulator-state-mem { 182 regulator-mode = <0x2>; 183 regulator-on-in-suspend; 184 regulator-suspend-microvolt = <3300000>; 185 }; 186 }; 187 188 vcc_18: RK805_LDO1@4 { 189 regulator-compatible = "RK805_LDO1"; 190 regulator-name = "vcc_18"; 191 regulator-min-microvolt = <1800000>; 192 regulator-max-microvolt = <1800000>; 193 regulator-boot-on; 194 regulator-always-on; 195 regulator-state-mem { 196 regulator-on-in-suspend; 197 regulator-suspend-microvolt = <1800000>; 198 }; 199 }; 200 201 vcc_18emmc: RK805_LDO2@5 { 202 regulator-compatible = "RK805_LDO2"; 203 regulator-name = "vcc_18emmc"; 204 regulator-min-microvolt = <1800000>; 205 regulator-max-microvolt = <1800000>; 206 regulator-boot-on; 207 regulator-always-on; 208 regulator-state-mem { 209 regulator-on-in-suspend; 210 regulator-suspend-microvolt = <1800000>; 211 }; 212 }; 213 214 vdd_10: RK805_LDO3@6 { 215 regulator-compatible = "RK805_LDO3"; 216 regulator-name = "vdd_10"; 217 regulator-min-microvolt = <1000000>; 218 regulator-max-microvolt = <1000000>; 219 regulator-boot-on; 220 regulator-always-on; 221 regulator-state-mem { 222 regulator-on-in-suspend; 223 regulator-suspend-microvolt = <1000000>; 224 }; 225 }; 226 }; 227 }; 228 229 cw201x: cw2015@62 { 230 compatible = "cw201x"; 231 status = "okay"; 232 reg = <0x62>; 233 bat_config_info = <0x15 0x42 0x60 0x59 0x52 0x58 0x4D 0x48 234 0x48 0x44 0x44 0x46 0x49 0x48 0x32 0x24 235 0x20 0x17 0x13 0x0F 0x19 0x3E 0x51 0x45 236 0x08 0x76 0x0B 0x85 0x0E 0x1C 0x2E 0x3E 237 0x4D 0x52 0x52 0x57 0x3D 0x1B 0x6A 0x2D 238 0x25 0x43 0x52 0x87 0x8F 0x91 0x94 0x52 239 0x82 0x8C 0x92 0x96 0xFF 0x7B 0xBB 0xCB 240 0x2F 0x7D 0x72 0xA5 0xB5 0xC1 0x46 0xAE>; 241 support_dc_adp = <1>; 242 dc_det_gpio = <88>; 243 dc_det_flag = <1>; 244 hw_id_check = <1>; 245 hw_id0_gpio = <86>; 246 hw_id1_gpio = <87>; 247 }; 248}; 249 250&cpu0 { 251 cpu-supply = <&vdd_arm>; 252}; 253 254&pinctrl { 255 pmic { 256 pmic_int_l: pmic-int-l { 257 rockchip,pins = <1 12 RK_FUNC_GPIO &pcfg_pull_up>; /* gpio1_b4 */ 258 }; 259 }; 260 261 sdio-pwrseq { 262 wifi_enable_h: wifi-enable-h { 263 rockchip,pins = <2 26 RK_FUNC_GPIO &pcfg_pull_none>; 264 }; 265 }; 266 267 usb { 268 host_vbus_drv: host-vbus-drv { 269 rockchip,pins = <3 20 RK_FUNC_GPIO &pcfg_pull_none>; 270 }; 271 }; 272 273 keys { 274 pwr_key: pwr-key { 275 rockchip,pins = <3 23 RK_FUNC_GPIO &pcfg_pull_up>; 276 }; 277 }; 278}; 279 280&dmc { 281 rockchip,pctl-timing = <0x96 0xC8 0x1F3 0xF 0x8000004D 0x4 0x4E 0x6 0x3 282 0x0 0x6 0x5 0xC 0x10 0x6 0x4 0x4 283 0x5 0x4 0x200 0x3 0xA 0x40 0x0 0x1 284 0x5 0x5 0x3 0xC 0x1E 0x100 0x0 0x4 285 0x0 0x924>; 286 rockchip,phy-timing = <0x220 0x1 0x0 0x0 0x0 0x4 0x60>; 287 rockchip,sdram-params = <0x428B188 0x0 0x21 0x472 0x15 288 0 300 3 0 120>; 289}; 290 291&emmc { 292 status = "okay"; 293}; 294 295&uart2 { 296 status = "okay"; 297}; 298 299&u2phy0 { 300 status = "okay"; 301 302 u2phy0_otg: otg-port { 303 status = "okay"; 304 }; 305 306 u2phy0_host: host-port { 307 status = "okay"; 308 }; 309}; 310 311&usb20_otg { 312 status = "okay"; 313}; 314