1*b058f20aSOlivier Deprez /* 2*b058f20aSOlivier Deprez * Copyright (c) 2020, ARM Limited and Contributors. All rights reserved. 3*b058f20aSOlivier Deprez * 4*b058f20aSOlivier Deprez * SPDX-License-Identifier: BSD-3-Clause 5*b058f20aSOlivier Deprez */ 6*b058f20aSOlivier Deprez 7*b058f20aSOlivier Deprez #include <assert.h> 8*b058f20aSOlivier Deprez #include "spmd_private.h" 9*b058f20aSOlivier Deprez 10*b058f20aSOlivier Deprez /******************************************************************************* 11*b058f20aSOlivier Deprez * This CPU has been turned on. Enter SPMC to initialise S-EL1 or S-EL2. As part 12*b058f20aSOlivier Deprez * of the SPMC initialization path, they will initialize any SPs that they 13*b058f20aSOlivier Deprez * manage. Entry into SPMC is done after initialising minimal architectural 14*b058f20aSOlivier Deprez * state that guarantees safe execution. 15*b058f20aSOlivier Deprez ******************************************************************************/ 16*b058f20aSOlivier Deprez static void spmd_cpu_on_finish_handler(u_register_t unused) 17*b058f20aSOlivier Deprez { 18*b058f20aSOlivier Deprez unsigned int linear_id = plat_my_core_pos(); 19*b058f20aSOlivier Deprez spmd_spm_core_context_t *ctx = spmd_get_context(); 20*b058f20aSOlivier Deprez int rc; 21*b058f20aSOlivier Deprez 22*b058f20aSOlivier Deprez assert(ctx->state != SPMC_STATE_ON); 23*b058f20aSOlivier Deprez 24*b058f20aSOlivier Deprez rc = spmd_spm_core_sync_entry(ctx); 25*b058f20aSOlivier Deprez if (rc != 0) { 26*b058f20aSOlivier Deprez ERROR("SPMC initialisation failed (%d) on CPU%u\n", rc, 27*b058f20aSOlivier Deprez linear_id); 28*b058f20aSOlivier Deprez ctx->state = SPMC_STATE_OFF; 29*b058f20aSOlivier Deprez return; 30*b058f20aSOlivier Deprez } 31*b058f20aSOlivier Deprez 32*b058f20aSOlivier Deprez ctx->state = SPMC_STATE_ON; 33*b058f20aSOlivier Deprez } 34*b058f20aSOlivier Deprez 35*b058f20aSOlivier Deprez /******************************************************************************* 36*b058f20aSOlivier Deprez * Structure populated by the SPM Dispatcher to perform any bookkeeping before 37*b058f20aSOlivier Deprez * PSCI executes a power mgmt. operation. 38*b058f20aSOlivier Deprez ******************************************************************************/ 39*b058f20aSOlivier Deprez const spd_pm_ops_t spmd_pm = { 40*b058f20aSOlivier Deprez .svc_on_finish = spmd_cpu_on_finish_handler, 41*b058f20aSOlivier Deprez }; 42