1e62748e3SManish V Badarkhe /* 2e62748e3SManish V Badarkhe * Copyright (c) 2022 Arm Limited. All rights reserved. 3e62748e3SManish V Badarkhe * 4e62748e3SManish V Badarkhe * SPDX-License-Identifier: BSD-3-Clause 5e62748e3SManish V Badarkhe * 6e62748e3SManish V Badarkhe * DRTM service 7e62748e3SManish V Badarkhe * 8e62748e3SManish V Badarkhe * Authors: 9e62748e3SManish V Badarkhe * Lucian Paul-Trifu <lucian.paultrifu@gmail.com> 10e62748e3SManish V Badarkhe * Brian Nezvadovitz <brinez@microsoft.com> 2021-02-01 11e62748e3SManish V Badarkhe */ 12e62748e3SManish V Badarkhe 13e62748e3SManish V Badarkhe #include <stdint.h> 14e62748e3SManish V Badarkhe 15d54792bdSManish V Badarkhe #include <arch.h> 16d54792bdSManish V Badarkhe #include <arch_helpers.h> 172a1cdee4Sjohpow01 #include <common/bl_common.h> 18e62748e3SManish V Badarkhe #include <common/debug.h> 19e62748e3SManish V Badarkhe #include <common/runtime_svc.h> 20d54792bdSManish V Badarkhe #include <drivers/auth/crypto_mod.h> 21e62748e3SManish V Badarkhe #include "drtm_main.h" 22*2090e552SManish V Badarkhe #include "drtm_measurements.h" 231436e37dSManish V Badarkhe #include "drtm_remediation.h" 24bd6cc0b2SManish Pandey #include <lib/psci/psci_lib.h> 252a1cdee4Sjohpow01 #include <lib/xlat_tables/xlat_tables_v2.h> 262a1cdee4Sjohpow01 #include <plat/common/platform.h> 27e62748e3SManish V Badarkhe #include <services/drtm_svc.h> 282a1cdee4Sjohpow01 #include <platform_def.h> 29e62748e3SManish V Badarkhe 302a1cdee4Sjohpow01 /* Structure to store DRTM features specific to the platform. */ 312a1cdee4Sjohpow01 static drtm_features_t plat_drtm_features; 322a1cdee4Sjohpow01 332a1cdee4Sjohpow01 /* DRTM-formatted memory map. */ 342a1cdee4Sjohpow01 static drtm_memory_region_descriptor_table_t *plat_drtm_mem_map; 35d54792bdSManish V Badarkhe 36e62748e3SManish V Badarkhe int drtm_setup(void) 37e62748e3SManish V Badarkhe { 38d54792bdSManish V Badarkhe bool rc; 392a1cdee4Sjohpow01 const plat_drtm_tpm_features_t *plat_tpm_feat; 402a1cdee4Sjohpow01 const plat_drtm_dma_prot_features_t *plat_dma_prot_feat; 412a1cdee4Sjohpow01 uint64_t dlme_data_min_size; 42d54792bdSManish V Badarkhe 43e62748e3SManish V Badarkhe INFO("DRTM service setup\n"); 44e62748e3SManish V Badarkhe 452a1cdee4Sjohpow01 /* Read boot PE ID from MPIDR */ 462a1cdee4Sjohpow01 plat_drtm_features.boot_pe_id = read_mpidr_el1() & MPIDR_AFFINITY_MASK; 47d54792bdSManish V Badarkhe 48d54792bdSManish V Badarkhe rc = drtm_dma_prot_init(); 49d54792bdSManish V Badarkhe if (rc) { 50d54792bdSManish V Badarkhe return INTERNAL_ERROR; 51d54792bdSManish V Badarkhe } 52d54792bdSManish V Badarkhe 53d54792bdSManish V Badarkhe /* 54d54792bdSManish V Badarkhe * initialise the platform supported crypto module that will 55d54792bdSManish V Badarkhe * be used by the DRTM-service to calculate hash of DRTM- 56d54792bdSManish V Badarkhe * implementation specific components 57d54792bdSManish V Badarkhe */ 58d54792bdSManish V Badarkhe crypto_mod_init(); 59d54792bdSManish V Badarkhe 602a1cdee4Sjohpow01 /* Build DRTM-compatible address map. */ 612a1cdee4Sjohpow01 plat_drtm_mem_map = drtm_build_address_map(); 622a1cdee4Sjohpow01 if (plat_drtm_mem_map == NULL) { 632a1cdee4Sjohpow01 return INTERNAL_ERROR; 642a1cdee4Sjohpow01 } 652a1cdee4Sjohpow01 662a1cdee4Sjohpow01 /* Get DRTM features from platform hooks. */ 672a1cdee4Sjohpow01 plat_tpm_feat = plat_drtm_get_tpm_features(); 682a1cdee4Sjohpow01 if (plat_tpm_feat == NULL) { 692a1cdee4Sjohpow01 return INTERNAL_ERROR; 702a1cdee4Sjohpow01 } 712a1cdee4Sjohpow01 722a1cdee4Sjohpow01 plat_dma_prot_feat = plat_drtm_get_dma_prot_features(); 732a1cdee4Sjohpow01 if (plat_dma_prot_feat == NULL) { 742a1cdee4Sjohpow01 return INTERNAL_ERROR; 752a1cdee4Sjohpow01 } 762a1cdee4Sjohpow01 772a1cdee4Sjohpow01 /* 782a1cdee4Sjohpow01 * Add up minimum DLME data memory. 792a1cdee4Sjohpow01 * 802a1cdee4Sjohpow01 * For systems with complete DMA protection there is only one entry in 812a1cdee4Sjohpow01 * the protected regions table. 822a1cdee4Sjohpow01 */ 832a1cdee4Sjohpow01 if (plat_dma_prot_feat->dma_protection_support == 842a1cdee4Sjohpow01 ARM_DRTM_DMA_PROT_FEATURES_DMA_SUPPORT_COMPLETE) { 852a1cdee4Sjohpow01 dlme_data_min_size = 862a1cdee4Sjohpow01 sizeof(drtm_memory_region_descriptor_table_t) + 872a1cdee4Sjohpow01 sizeof(drtm_mem_region_t); 882a1cdee4Sjohpow01 } else { 892a1cdee4Sjohpow01 /* 902a1cdee4Sjohpow01 * TODO set protected regions table size based on platform DMA 912a1cdee4Sjohpow01 * protection configuration 922a1cdee4Sjohpow01 */ 932a1cdee4Sjohpow01 panic(); 942a1cdee4Sjohpow01 } 952a1cdee4Sjohpow01 962a1cdee4Sjohpow01 dlme_data_min_size += (drtm_get_address_map_size() + 972a1cdee4Sjohpow01 PLAT_DRTM_EVENT_LOG_MAX_SIZE + 982a1cdee4Sjohpow01 plat_drtm_get_tcb_hash_table_size() + 992a1cdee4Sjohpow01 plat_drtm_get_imp_def_dlme_region_size()); 1002a1cdee4Sjohpow01 1012a1cdee4Sjohpow01 dlme_data_min_size = page_align(dlme_data_min_size, UP)/PAGE_SIZE; 1022a1cdee4Sjohpow01 1032a1cdee4Sjohpow01 /* Fill out platform DRTM features structure */ 1042a1cdee4Sjohpow01 /* Only support default PCR schema (0x1) in this implementation. */ 1052a1cdee4Sjohpow01 ARM_DRTM_TPM_FEATURES_SET_PCR_SCHEMA(plat_drtm_features.tpm_features, 1062a1cdee4Sjohpow01 ARM_DRTM_TPM_FEATURES_PCR_SCHEMA_DEFAULT); 1072a1cdee4Sjohpow01 ARM_DRTM_TPM_FEATURES_SET_TPM_HASH(plat_drtm_features.tpm_features, 1082a1cdee4Sjohpow01 plat_tpm_feat->tpm_based_hash_support); 1092a1cdee4Sjohpow01 ARM_DRTM_TPM_FEATURES_SET_FW_HASH(plat_drtm_features.tpm_features, 1102a1cdee4Sjohpow01 plat_tpm_feat->firmware_hash_algorithm); 1112a1cdee4Sjohpow01 ARM_DRTM_MIN_MEM_REQ_SET_MIN_DLME_DATA_SIZE(plat_drtm_features.minimum_memory_requirement, 1122a1cdee4Sjohpow01 dlme_data_min_size); 1132a1cdee4Sjohpow01 ARM_DRTM_MIN_MEM_REQ_SET_DCE_SIZE(plat_drtm_features.minimum_memory_requirement, 1142a1cdee4Sjohpow01 plat_drtm_get_min_size_normal_world_dce()); 1152a1cdee4Sjohpow01 ARM_DRTM_DMA_PROT_FEATURES_SET_MAX_REGIONS(plat_drtm_features.dma_prot_features, 1162a1cdee4Sjohpow01 plat_dma_prot_feat->max_num_mem_prot_regions); 1172a1cdee4Sjohpow01 ARM_DRTM_DMA_PROT_FEATURES_SET_DMA_SUPPORT(plat_drtm_features.dma_prot_features, 1182a1cdee4Sjohpow01 plat_dma_prot_feat->dma_protection_support); 1192a1cdee4Sjohpow01 ARM_DRTM_TCB_HASH_FEATURES_SET_MAX_NUM_HASHES(plat_drtm_features.tcb_hash_features, 1202a1cdee4Sjohpow01 plat_drtm_get_tcb_hash_features()); 1212a1cdee4Sjohpow01 122e62748e3SManish V Badarkhe return 0; 123e62748e3SManish V Badarkhe } 124e62748e3SManish V Badarkhe 125e9467afbSManish V Badarkhe static inline uint64_t drtm_features_tpm(void *ctx) 126e9467afbSManish V Badarkhe { 127e9467afbSManish V Badarkhe SMC_RET2(ctx, 1ULL, /* TPM feature is supported */ 128e9467afbSManish V Badarkhe plat_drtm_features.tpm_features); 129e9467afbSManish V Badarkhe } 130e9467afbSManish V Badarkhe 131e9467afbSManish V Badarkhe static inline uint64_t drtm_features_mem_req(void *ctx) 132e9467afbSManish V Badarkhe { 133e9467afbSManish V Badarkhe SMC_RET2(ctx, 1ULL, /* memory req Feature is supported */ 134e9467afbSManish V Badarkhe plat_drtm_features.minimum_memory_requirement); 135e9467afbSManish V Badarkhe } 136e9467afbSManish V Badarkhe 137e9467afbSManish V Badarkhe static inline uint64_t drtm_features_boot_pe_id(void *ctx) 138e9467afbSManish V Badarkhe { 139e9467afbSManish V Badarkhe SMC_RET2(ctx, 1ULL, /* Boot PE feature is supported */ 140e9467afbSManish V Badarkhe plat_drtm_features.boot_pe_id); 141e9467afbSManish V Badarkhe } 142e9467afbSManish V Badarkhe 143e9467afbSManish V Badarkhe static inline uint64_t drtm_features_dma_prot(void *ctx) 144e9467afbSManish V Badarkhe { 145e9467afbSManish V Badarkhe SMC_RET2(ctx, 1ULL, /* DMA protection feature is supported */ 146e9467afbSManish V Badarkhe plat_drtm_features.dma_prot_features); 147e9467afbSManish V Badarkhe } 148e9467afbSManish V Badarkhe 149e9467afbSManish V Badarkhe static inline uint64_t drtm_features_tcb_hashes(void *ctx) 150e9467afbSManish V Badarkhe { 151e9467afbSManish V Badarkhe SMC_RET2(ctx, 1ULL, /* TCB hash feature is supported */ 152e9467afbSManish V Badarkhe plat_drtm_features.tcb_hash_features); 153e9467afbSManish V Badarkhe } 154e9467afbSManish V Badarkhe 155bd6cc0b2SManish Pandey static enum drtm_retc drtm_dl_check_caller_el(void *ctx) 156bd6cc0b2SManish Pandey { 157bd6cc0b2SManish Pandey uint64_t spsr_el3 = read_ctx_reg(get_el3state_ctx(ctx), CTX_SPSR_EL3); 158bd6cc0b2SManish Pandey uint64_t dl_caller_el; 159bd6cc0b2SManish Pandey uint64_t dl_caller_aarch; 160bd6cc0b2SManish Pandey 161bd6cc0b2SManish Pandey dl_caller_el = spsr_el3 >> MODE_EL_SHIFT & MODE_EL_MASK; 162bd6cc0b2SManish Pandey dl_caller_aarch = spsr_el3 >> MODE_RW_SHIFT & MODE_RW_MASK; 163bd6cc0b2SManish Pandey 164bd6cc0b2SManish Pandey /* Caller's security state is checked from drtm_smc_handle function */ 165bd6cc0b2SManish Pandey 166bd6cc0b2SManish Pandey /* Caller can be NS-EL2/EL1 */ 167bd6cc0b2SManish Pandey if (dl_caller_el == MODE_EL3) { 168bd6cc0b2SManish Pandey ERROR("DRTM: invalid launch from EL3\n"); 169bd6cc0b2SManish Pandey return DENIED; 170bd6cc0b2SManish Pandey } 171bd6cc0b2SManish Pandey 172bd6cc0b2SManish Pandey if (dl_caller_aarch != MODE_RW_64) { 173bd6cc0b2SManish Pandey ERROR("DRTM: invalid launch from non-AArch64 execution state\n"); 174bd6cc0b2SManish Pandey return DENIED; 175bd6cc0b2SManish Pandey } 176bd6cc0b2SManish Pandey 177bd6cc0b2SManish Pandey return SUCCESS; 178bd6cc0b2SManish Pandey } 179bd6cc0b2SManish Pandey 180bd6cc0b2SManish Pandey static enum drtm_retc drtm_dl_check_cores(void) 181bd6cc0b2SManish Pandey { 182bd6cc0b2SManish Pandey bool running_on_single_core; 183bd6cc0b2SManish Pandey uint64_t this_pe_aff_value = read_mpidr_el1() & MPIDR_AFFINITY_MASK; 184bd6cc0b2SManish Pandey 185bd6cc0b2SManish Pandey if (this_pe_aff_value != plat_drtm_features.boot_pe_id) { 186bd6cc0b2SManish Pandey ERROR("DRTM: invalid launch on a non-boot PE\n"); 187bd6cc0b2SManish Pandey return DENIED; 188bd6cc0b2SManish Pandey } 189bd6cc0b2SManish Pandey 190bd6cc0b2SManish Pandey running_on_single_core = psci_is_last_on_cpu_safe(); 191bd6cc0b2SManish Pandey if (!running_on_single_core) { 192bd6cc0b2SManish Pandey ERROR("DRTM: invalid launch due to non-boot PE not being turned off\n"); 193bd6cc0b2SManish Pandey return DENIED; 194bd6cc0b2SManish Pandey } 195bd6cc0b2SManish Pandey 196bd6cc0b2SManish Pandey return SUCCESS; 197bd6cc0b2SManish Pandey } 198bd6cc0b2SManish Pandey 19940e1fad6SManish Pandey static enum drtm_retc drtm_dl_prepare_dlme_data(const struct_drtm_dl_args *args, 20040e1fad6SManish Pandey size_t *dlme_data_size_out) 20140e1fad6SManish Pandey { 20240e1fad6SManish Pandey size_t dlme_data_total_bytes_req = 0; 20340e1fad6SManish Pandey 20440e1fad6SManish Pandey *dlme_data_size_out = dlme_data_total_bytes_req; 20540e1fad6SManish Pandey 20640e1fad6SManish Pandey return SUCCESS; 20740e1fad6SManish Pandey } 20840e1fad6SManish Pandey 20940e1fad6SManish Pandey /* 21040e1fad6SManish Pandey * Note: accesses to the dynamic launch args, and to the DLME data are 21140e1fad6SManish Pandey * little-endian as required, thanks to TF-A BL31 init requirements. 21240e1fad6SManish Pandey */ 21340e1fad6SManish Pandey static enum drtm_retc drtm_dl_check_args(uint64_t x1, 21440e1fad6SManish Pandey struct_drtm_dl_args *a_out) 21540e1fad6SManish Pandey { 21640e1fad6SManish Pandey uint64_t dlme_start, dlme_end; 21740e1fad6SManish Pandey uint64_t dlme_img_start, dlme_img_ep, dlme_img_end; 21840e1fad6SManish Pandey uint64_t dlme_data_start, dlme_data_end; 21940e1fad6SManish Pandey uintptr_t args_mapping; 22040e1fad6SManish Pandey size_t args_mapping_size; 22140e1fad6SManish Pandey struct_drtm_dl_args *a; 22240e1fad6SManish Pandey struct_drtm_dl_args args_buf; 22340e1fad6SManish Pandey size_t dlme_data_size_req; 22440e1fad6SManish Pandey int rc; 22540e1fad6SManish Pandey 22640e1fad6SManish Pandey if (x1 % DRTM_PAGE_SIZE != 0) { 22740e1fad6SManish Pandey ERROR("DRTM: parameters structure is not " 22840e1fad6SManish Pandey DRTM_PAGE_SIZE_STR "-aligned\n"); 22940e1fad6SManish Pandey return INVALID_PARAMETERS; 23040e1fad6SManish Pandey } 23140e1fad6SManish Pandey 23240e1fad6SManish Pandey args_mapping_size = ALIGNED_UP(sizeof(struct_drtm_dl_args), DRTM_PAGE_SIZE); 23340e1fad6SManish Pandey rc = mmap_add_dynamic_region_alloc_va(x1, &args_mapping, args_mapping_size, 23440e1fad6SManish Pandey MT_MEMORY | MT_NS | MT_RO | 23540e1fad6SManish Pandey MT_SHAREABILITY_ISH); 23640e1fad6SManish Pandey if (rc != 0) { 23740e1fad6SManish Pandey WARN("DRTM: %s: mmap_add_dynamic_region() failed rc=%d\n", 23840e1fad6SManish Pandey __func__, rc); 23940e1fad6SManish Pandey return INTERNAL_ERROR; 24040e1fad6SManish Pandey } 24140e1fad6SManish Pandey a = (struct_drtm_dl_args *)args_mapping; 24240e1fad6SManish Pandey /* 24340e1fad6SManish Pandey * TODO: invalidate all data cache before reading the data passed by the 24440e1fad6SManish Pandey * DCE Preamble. This is required to avoid / defend against racing with 24540e1fad6SManish Pandey * cache evictions. 24640e1fad6SManish Pandey */ 24740e1fad6SManish Pandey args_buf = *a; 24840e1fad6SManish Pandey 24940e1fad6SManish Pandey rc = mmap_remove_dynamic_region(args_mapping, args_mapping_size); 25040e1fad6SManish Pandey if (rc) { 25140e1fad6SManish Pandey ERROR("%s(): mmap_remove_dynamic_region() failed unexpectedly" 25240e1fad6SManish Pandey " rc=%d\n", __func__, rc); 25340e1fad6SManish Pandey panic(); 25440e1fad6SManish Pandey } 25540e1fad6SManish Pandey a = &args_buf; 25640e1fad6SManish Pandey 25740e1fad6SManish Pandey if (a->version != 1) { 25840e1fad6SManish Pandey ERROR("DRTM: parameters structure incompatible with major version %d\n", 25940e1fad6SManish Pandey ARM_DRTM_VERSION_MAJOR); 26040e1fad6SManish Pandey return NOT_SUPPORTED; 26140e1fad6SManish Pandey } 26240e1fad6SManish Pandey 26340e1fad6SManish Pandey if (!(a->dlme_img_off < a->dlme_size && 26440e1fad6SManish Pandey a->dlme_data_off < a->dlme_size)) { 26540e1fad6SManish Pandey ERROR("DRTM: argument offset is outside of the DLME region\n"); 26640e1fad6SManish Pandey return INVALID_PARAMETERS; 26740e1fad6SManish Pandey } 26840e1fad6SManish Pandey dlme_start = a->dlme_paddr; 26940e1fad6SManish Pandey dlme_end = a->dlme_paddr + a->dlme_size; 27040e1fad6SManish Pandey dlme_img_start = a->dlme_paddr + a->dlme_img_off; 27140e1fad6SManish Pandey dlme_img_ep = dlme_img_start + a->dlme_img_ep_off; 27240e1fad6SManish Pandey dlme_img_end = dlme_img_start + a->dlme_img_size; 27340e1fad6SManish Pandey dlme_data_start = a->dlme_paddr + a->dlme_data_off; 27440e1fad6SManish Pandey dlme_data_end = dlme_end; 27540e1fad6SManish Pandey 27640e1fad6SManish Pandey /* 27740e1fad6SManish Pandey * TODO: validate that the DLME physical address range is all NS memory, 27840e1fad6SManish Pandey * return INVALID_PARAMETERS if it is not. 27940e1fad6SManish Pandey * Note that this check relies on platform-specific information. For 28040e1fad6SManish Pandey * examples, see psci_plat_pm_ops->validate_ns_entrypoint() or 28140e1fad6SManish Pandey * arm_validate_ns_entrypoint(). 28240e1fad6SManish Pandey */ 28340e1fad6SManish Pandey 28440e1fad6SManish Pandey /* Check the DLME regions arguments. */ 28540e1fad6SManish Pandey if ((dlme_start % DRTM_PAGE_SIZE) != 0) { 28640e1fad6SManish Pandey ERROR("DRTM: argument DLME region is not " 28740e1fad6SManish Pandey DRTM_PAGE_SIZE_STR "-aligned\n"); 28840e1fad6SManish Pandey return INVALID_PARAMETERS; 28940e1fad6SManish Pandey } 29040e1fad6SManish Pandey 29140e1fad6SManish Pandey if (!(dlme_start < dlme_end && 29240e1fad6SManish Pandey dlme_start <= dlme_img_start && dlme_img_start < dlme_img_end && 29340e1fad6SManish Pandey dlme_start <= dlme_data_start && dlme_data_start < dlme_data_end)) { 29440e1fad6SManish Pandey ERROR("DRTM: argument DLME region is discontiguous\n"); 29540e1fad6SManish Pandey return INVALID_PARAMETERS; 29640e1fad6SManish Pandey } 29740e1fad6SManish Pandey 29840e1fad6SManish Pandey if (dlme_img_start < dlme_data_end && dlme_data_start < dlme_img_end) { 29940e1fad6SManish Pandey ERROR("DRTM: argument DLME regions overlap\n"); 30040e1fad6SManish Pandey return INVALID_PARAMETERS; 30140e1fad6SManish Pandey } 30240e1fad6SManish Pandey 30340e1fad6SManish Pandey /* Check the DLME image region arguments. */ 30440e1fad6SManish Pandey if ((dlme_img_start % DRTM_PAGE_SIZE) != 0) { 30540e1fad6SManish Pandey ERROR("DRTM: argument DLME image region is not " 30640e1fad6SManish Pandey DRTM_PAGE_SIZE_STR "-aligned\n"); 30740e1fad6SManish Pandey return INVALID_PARAMETERS; 30840e1fad6SManish Pandey } 30940e1fad6SManish Pandey 31040e1fad6SManish Pandey if (!(dlme_img_start <= dlme_img_ep && dlme_img_ep < dlme_img_end)) { 31140e1fad6SManish Pandey ERROR("DRTM: DLME entry point is outside of the DLME image region\n"); 31240e1fad6SManish Pandey return INVALID_PARAMETERS; 31340e1fad6SManish Pandey } 31440e1fad6SManish Pandey 31540e1fad6SManish Pandey if ((dlme_img_ep % 4) != 0) { 31640e1fad6SManish Pandey ERROR("DRTM: DLME image entry point is not 4-byte-aligned\n"); 31740e1fad6SManish Pandey return INVALID_PARAMETERS; 31840e1fad6SManish Pandey } 31940e1fad6SManish Pandey 32040e1fad6SManish Pandey /* Check the DLME data region arguments. */ 32140e1fad6SManish Pandey if ((dlme_data_start % DRTM_PAGE_SIZE) != 0) { 32240e1fad6SManish Pandey ERROR("DRTM: argument DLME data region is not " 32340e1fad6SManish Pandey DRTM_PAGE_SIZE_STR "-aligned\n"); 32440e1fad6SManish Pandey return INVALID_PARAMETERS; 32540e1fad6SManish Pandey } 32640e1fad6SManish Pandey 32740e1fad6SManish Pandey rc = drtm_dl_prepare_dlme_data(NULL, &dlme_data_size_req); 32840e1fad6SManish Pandey if (rc) { 32940e1fad6SManish Pandey ERROR("%s: drtm_dl_prepare_dlme_data() failed unexpectedly rc=%d\n", 33040e1fad6SManish Pandey __func__, rc); 33140e1fad6SManish Pandey panic(); 33240e1fad6SManish Pandey } 33340e1fad6SManish Pandey if (dlme_data_end - dlme_data_start < dlme_data_size_req) { 33440e1fad6SManish Pandey ERROR("DRTM: argument DLME data region is short of %lu bytes\n", 33540e1fad6SManish Pandey dlme_data_size_req - (size_t)(dlme_data_end - dlme_data_start)); 33640e1fad6SManish Pandey return INVALID_PARAMETERS; 33740e1fad6SManish Pandey } 33840e1fad6SManish Pandey 33940e1fad6SManish Pandey /* Check the Normal World DCE region arguments. */ 34040e1fad6SManish Pandey if (a->dce_nwd_paddr != 0) { 34140e1fad6SManish Pandey uint32_t dce_nwd_start = a->dce_nwd_paddr; 34240e1fad6SManish Pandey uint32_t dce_nwd_end = dce_nwd_start + a->dce_nwd_size; 34340e1fad6SManish Pandey 34440e1fad6SManish Pandey if (!(dce_nwd_start < dce_nwd_end)) { 34540e1fad6SManish Pandey ERROR("DRTM: argument Normal World DCE region is dicontiguous\n"); 34640e1fad6SManish Pandey return INVALID_PARAMETERS; 34740e1fad6SManish Pandey } 34840e1fad6SManish Pandey 34940e1fad6SManish Pandey if (dce_nwd_start < dlme_end && dlme_start < dce_nwd_end) { 35040e1fad6SManish Pandey ERROR("DRTM: argument Normal World DCE regions overlap\n"); 35140e1fad6SManish Pandey return INVALID_PARAMETERS; 35240e1fad6SManish Pandey } 35340e1fad6SManish Pandey } 35440e1fad6SManish Pandey 35540e1fad6SManish Pandey *a_out = *a; 35640e1fad6SManish Pandey return SUCCESS; 35740e1fad6SManish Pandey } 35840e1fad6SManish Pandey 359bd6cc0b2SManish Pandey static uint64_t drtm_dynamic_launch(uint64_t x1, void *handle) 360bd6cc0b2SManish Pandey { 361bd6cc0b2SManish Pandey enum drtm_retc ret = SUCCESS; 3622b13a985SManish V Badarkhe enum drtm_retc dma_prot_ret; 36340e1fad6SManish Pandey struct_drtm_dl_args args; 364bd6cc0b2SManish Pandey 365bd6cc0b2SManish Pandey /* Ensure that only boot PE is powered on */ 366bd6cc0b2SManish Pandey ret = drtm_dl_check_cores(); 367bd6cc0b2SManish Pandey if (ret != SUCCESS) { 368bd6cc0b2SManish Pandey SMC_RET1(handle, ret); 369bd6cc0b2SManish Pandey } 370bd6cc0b2SManish Pandey 371bd6cc0b2SManish Pandey /* 372bd6cc0b2SManish Pandey * Ensure that execution state is AArch64 and the caller 373bd6cc0b2SManish Pandey * is highest non-secure exception level 374bd6cc0b2SManish Pandey */ 375bd6cc0b2SManish Pandey ret = drtm_dl_check_caller_el(handle); 376bd6cc0b2SManish Pandey if (ret != SUCCESS) { 377bd6cc0b2SManish Pandey SMC_RET1(handle, ret); 378bd6cc0b2SManish Pandey } 379bd6cc0b2SManish Pandey 38040e1fad6SManish Pandey ret = drtm_dl_check_args(x1, &args); 38140e1fad6SManish Pandey if (ret != SUCCESS) { 38240e1fad6SManish Pandey SMC_RET1(handle, ret); 38340e1fad6SManish Pandey } 38440e1fad6SManish Pandey 3852b13a985SManish V Badarkhe /* 3862b13a985SManish V Badarkhe * Engage the DMA protections. The launch cannot proceed without the DMA 3872b13a985SManish V Badarkhe * protections due to potential TOC/TOU vulnerabilities w.r.t. the DLME 3882b13a985SManish V Badarkhe * region (and to the NWd DCE region). 3892b13a985SManish V Badarkhe */ 3902b13a985SManish V Badarkhe ret = drtm_dma_prot_engage(&args.dma_prot_args, 3912b13a985SManish V Badarkhe DL_ARGS_GET_DMA_PROT_TYPE(&args)); 3922b13a985SManish V Badarkhe if (ret != SUCCESS) { 3932b13a985SManish V Badarkhe SMC_RET1(handle, ret); 3942b13a985SManish V Badarkhe } 3952b13a985SManish V Badarkhe 396*2090e552SManish V Badarkhe /* 397*2090e552SManish V Badarkhe * The DMA protection is now engaged. Note that any failure mode that 398*2090e552SManish V Badarkhe * returns an error to the DRTM-launch caller must now disengage DMA 399*2090e552SManish V Badarkhe * protections before returning to the caller. 400*2090e552SManish V Badarkhe */ 401*2090e552SManish V Badarkhe 402*2090e552SManish V Badarkhe ret = drtm_take_measurements(&args); 403*2090e552SManish V Badarkhe if (ret != SUCCESS) { 404*2090e552SManish V Badarkhe goto err_undo_dma_prot; 405*2090e552SManish V Badarkhe } 406*2090e552SManish V Badarkhe 407*2090e552SManish V Badarkhe SMC_RET1(handle, ret); 408*2090e552SManish V Badarkhe 409*2090e552SManish V Badarkhe err_undo_dma_prot: 410*2090e552SManish V Badarkhe dma_prot_ret = drtm_dma_prot_disengage(); 411*2090e552SManish V Badarkhe if (dma_prot_ret != SUCCESS) { 412*2090e552SManish V Badarkhe ERROR("%s(): drtm_dma_prot_disengage() failed unexpectedly" 413*2090e552SManish V Badarkhe " rc=%d\n", __func__, ret); 414*2090e552SManish V Badarkhe panic(); 415*2090e552SManish V Badarkhe } 416*2090e552SManish V Badarkhe 417bd6cc0b2SManish Pandey SMC_RET1(handle, ret); 418bd6cc0b2SManish Pandey } 419bd6cc0b2SManish Pandey 420e62748e3SManish V Badarkhe uint64_t drtm_smc_handler(uint32_t smc_fid, 421e62748e3SManish V Badarkhe uint64_t x1, 422e62748e3SManish V Badarkhe uint64_t x2, 423e62748e3SManish V Badarkhe uint64_t x3, 424e62748e3SManish V Badarkhe uint64_t x4, 425e62748e3SManish V Badarkhe void *cookie, 426e62748e3SManish V Badarkhe void *handle, 427e62748e3SManish V Badarkhe uint64_t flags) 428e62748e3SManish V Badarkhe { 429e62748e3SManish V Badarkhe /* Check that the SMC call is from the Normal World. */ 430e62748e3SManish V Badarkhe if (!is_caller_non_secure(flags)) { 431e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 432e62748e3SManish V Badarkhe } 433e62748e3SManish V Badarkhe 434e62748e3SManish V Badarkhe switch (smc_fid) { 435e62748e3SManish V Badarkhe case ARM_DRTM_SVC_VERSION: 436e62748e3SManish V Badarkhe INFO("DRTM service handler: version\n"); 437e62748e3SManish V Badarkhe /* Return the version of current implementation */ 438e62748e3SManish V Badarkhe SMC_RET1(handle, ARM_DRTM_VERSION); 439e62748e3SManish V Badarkhe break; /* not reached */ 440e62748e3SManish V Badarkhe 441e62748e3SManish V Badarkhe case ARM_DRTM_SVC_FEATURES: 442e62748e3SManish V Badarkhe if (((x1 >> ARM_DRTM_FUNC_SHIFT) & ARM_DRTM_FUNC_MASK) == 443e62748e3SManish V Badarkhe ARM_DRTM_FUNC_ID) { 444e62748e3SManish V Badarkhe /* Dispatch function-based queries. */ 445e62748e3SManish V Badarkhe switch (x1 & FUNCID_MASK) { 446e62748e3SManish V Badarkhe case ARM_DRTM_SVC_VERSION: 447e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 448e62748e3SManish V Badarkhe break; /* not reached */ 449e62748e3SManish V Badarkhe 450e62748e3SManish V Badarkhe case ARM_DRTM_SVC_FEATURES: 451e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 452e62748e3SManish V Badarkhe break; /* not reached */ 453e62748e3SManish V Badarkhe 454e62748e3SManish V Badarkhe case ARM_DRTM_SVC_UNPROTECT_MEM: 455e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 456e62748e3SManish V Badarkhe break; /* not reached */ 457e62748e3SManish V Badarkhe 458e62748e3SManish V Badarkhe case ARM_DRTM_SVC_DYNAMIC_LAUNCH: 459e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 460e62748e3SManish V Badarkhe break; /* not reached */ 461e62748e3SManish V Badarkhe 462e62748e3SManish V Badarkhe case ARM_DRTM_SVC_CLOSE_LOCALITY: 463e62748e3SManish V Badarkhe WARN("ARM_DRTM_SVC_CLOSE_LOCALITY feature %s", 464e62748e3SManish V Badarkhe "is not supported\n"); 465e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 466e62748e3SManish V Badarkhe break; /* not reached */ 467e62748e3SManish V Badarkhe 468e62748e3SManish V Badarkhe case ARM_DRTM_SVC_GET_ERROR: 469e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 470e62748e3SManish V Badarkhe break; /* not reached */ 471e62748e3SManish V Badarkhe 472e62748e3SManish V Badarkhe case ARM_DRTM_SVC_SET_ERROR: 473e62748e3SManish V Badarkhe SMC_RET1(handle, SUCCESS); 474e62748e3SManish V Badarkhe break; /* not reached */ 475e62748e3SManish V Badarkhe 476e62748e3SManish V Badarkhe case ARM_DRTM_SVC_SET_TCB_HASH: 477e62748e3SManish V Badarkhe WARN("ARM_DRTM_SVC_TCB_HASH feature %s", 478e62748e3SManish V Badarkhe "is not supported\n"); 479e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 480e62748e3SManish V Badarkhe break; /* not reached */ 481e62748e3SManish V Badarkhe 482e62748e3SManish V Badarkhe case ARM_DRTM_SVC_LOCK_TCB_HASH: 483e62748e3SManish V Badarkhe WARN("ARM_DRTM_SVC_LOCK_TCB_HASH feature %s", 484e62748e3SManish V Badarkhe "is not supported\n"); 485e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 486e62748e3SManish V Badarkhe break; /* not reached */ 487e62748e3SManish V Badarkhe 488e62748e3SManish V Badarkhe default: 489e62748e3SManish V Badarkhe ERROR("Unknown DRTM service function\n"); 490e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 491e62748e3SManish V Badarkhe break; /* not reached */ 492e62748e3SManish V Badarkhe } 493e9467afbSManish V Badarkhe } else { 494e9467afbSManish V Badarkhe /* Dispatch feature-based queries. */ 495e9467afbSManish V Badarkhe switch (x1 & ARM_DRTM_FEAT_ID_MASK) { 496e9467afbSManish V Badarkhe case ARM_DRTM_FEATURES_TPM: 497e9467afbSManish V Badarkhe INFO("++ DRTM service handler: TPM features\n"); 498e9467afbSManish V Badarkhe return drtm_features_tpm(handle); 499e9467afbSManish V Badarkhe break; /* not reached */ 500e9467afbSManish V Badarkhe 501e9467afbSManish V Badarkhe case ARM_DRTM_FEATURES_MEM_REQ: 502e9467afbSManish V Badarkhe INFO("++ DRTM service handler: Min. mem." 503e9467afbSManish V Badarkhe " requirement features\n"); 504e9467afbSManish V Badarkhe return drtm_features_mem_req(handle); 505e9467afbSManish V Badarkhe break; /* not reached */ 506e9467afbSManish V Badarkhe 507e9467afbSManish V Badarkhe case ARM_DRTM_FEATURES_DMA_PROT: 508e9467afbSManish V Badarkhe INFO("++ DRTM service handler: " 509e9467afbSManish V Badarkhe "DMA protection features\n"); 510e9467afbSManish V Badarkhe return drtm_features_dma_prot(handle); 511e9467afbSManish V Badarkhe break; /* not reached */ 512e9467afbSManish V Badarkhe 513e9467afbSManish V Badarkhe case ARM_DRTM_FEATURES_BOOT_PE_ID: 514e9467afbSManish V Badarkhe INFO("++ DRTM service handler: " 515e9467afbSManish V Badarkhe "Boot PE ID features\n"); 516e9467afbSManish V Badarkhe return drtm_features_boot_pe_id(handle); 517e9467afbSManish V Badarkhe break; /* not reached */ 518e9467afbSManish V Badarkhe 519e9467afbSManish V Badarkhe case ARM_DRTM_FEATURES_TCB_HASHES: 520e9467afbSManish V Badarkhe INFO("++ DRTM service handler: " 521e9467afbSManish V Badarkhe "TCB-hashes features\n"); 522e9467afbSManish V Badarkhe return drtm_features_tcb_hashes(handle); 523e9467afbSManish V Badarkhe break; /* not reached */ 524e9467afbSManish V Badarkhe 525e9467afbSManish V Badarkhe default: 526e9467afbSManish V Badarkhe ERROR("Unknown ARM DRTM service feature\n"); 527e9467afbSManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 528e9467afbSManish V Badarkhe break; /* not reached */ 529e9467afbSManish V Badarkhe } 530e62748e3SManish V Badarkhe } 531e62748e3SManish V Badarkhe 532e62748e3SManish V Badarkhe case ARM_DRTM_SVC_UNPROTECT_MEM: 533e62748e3SManish V Badarkhe INFO("DRTM service handler: unprotect mem\n"); 5342b13a985SManish V Badarkhe return drtm_unprotect_mem(handle); 535e62748e3SManish V Badarkhe break; /* not reached */ 536e62748e3SManish V Badarkhe 537e62748e3SManish V Badarkhe case ARM_DRTM_SVC_DYNAMIC_LAUNCH: 538e62748e3SManish V Badarkhe INFO("DRTM service handler: dynamic launch\n"); 539bd6cc0b2SManish Pandey return drtm_dynamic_launch(x1, handle); 540e62748e3SManish V Badarkhe break; /* not reached */ 541e62748e3SManish V Badarkhe 542e62748e3SManish V Badarkhe case ARM_DRTM_SVC_CLOSE_LOCALITY: 543e62748e3SManish V Badarkhe WARN("DRTM service handler: close locality %s\n", 544e62748e3SManish V Badarkhe "is not supported"); 545e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 546e62748e3SManish V Badarkhe break; /* not reached */ 547e62748e3SManish V Badarkhe 548e62748e3SManish V Badarkhe case ARM_DRTM_SVC_GET_ERROR: 549e62748e3SManish V Badarkhe INFO("DRTM service handler: get error\n"); 5501436e37dSManish V Badarkhe drtm_get_error(handle); 551e62748e3SManish V Badarkhe break; /* not reached */ 552e62748e3SManish V Badarkhe 553e62748e3SManish V Badarkhe case ARM_DRTM_SVC_SET_ERROR: 554e62748e3SManish V Badarkhe INFO("DRTM service handler: set error\n"); 5551436e37dSManish V Badarkhe drtm_set_error(x1, handle); 556e62748e3SManish V Badarkhe break; /* not reached */ 557e62748e3SManish V Badarkhe 558e62748e3SManish V Badarkhe case ARM_DRTM_SVC_SET_TCB_HASH: 559e62748e3SManish V Badarkhe WARN("DRTM service handler: set TCB hash %s\n", 560e62748e3SManish V Badarkhe "is not supported"); 561e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 562e62748e3SManish V Badarkhe break; /* not reached */ 563e62748e3SManish V Badarkhe 564e62748e3SManish V Badarkhe case ARM_DRTM_SVC_LOCK_TCB_HASH: 565e62748e3SManish V Badarkhe WARN("DRTM service handler: lock TCB hash %s\n", 566e62748e3SManish V Badarkhe "is not supported"); 567e62748e3SManish V Badarkhe SMC_RET1(handle, NOT_SUPPORTED); 568e62748e3SManish V Badarkhe break; /* not reached */ 569e62748e3SManish V Badarkhe 570e62748e3SManish V Badarkhe default: 571e62748e3SManish V Badarkhe ERROR("Unknown DRTM service function: 0x%x\n", smc_fid); 572e62748e3SManish V Badarkhe SMC_RET1(handle, SMC_UNK); 573e62748e3SManish V Badarkhe break; /* not reached */ 574e62748e3SManish V Badarkhe } 575e62748e3SManish V Badarkhe 576e62748e3SManish V Badarkhe /* not reached */ 577e62748e3SManish V Badarkhe SMC_RET1(handle, SMC_UNK); 578e62748e3SManish V Badarkhe } 579