1 /* 2 * Copyright (c) 2013-2022, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 /* 9 * ZynqMP system level PM-API functions and communication with PMU via 10 * IPI interrupts 11 */ 12 13 #include <arch_helpers.h> 14 #include <plat/common/platform.h> 15 16 #include "pm_api_clock.h" 17 #include "pm_api_ioctl.h" 18 #include "pm_api_pinctrl.h" 19 #include "pm_client.h" 20 #include "pm_common.h" 21 #include "pm_ipi.h" 22 #include "zynqmp_pm_api_sys.h" 23 24 #define PM_QUERY_FEATURE_BITMASK ( \ 25 (1ULL << (uint64_t)PM_QID_CLOCK_GET_NAME) | \ 26 (1ULL << (uint64_t)PM_QID_CLOCK_GET_TOPOLOGY) | \ 27 (1ULL << (uint64_t)PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS) | \ 28 (1ULL << (uint64_t)PM_QID_CLOCK_GET_PARENTS) | \ 29 (1ULL << (uint64_t)PM_QID_CLOCK_GET_ATTRIBUTES) | \ 30 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_NUM_PINS) | \ 31 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_NUM_FUNCTIONS) | \ 32 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS) | \ 33 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_FUNCTION_NAME) | \ 34 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_FUNCTION_GROUPS) | \ 35 (1ULL << (uint64_t)PM_QID_PINCTRL_GET_PIN_GROUPS) | \ 36 (1ULL << (uint64_t)PM_QID_CLOCK_GET_NUM_CLOCKS) | \ 37 (1ULL << (uint64_t)PM_QID_CLOCK_GET_MAX_DIVISOR)) 38 39 /** 40 * typedef eemi_api_dependency - Dependent EEMI APIs which are implemented 41 * on both the TF-A and firmware. 42 * @id: EEMI API id or IOCTL id to be checked. 43 * @api_id: Dependent EEMI API. 44 * 45 */ 46 typedef struct __attribute__((packed)) { 47 uint8_t id; 48 uint8_t api_id; 49 } eemi_api_dependency; 50 51 /* Dependent APIs for TF-A to check their version from firmware */ 52 static const eemi_api_dependency api_dep_table[] = { 53 { 54 .id = (uint8_t)PM_SELF_SUSPEND, 55 .api_id = (uint8_t)PM_SELF_SUSPEND, 56 }, 57 { 58 .id = (uint8_t)PM_REQ_WAKEUP, 59 .api_id = (uint8_t)PM_REQ_WAKEUP, 60 }, 61 { 62 .id = (uint8_t)PM_ABORT_SUSPEND, 63 .api_id = (uint8_t)PM_ABORT_SUSPEND, 64 }, 65 { 66 .id = (uint8_t)PM_SET_WAKEUP_SOURCE, 67 .api_id = (uint8_t)PM_SET_WAKEUP_SOURCE, 68 }, 69 { 70 .id = (uint8_t)PM_SYSTEM_SHUTDOWN, 71 .api_id = (uint8_t)PM_SYSTEM_SHUTDOWN, 72 }, 73 { 74 .id = (uint8_t)PM_GET_API_VERSION, 75 .api_id = (uint8_t)PM_GET_API_VERSION, 76 }, 77 { 78 .id = (uint8_t)PM_CLOCK_ENABLE, 79 .api_id = (uint8_t)PM_PLL_SET_MODE, 80 }, 81 { 82 .id = (uint8_t)PM_CLOCK_ENABLE, 83 .api_id = (uint8_t)PM_CLOCK_ENABLE, 84 }, 85 { 86 .id = (uint8_t)PM_CLOCK_DISABLE, 87 .api_id = (uint8_t)PM_PLL_SET_MODE, 88 }, 89 { 90 .id = (uint8_t)PM_CLOCK_DISABLE, 91 .api_id = (uint8_t)PM_CLOCK_DISABLE, 92 }, 93 { 94 .id = (uint8_t)PM_CLOCK_GETSTATE, 95 .api_id = (uint8_t)PM_PLL_GET_MODE, 96 }, 97 { 98 .id = (uint8_t)PM_CLOCK_GETSTATE, 99 .api_id = (uint8_t)PM_CLOCK_GETSTATE, 100 }, 101 { 102 .id = (uint8_t)PM_CLOCK_SETDIVIDER, 103 .api_id = (uint8_t)PM_PLL_SET_PARAMETER, 104 }, 105 { 106 .id = (uint8_t)PM_CLOCK_SETDIVIDER, 107 .api_id = (uint8_t)PM_CLOCK_SETDIVIDER, 108 }, 109 { 110 .id = (uint8_t)PM_CLOCK_GETDIVIDER, 111 .api_id = (uint8_t)PM_PLL_GET_PARAMETER, 112 }, 113 { 114 .id = (uint8_t)PM_CLOCK_GETDIVIDER, 115 .api_id = (uint8_t)PM_CLOCK_GETDIVIDER, 116 }, 117 { 118 .id = (uint8_t)PM_CLOCK_SETPARENT, 119 .api_id = (uint8_t)PM_PLL_SET_PARAMETER, 120 }, 121 { 122 .id = (uint8_t)PM_CLOCK_SETPARENT, 123 .api_id = (uint8_t)PM_CLOCK_SETPARENT, 124 }, 125 { 126 .id = (uint8_t)PM_CLOCK_GETPARENT, 127 .api_id = (uint8_t)PM_PLL_GET_PARAMETER, 128 }, 129 { 130 .id = (uint8_t)PM_CLOCK_GETPARENT, 131 .api_id = (uint8_t)PM_CLOCK_GETPARENT, 132 }, 133 { 134 .id = (uint8_t)PM_PLL_SET_PARAMETER, 135 .api_id = (uint8_t)PM_PLL_SET_PARAMETER, 136 }, 137 { 138 .id = (uint8_t)PM_PLL_GET_PARAMETER, 139 .api_id = (uint8_t)PM_PLL_GET_PARAMETER, 140 }, 141 { 142 .id = (uint8_t)PM_PLL_SET_MODE, 143 .api_id = (uint8_t)PM_PLL_SET_MODE, 144 }, 145 { 146 .id = (uint8_t)PM_PLL_GET_MODE, 147 .api_id = (uint8_t)PM_PLL_GET_MODE, 148 }, 149 { 150 .id = (uint8_t)PM_REGISTER_ACCESS, 151 .api_id = (uint8_t)PM_MMIO_WRITE, 152 }, 153 { 154 .id = (uint8_t)PM_REGISTER_ACCESS, 155 .api_id = (uint8_t)PM_MMIO_READ, 156 }, 157 { 158 .id = (uint8_t)PM_FEATURE_CHECK, 159 .api_id = (uint8_t)PM_FEATURE_CHECK, 160 }, 161 { 162 .id = (uint8_t)IOCTL_SET_TAPDELAY_BYPASS, 163 .api_id = (uint8_t)PM_MMIO_WRITE, 164 }, 165 { 166 .id = (uint8_t)IOCTL_SD_DLL_RESET, 167 .api_id = (uint8_t)PM_MMIO_WRITE, 168 }, 169 { 170 .id = (uint8_t)IOCTL_SET_SD_TAPDELAY, 171 .api_id = (uint8_t)PM_MMIO_WRITE, 172 }, 173 { 174 .id = (uint8_t)IOCTL_SET_SD_TAPDELAY, 175 .api_id = (uint8_t)PM_MMIO_READ, 176 }, 177 { 178 .id = (uint8_t)IOCTL_SET_PLL_FRAC_DATA, 179 .api_id = (uint8_t)PM_PLL_SET_PARAMETER, 180 }, 181 { 182 .id = (uint8_t)IOCTL_GET_PLL_FRAC_DATA, 183 .api_id = (uint8_t)PM_PLL_GET_PARAMETER, 184 }, 185 { 186 .id = (uint8_t)IOCTL_WRITE_GGS, 187 .api_id = (uint8_t)PM_MMIO_WRITE, 188 }, 189 { 190 .id = (uint8_t)IOCTL_READ_GGS, 191 .api_id = (uint8_t)PM_MMIO_READ, 192 }, 193 { 194 .id = (uint8_t)IOCTL_WRITE_PGGS, 195 .api_id = (uint8_t)PM_MMIO_WRITE, 196 }, 197 { 198 .id = (uint8_t)IOCTL_READ_PGGS, 199 .api_id = (uint8_t)PM_MMIO_READ, 200 }, 201 { 202 .id = (uint8_t)IOCTL_ULPI_RESET, 203 .api_id = (uint8_t)PM_MMIO_WRITE, 204 }, 205 { 206 .id = (uint8_t)IOCTL_SET_BOOT_HEALTH_STATUS, 207 .api_id = (uint8_t)PM_MMIO_WRITE, 208 }, 209 { 210 .id = (uint8_t)IOCTL_AFI, 211 .api_id = (uint8_t)PM_MMIO_WRITE, 212 }, 213 }; 214 215 /* Expected firmware API version to TF-A */ 216 static const uint8_t tfa_expected_ver_id[] = { 217 [PM_SELF_SUSPEND] = FW_API_BASE_VERSION, 218 [PM_REQ_WAKEUP] = FW_API_BASE_VERSION, 219 [PM_ABORT_SUSPEND] = FW_API_BASE_VERSION, 220 [PM_SET_WAKEUP_SOURCE] = FW_API_BASE_VERSION, 221 [PM_SYSTEM_SHUTDOWN] = FW_API_BASE_VERSION, 222 [PM_GET_API_VERSION] = FW_API_BASE_VERSION, 223 [PM_PLL_SET_MODE] = FW_API_BASE_VERSION, 224 [PM_PLL_GET_MODE] = FW_API_BASE_VERSION, 225 [PM_CLOCK_ENABLE] = FW_API_BASE_VERSION, 226 [PM_CLOCK_DISABLE] = FW_API_BASE_VERSION, 227 [PM_CLOCK_GETSTATE] = FW_API_BASE_VERSION, 228 [PM_PLL_SET_PARAMETER] = FW_API_BASE_VERSION, 229 [PM_PLL_GET_PARAMETER] = FW_API_BASE_VERSION, 230 [PM_CLOCK_SETDIVIDER] = FW_API_BASE_VERSION, 231 [PM_CLOCK_GETDIVIDER] = FW_API_BASE_VERSION, 232 [PM_CLOCK_SETPARENT] = FW_API_BASE_VERSION, 233 [PM_CLOCK_GETPARENT] = FW_API_BASE_VERSION, 234 [PM_MMIO_WRITE] = FW_API_BASE_VERSION, 235 [PM_MMIO_READ] = FW_API_BASE_VERSION, 236 [PM_FEATURE_CHECK] = FW_API_VERSION_2, 237 }; 238 239 /* default shutdown/reboot scope is system(2) */ 240 static uint32_t pm_shutdown_scope = PMF_SHUTDOWN_SUBTYPE_SYSTEM; 241 242 /** 243 * pm_get_shutdown_scope() - Get the currently set shutdown scope. 244 * 245 * Return: Shutdown scope value. 246 * 247 */ 248 uint32_t pm_get_shutdown_scope(void) 249 { 250 return pm_shutdown_scope; 251 } 252 253 /** 254 * pm_self_suspend() - PM call for processor to suspend itself. 255 * @nid: Node id of the processor or subsystem. 256 * @latency: Requested maximum wakeup latency (not supported). 257 * @state: Requested state. 258 * @address: Resume address. 259 * @flag: 0 - Call from secure source. 260 * 1 - Call from non-secure source. 261 * 262 * This is a blocking call, it will return only once PMU has responded. 263 * On a wakeup, resume address will be automatically set by PMU. 264 * 265 * Return: Returns status, either success or error+reason. 266 * 267 */ 268 enum pm_ret_status pm_self_suspend(enum pm_node_id nid, 269 uint32_t latency, 270 uint32_t state, 271 uintptr_t address, 272 uint32_t flag) 273 { 274 (void)nid; 275 uint32_t payload[PAYLOAD_ARG_CNT]; 276 uint32_t cpuid = plat_my_core_pos(); 277 const struct pm_proc *proc = pm_get_proc(cpuid); 278 279 if (proc == NULL) { 280 WARN("Failed to get proc %d\n", cpuid); 281 return PM_RET_ERROR_INTERNAL; 282 } 283 284 /* 285 * Do client specific suspend operations 286 * (e.g. set powerdown request bit) 287 */ 288 pm_client_suspend(proc, state, flag); 289 /* Send request to the PMU */ 290 PM_PACK_PAYLOAD6(payload, flag, PM_SELF_SUSPEND, proc->node_id, 291 latency, state, address, (address >> 32)); 292 return pm_ipi_send_sync(proc, payload, NULL, 0); 293 } 294 295 /** 296 * pm_req_suspend() - PM call to request for another PU or subsystem to 297 * be suspended gracefully. 298 * @target: Node id of the targeted PU or subsystem. 299 * @ack: Flag to specify whether acknowledge is requested. 300 * @latency: Requested wakeup latency (not supported). 301 * @state: Requested state (not supported). 302 * @flag: 0 - Call from secure source. 303 * 1 - Call from non-secure source. 304 * 305 * Return: Returns status, either success or error+reason. 306 * 307 */ 308 enum pm_ret_status pm_req_suspend(enum pm_node_id target, 309 enum pm_request_ack ack, 310 uint32_t latency, uint32_t state, 311 uint32_t flag) 312 { 313 uint32_t payload[PAYLOAD_ARG_CNT]; 314 enum pm_ret_status ret = PM_RET_SUCCESS; 315 316 /* Send request to the PMU */ 317 PM_PACK_PAYLOAD5(payload, flag, PM_REQ_SUSPEND, target, ack, latency, state); 318 if (ack == REQ_ACK_BLOCKING) { 319 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 320 } else { 321 ret = pm_ipi_send(primary_proc, payload); 322 } 323 324 return ret; 325 } 326 327 /** 328 * pm_req_wakeup() - PM call for processor to wake up selected processor 329 * or subsystem. 330 * @target: Node id of the processor or subsystem to wake up. 331 * @ack: Flag to specify whether acknowledge requested. 332 * @set_address: Resume address presence indicator. 333 * 1 resume address specified, 0 otherwise. 334 * @address: Resume address. 335 * @flag: 0 - Call from secure source. 336 * 1 - Call from non-secure source. 337 * 338 * This API function is either used to power up another APU core for SMP 339 * (by PSCI) or to power up an entirely different PU or subsystem, such 340 * as RPU0, RPU, or PL_CORE_xx. Resume address for the target PU will be 341 * automatically set by PMU. 342 * 343 * Return: Returns status, either success or error+reason. 344 * 345 */ 346 enum pm_ret_status pm_req_wakeup(enum pm_node_id target, 347 uint32_t set_address, 348 uintptr_t address, 349 enum pm_request_ack ack, 350 uint32_t flag) 351 { 352 uint32_t payload[PAYLOAD_ARG_CNT]; 353 uint64_t encoded_address; 354 enum pm_ret_status ret = PM_RET_SUCCESS; 355 356 /* encode set Address into 1st bit of address */ 357 encoded_address = address; 358 encoded_address |= (uint32_t)!!set_address; 359 360 /* Send request to the PMU to perform the wake of the PU */ 361 PM_PACK_PAYLOAD5(payload, flag, PM_REQ_WAKEUP, target, encoded_address, 362 encoded_address >> 32, ack); 363 364 if (ack == REQ_ACK_BLOCKING) { 365 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 366 } else { 367 ret = pm_ipi_send(primary_proc, payload); 368 } 369 370 return ret; 371 } 372 373 /** 374 * pm_force_powerdown() - PM call to request for another PU or subsystem to 375 * be powered down forcefully. 376 * @target: Node id of the targeted PU or subsystem. 377 * @ack: Flag to specify whether acknowledge is requested. 378 * @flag: 0 - Call from secure source. 379 * 1 - Call from non-secure source. 380 * 381 * Return: Returns status, either success or error+reason. 382 * 383 */ 384 enum pm_ret_status pm_force_powerdown(enum pm_node_id target, 385 enum pm_request_ack ack, 386 uint32_t flag) 387 { 388 uint32_t payload[PAYLOAD_ARG_CNT]; 389 enum pm_ret_status ret = PM_RET_SUCCESS; 390 391 /* Send request to the PMU */ 392 PM_PACK_PAYLOAD3(payload, flag, PM_FORCE_POWERDOWN, target, ack); 393 394 if (ack == REQ_ACK_BLOCKING) { 395 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 396 } else { 397 ret = pm_ipi_send(primary_proc, payload); 398 } 399 400 return ret; 401 } 402 403 /** 404 * pm_abort_suspend() - PM call to announce that a prior suspend request 405 * is to be aborted. 406 * @reason: Reason for the abort. 407 * @flag: 0 - Call from secure source. 408 * 1 - Call from non-secure source. 409 * 410 * Calling PU expects the PMU to abort the initiated suspend procedure. 411 * This is a non-blocking call without any acknowledge. 412 * 413 * Return: Returns status, either success or error+reason 414 * 415 */ 416 enum pm_ret_status pm_abort_suspend(enum pm_abort_reason reason, uint32_t flag) 417 { 418 uint32_t payload[PAYLOAD_ARG_CNT]; 419 420 /* 421 * Do client specific abort suspend operations 422 * (e.g. enable interrupts and clear powerdown request bit) 423 */ 424 pm_client_abort_suspend(); 425 /* Send request to the PMU */ 426 /* TODO: allow passing the node ID of the affected CPU */ 427 PM_PACK_PAYLOAD3(payload, flag, PM_ABORT_SUSPEND, reason, 428 primary_proc->node_id); 429 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 430 } 431 432 /** 433 * pm_set_wakeup_source() - PM call to specify the wakeup source while 434 * suspended. 435 * @target: Node id of the targeted PU or subsystem. 436 * @wkup_node: Node id of the wakeup peripheral. 437 * @enable: Enable or disable the specified peripheral as wake source. 438 * @flag: 0 - Call from secure source. 439 * 1 - Call from non-secure source. 440 * 441 * Return: Returns status, either success or error+reason. 442 * 443 */ 444 enum pm_ret_status pm_set_wakeup_source(enum pm_node_id target, 445 enum pm_node_id wkup_node, 446 uint32_t enable, 447 uint32_t flag) 448 { 449 uint32_t payload[PAYLOAD_ARG_CNT]; 450 451 PM_PACK_PAYLOAD4(payload, flag, PM_SET_WAKEUP_SOURCE, target, wkup_node, 452 enable); 453 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 454 } 455 456 /** 457 * pm_system_shutdown() - PM call to request a system shutdown or restart. 458 * @type: Shutdown or restart? 0=shutdown, 1=restart, 2=setscope. 459 * @subtype: Scope: 0=APU-subsystem, 1=PS, 2=system. 460 * @flag: 0 - Call from secure source. 461 * 1 - Call from non-secure source. 462 * 463 * Return: Returns status, either success or error+reason. 464 * 465 */ 466 enum pm_ret_status pm_system_shutdown(uint32_t type, uint32_t subtype, 467 uint32_t flag) 468 { 469 uint32_t payload[PAYLOAD_ARG_CNT]; 470 enum pm_ret_status ret = PM_RET_SUCCESS; 471 472 if (type == (uint32_t)PMF_SHUTDOWN_TYPE_SETSCOPE_ONLY) { 473 /* Setting scope for subsequent PSCI reboot or shutdown */ 474 pm_shutdown_scope = subtype; 475 } else { 476 PM_PACK_PAYLOAD3(payload, flag, PM_SYSTEM_SHUTDOWN, type, subtype); 477 ret = pm_ipi_send_non_blocking(primary_proc, payload); 478 } 479 480 return ret; 481 } 482 483 /* APIs for managing PM slaves: */ 484 485 /** 486 * pm_req_node() - PM call to request a node with specific capabilities. 487 * @nid: Node id of the slave. 488 * @capabilities: Requested capabilities of the slave. 489 * @qos: Quality of service (not supported). 490 * @ack: Flag to specify whether acknowledge is requested. 491 * @flag: 0 - Call from secure source. 492 * 1 - Call from non-secure source. 493 * 494 * Return: Returns status, either success or error+reason. 495 * 496 */ 497 enum pm_ret_status pm_req_node(enum pm_node_id nid, 498 uint32_t capabilities, 499 uint32_t qos, 500 enum pm_request_ack ack, 501 uint32_t flag) 502 { 503 uint32_t payload[PAYLOAD_ARG_CNT]; 504 enum pm_ret_status ret = PM_RET_SUCCESS; 505 506 PM_PACK_PAYLOAD5(payload, flag, PM_REQ_NODE, nid, capabilities, qos, ack); 507 508 if (ack == REQ_ACK_BLOCKING) { 509 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 510 } else { 511 ret = pm_ipi_send(primary_proc, payload); 512 } 513 514 return ret; 515 } 516 517 /** 518 * pm_set_requirement() - PM call to set requirement for PM slaves. 519 * @nid: Node id of the slave. 520 * @capabilities: Requested capabilities of the slave. 521 * @qos: Quality of service (not supported). 522 * @ack: Flag to specify whether acknowledge is requested. 523 * @flag: 0 - Call from secure source. 524 * 1 - Call from non-secure source. 525 * 526 * This API function is to be used for slaves a PU already has requested. 527 * 528 * Return: Returns status, either success or error+reason. 529 * 530 */ 531 enum pm_ret_status pm_set_requirement(enum pm_node_id nid, 532 uint32_t capabilities, 533 uint32_t qos, 534 enum pm_request_ack ack, 535 uint32_t flag) 536 { 537 uint32_t payload[PAYLOAD_ARG_CNT]; 538 enum pm_ret_status ret = PM_RET_SUCCESS; 539 540 PM_PACK_PAYLOAD5(payload, flag, PM_SET_REQUIREMENT, nid, capabilities, qos, 541 ack); 542 543 if (ack == REQ_ACK_BLOCKING) { 544 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 545 } else { 546 ret = pm_ipi_send(primary_proc, payload); 547 } 548 549 return ret; 550 } 551 552 /* Miscellaneous API functions */ 553 554 /** 555 * pm_get_api_version() - Get version number of PMU PM firmware. 556 * @version: Returns 32-bit version number of PMU Power Management Firmware. 557 * @flag: 0 - Call from secure source. 558 * 1 - Call from non-secure source. 559 * 560 * Return: Returns status, either success or error+reason. 561 * 562 */ 563 enum pm_ret_status pm_get_api_version(uint32_t *version, uint32_t flag) 564 { 565 uint32_t payload[PAYLOAD_ARG_CNT]; 566 enum pm_ret_status ret; 567 568 /* Send request to the PMU */ 569 PM_PACK_PAYLOAD1(payload, flag, PM_GET_API_VERSION); 570 ret = pm_ipi_send_sync(primary_proc, payload, version, 1); 571 return ret; 572 } 573 574 /** 575 * pm_get_node_status() - PM call to request a node's current status. 576 * @nid: Node id. 577 * @ret_buff: Buffer for the return values 578 * [0] - Current power state of the node 579 * [1] - Current requirements for the node (slave nodes only) 580 * [2] - Current usage status for the node (slave nodes only) 581 * @flag: 0 - Call from secure source. 582 * 1 - Call from non-secure source. 583 * 584 * Return: Returns status, either success or error+reason. 585 * 586 */ 587 enum pm_ret_status pm_get_node_status(enum pm_node_id nid, 588 uint32_t *ret_buff, 589 uint32_t flag) 590 { 591 uint32_t payload[PAYLOAD_ARG_CNT]; 592 593 PM_PACK_PAYLOAD2(payload, flag, PM_GET_NODE_STATUS, nid); 594 return pm_ipi_send_sync(primary_proc, payload, ret_buff, 3); 595 } 596 597 /** 598 * pm_mmio_write() - Perform write to protected mmio. 599 * @address: Address to write to. 600 * @mask: Mask to apply. 601 * @value: Value to write. 602 * @flag: 0 - Call from secure source. 603 * 1 - Call from non-secure source. 604 * 605 * This function provides access to PM-related control registers 606 * that may not be directly accessible by a particular PU. 607 * 608 * Return: Returns status, either success or error+reason. 609 * 610 */ 611 enum pm_ret_status pm_mmio_write(uintptr_t address, 612 uint32_t mask, 613 uint32_t value, 614 uint32_t flag) 615 { 616 uint32_t payload[PAYLOAD_ARG_CNT]; 617 618 /* Send request to the PMU */ 619 PM_PACK_PAYLOAD4(payload, flag, PM_MMIO_WRITE, address, mask, value); 620 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 621 } 622 623 /** 624 * pm_mmio_read() - Read value from protected mmio. 625 * @address: Address to write to. 626 * @value: Value to write. 627 * @flag: 0 - Call from secure source. 628 * 1 - Call from non-secure source. 629 * 630 * This function provides access to PM-related control registers 631 * that may not be directly accessible by a particular PU. 632 * 633 * Return: Returns status, either success or error+reason. 634 * 635 */ 636 enum pm_ret_status pm_mmio_read(uintptr_t address, uint32_t *value, uint32_t flag) 637 { 638 uint32_t payload[PAYLOAD_ARG_CNT]; 639 640 /* Send request to the PMU */ 641 PM_PACK_PAYLOAD2(payload, flag, PM_MMIO_READ, address); 642 return pm_ipi_send_sync(primary_proc, payload, value, 1); 643 } 644 645 /** 646 * pm_fpga_load() - Load the bitstream into the PL. This function provides 647 * access to the xilfpga library to load the Bit-stream 648 * into PL. 649 * @address_low: lower 32-bit Linear memory space address. 650 * @address_high: higher 32-bit Linear memory space address. 651 * @size: Number of 32bit words. 652 * @flags: Additional flags or settings for the fpga operation. 653 * @security_flag: 0 - Call from secure source. 654 * 1 - Call from non-secure source. 655 * 656 * Return: Returns status, either success or error+reason. 657 * 658 */ 659 enum pm_ret_status pm_fpga_load(uint32_t address_low, 660 uint32_t address_high, 661 uint32_t size, 662 uint32_t flags, 663 uint32_t security_flag) 664 { 665 uint32_t payload[PAYLOAD_ARG_CNT]; 666 667 /* Send request to the PMU */ 668 PM_PACK_PAYLOAD5(payload, security_flag, PM_FPGA_LOAD, address_high, 669 address_low, size, flags); 670 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 671 } 672 673 /** 674 * pm_fpga_get_status() - Read value from fpga status register. 675 * @value: Value to read. 676 * @flag: 0 - Call from secure source. 677 * 1 - Call from non-secure source. 678 * 679 * This function provides access to the xilfpga library to get 680 * the fpga status. 681 * 682 * Return: Returns status, either success or error+reason. 683 * 684 */ 685 enum pm_ret_status pm_fpga_get_status(uint32_t *value, uint32_t flag) 686 { 687 uint32_t payload[PAYLOAD_ARG_CNT]; 688 689 /* Send request to the PMU */ 690 PM_PACK_PAYLOAD1(payload, flag, PM_FPGA_GET_STATUS); 691 return pm_ipi_send_sync(primary_proc, payload, value, 1); 692 } 693 694 /** 695 * pm_get_chipid() - Read silicon ID registers. 696 * @value: Buffer for return values. Must be large enough to hold 8 bytes. 697 * @flag: 0 - Call from secure source. 698 * 1 - Call from non-secure source. 699 * 700 * Return: Returns silicon ID registers. 701 * 702 */ 703 enum pm_ret_status pm_get_chipid(uint32_t *value, uint32_t flag) 704 { 705 uint32_t payload[PAYLOAD_ARG_CNT]; 706 707 /* Send request to the PMU */ 708 PM_PACK_PAYLOAD1(payload, flag, PM_GET_CHIPID); 709 return pm_ipi_send_sync(primary_proc, payload, value, 2); 710 } 711 712 /** 713 * pm_secure_rsaaes() - Load the secure images. 714 * @address_low: lower 32-bit Linear memory space address. 715 * @address_high: higher 32-bit Linear memory space address. 716 * @size: Number of 32bit words. 717 * @flags: Additional flags or settings for the fpga operation. 718 * @security_flag: 0 - Call from secure source. 719 * 1 - Call from non-secure source. 720 * 721 * This function provides access to the xilsecure library to load the 722 * authenticated, encrypted, and authenticated/encrypted images. 723 * 724 * Return: Returns status, either success or error+reason. 725 * 726 */ 727 enum pm_ret_status pm_secure_rsaaes(uint32_t address_low, 728 uint32_t address_high, 729 uint32_t size, 730 uint32_t flags, 731 uint32_t security_flag) 732 { 733 uint32_t payload[PAYLOAD_ARG_CNT]; 734 735 /* Send request to the PMU */ 736 PM_PACK_PAYLOAD5(payload, security_flag, PM_SECURE_RSA_AES, address_high, 737 address_low, size, flags); 738 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 739 } 740 741 /** 742 * pm_aes_engine() - Aes data blob encryption/decryption. 743 * @address_low: lower 32-bit address of the AesParams structure. 744 * @address_high: higher 32-bit address of the AesParams structure. 745 * @value: Returned output value. 746 * @flag: 0 - Call from secure source. 747 * 1 - Call from non-secure source. 748 * 749 * This function provides access to the xilsecure library to 750 * encrypt/decrypt data blobs. 751 * 752 * Return: Returns status, either success or error+reason. 753 * 754 */ 755 enum pm_ret_status pm_aes_engine(uint32_t address_high, 756 uint32_t address_low, 757 uint32_t *value, 758 uint32_t flag) 759 { 760 uint32_t payload[PAYLOAD_ARG_CNT]; 761 762 /* Send request to the PMU */ 763 PM_PACK_PAYLOAD3(payload, flag, PM_SECURE_AES, address_high, address_low); 764 return pm_ipi_send_sync(primary_proc, payload, value, 1); 765 } 766 767 /** 768 * pm_get_callbackdata() - Read from IPI response buffer. 769 * @data: array of PAYLOAD_ARG_CNT elements. 770 * @count: Number of values to return. 771 * 772 * Read value from ipi buffer response buffer. 773 * Return: Returns status, either success or error. 774 * 775 */ 776 enum pm_ret_status pm_get_callbackdata(uint32_t *data, size_t count) 777 { 778 enum pm_ret_status ret = PM_RET_SUCCESS; 779 780 /* Return if interrupt is not from PMU */ 781 if ((pm_ipi_irq_status(primary_proc) == 0U)) { 782 goto exit_label; 783 } 784 785 ret = pm_ipi_buff_read_callb(data, count); 786 pm_ipi_irq_clear(primary_proc); 787 788 exit_label: 789 return ret; 790 } 791 792 /** 793 * pm_ioctl() - PM IOCTL API for device control and configs. 794 * @nid: Node ID of the device. 795 * @ioctl_id: ID of the requested IOCTL. 796 * @arg1: Argument 1 to requested IOCTL call. 797 * @arg2: Argument 2 to requested IOCTL call. 798 * @value: Returned output value. 799 * @flag: 0 - Call from secure source. 800 * 1 - Call from non-secure source. 801 * 802 * This function calls IOCTL to firmware for device control and configuration. 803 * 804 * Return: Returns status, either success or error+reason. 805 * 806 */ 807 enum pm_ret_status pm_ioctl(enum pm_node_id nid, 808 uint32_t ioctl_id, 809 uint32_t arg1, 810 uint32_t arg2, 811 uint32_t *value, 812 uint32_t flag) 813 { 814 return pm_api_ioctl(nid, ioctl_id, arg1, arg2, value, flag); 815 } 816 817 /** 818 * fw_api_version() - Returns API version implemented in firmware. 819 * @id: API ID to check. 820 * @version: Returned supported API version. 821 * @len: Number of words to be returned. 822 * @flag: 0 - Call from secure source. 823 * 1 - Call from non-secure source. 824 * 825 * Return: Returns status, either success or error+reason. 826 * 827 */ 828 static enum pm_ret_status fw_api_version(uint32_t id, uint32_t *version, 829 uint32_t len, uint32_t flag) 830 { 831 uint32_t payload[PAYLOAD_ARG_CNT]; 832 833 PM_PACK_PAYLOAD2(payload, flag, PM_FEATURE_CHECK, id); 834 return pm_ipi_send_sync(primary_proc, payload, version, len); 835 } 836 837 /** 838 * check_api_dependency() - API to check dependent EEMI API version. 839 * @id: EEMI API ID to check. 840 * @flag: 0 - Call from secure source. 841 * 1 - Call from non-secure source. 842 * 843 * Return: Returns status, either success or error+reason. 844 * 845 */ 846 enum pm_ret_status check_api_dependency(uint8_t id, uint32_t flag) 847 { 848 uint8_t i; 849 uint32_t version_type; 850 enum pm_ret_status ret = PM_RET_SUCCESS; 851 852 for (i = 0U; i < ARRAY_SIZE(api_dep_table); i++) { 853 if (api_dep_table[i].id == id) { 854 if (api_dep_table[i].api_id == 0U) { 855 break; 856 } 857 858 ret = fw_api_version(api_dep_table[i].api_id, 859 &version_type, 1, flag); 860 if (ret != PM_RET_SUCCESS) { 861 goto exit_label; 862 } 863 864 /* Check if fw version matches TF-A expected version */ 865 if (version_type != tfa_expected_ver_id[api_dep_table[i].api_id]) { 866 ret = PM_RET_ERROR_NOTSUPPORTED; 867 goto exit_label; 868 } 869 } 870 } 871 872 exit_label: 873 return ret; 874 } 875 876 /** 877 * feature_check_tfa() - These are API's completely implemented in TF-A. 878 * @api_id: API ID to check. 879 * @version: Returned supported API version. 880 * @bit_mask: Returned supported IOCTL id version. 881 * 882 * Return: Returns status, either success or error+reason. 883 * 884 */ 885 static enum pm_ret_status feature_check_tfa(uint32_t api_id, uint32_t *version, 886 uint32_t *bit_mask) 887 { 888 enum pm_ret_status ret = PM_RET_ERROR_NO_FEATURE; 889 890 switch (api_id) { 891 case PM_QUERY_DATA: 892 *version = TFA_API_QUERY_DATA_VERSION; 893 bit_mask[0] = (uint32_t)(PM_QUERY_FEATURE_BITMASK); 894 bit_mask[1] = (uint32_t)(PM_QUERY_FEATURE_BITMASK >> 32); 895 ret = PM_RET_SUCCESS; 896 break; 897 case PM_GET_CALLBACK_DATA: 898 case PM_GET_TRUSTZONE_VERSION: 899 case PM_SET_SUSPEND_MODE: 900 *version = TFA_API_BASE_VERSION; 901 ret = PM_RET_SUCCESS; 902 break; 903 default: 904 break; 905 } 906 907 return ret; 908 } 909 910 /** 911 * get_tfa_version_for_partial_apis() - Return TF-A version for partially. 912 * implemented APIs 913 * @api_id: API ID to check. 914 * @version: Returned supported API version. 915 * 916 * Return: Returns status, either success or error+reason. 917 * 918 */ 919 static enum pm_ret_status get_tfa_version_for_partial_apis(uint32_t api_id, 920 uint32_t *version) 921 { 922 enum pm_ret_status ret = PM_RET_ERROR_ARGS; 923 924 switch (api_id) { 925 case PM_SELF_SUSPEND: 926 case PM_REQ_WAKEUP: 927 case PM_ABORT_SUSPEND: 928 case PM_SET_WAKEUP_SOURCE: 929 case PM_SYSTEM_SHUTDOWN: 930 case PM_GET_API_VERSION: 931 case PM_CLOCK_ENABLE: 932 case PM_CLOCK_DISABLE: 933 case PM_CLOCK_GETSTATE: 934 case PM_CLOCK_SETDIVIDER: 935 case PM_CLOCK_GETDIVIDER: 936 case PM_CLOCK_SETPARENT: 937 case PM_CLOCK_GETPARENT: 938 case PM_PLL_SET_PARAMETER: 939 case PM_PLL_GET_PARAMETER: 940 case PM_PLL_SET_MODE: 941 case PM_PLL_GET_MODE: 942 case PM_REGISTER_ACCESS: 943 *version = TFA_API_BASE_VERSION; 944 ret = PM_RET_SUCCESS; 945 break; 946 case PM_FEATURE_CHECK: 947 *version = FW_API_VERSION_2; 948 ret = PM_RET_SUCCESS; 949 break; 950 default: 951 break; 952 } 953 954 return ret; 955 } 956 957 /** 958 * feature_check_partial() - These are API's partially implemented in 959 * TF-A and firmware both. 960 * @api_id: API ID to check. 961 * @version: Returned supported API version. 962 * @flag: 0 - Call from secure source. 963 * 1 - Call from non-secure source. 964 * 965 * Return: Returns status, either success or error+reason. 966 * 967 */ 968 static enum pm_ret_status feature_check_partial(uint32_t api_id, 969 uint32_t *version, 970 uint32_t flag) 971 { 972 uint32_t status; 973 uint32_t ret = PM_RET_ERROR_NO_FEATURE; 974 975 switch (api_id) { 976 case PM_SELF_SUSPEND: 977 case PM_REQ_WAKEUP: 978 case PM_ABORT_SUSPEND: 979 case PM_SET_WAKEUP_SOURCE: 980 case PM_SYSTEM_SHUTDOWN: 981 case PM_GET_API_VERSION: 982 case PM_CLOCK_ENABLE: 983 case PM_CLOCK_DISABLE: 984 case PM_CLOCK_GETSTATE: 985 case PM_CLOCK_SETDIVIDER: 986 case PM_CLOCK_GETDIVIDER: 987 case PM_CLOCK_SETPARENT: 988 case PM_CLOCK_GETPARENT: 989 case PM_PLL_SET_PARAMETER: 990 case PM_PLL_GET_PARAMETER: 991 case PM_PLL_SET_MODE: 992 case PM_PLL_GET_MODE: 993 case PM_REGISTER_ACCESS: 994 case PM_FEATURE_CHECK: 995 status = check_api_dependency(api_id, flag); 996 if (status != PM_RET_SUCCESS) { 997 ret = status; 998 } else { 999 ret = get_tfa_version_for_partial_apis(api_id, version); 1000 } 1001 break; 1002 default: 1003 break; 1004 } 1005 1006 return ret; 1007 } 1008 1009 /** 1010 * pm_feature_check() - Returns the supported API version if supported. 1011 * @api_id: API ID to check. 1012 * @version: Returned supported API version. 1013 * @bit_mask: Returned supported IOCTL id version. 1014 * @len: Number of bytes to be returned in bit_mask variable. 1015 * @flag: 0 - Call from secure source. 1016 * 1 - Call from non-secure source. 1017 * 1018 * Return: Returns status, either success or error+reason. 1019 * 1020 */ 1021 enum pm_ret_status pm_feature_check(uint32_t api_id, uint32_t *version, 1022 uint32_t *bit_mask, uint8_t len, 1023 uint32_t flag) 1024 { 1025 uint32_t ret_payload[RET_PAYLOAD_ARG_CNT] = {0U}; 1026 enum pm_ret_status status; 1027 1028 /* Get API version implemented in TF-A */ 1029 status = feature_check_tfa(api_id, version, bit_mask); 1030 if (status != PM_RET_ERROR_NO_FEATURE) { 1031 goto exit_label; 1032 } 1033 1034 /* Get API version implemented by firmware and TF-A both */ 1035 status = feature_check_partial(api_id, version, flag); 1036 if (status != PM_RET_ERROR_NO_FEATURE) { 1037 goto exit_label; 1038 } 1039 1040 /* Get API version implemented by firmware */ 1041 status = fw_api_version(api_id, ret_payload, 3, flag); 1042 /* IOCTL call may return failure whose ID is not implemented in 1043 * firmware but implemented in TF-A 1044 */ 1045 if ((api_id != (uint32_t)PM_IOCTL) && (status != PM_RET_SUCCESS)) { 1046 goto exit_label; 1047 } 1048 1049 *version = ret_payload[0]; 1050 1051 /* Update IOCTL bit mask which are implemented in TF-A */ 1052 if ((api_id == (uint32_t)PM_IOCTL) || (api_id == (uint32_t)PM_GET_OP_CHARACTERISTIC)) { 1053 if (len < 2U) { 1054 status = PM_RET_ERROR_ARGS; 1055 goto exit_label; 1056 } 1057 bit_mask[0] = ret_payload[1]; 1058 bit_mask[1] = ret_payload[2]; 1059 if (api_id == (uint32_t)PM_IOCTL) { 1060 /* Get IOCTL's implemented by TF-A */ 1061 status = tfa_ioctl_bitmask(bit_mask, flag); 1062 } 1063 } else { 1064 /* Requires for MISRA */ 1065 } 1066 1067 exit_label: 1068 return status; 1069 } 1070 1071 /** 1072 * pm_clock_get_max_divisor - PM call to get max divisor. 1073 * @clock_id: Clock ID. 1074 * @div_type: Divisor ID (TYPE_DIV1 or TYPE_DIV2). 1075 * @max_div: Maximum supported divisor. 1076 * 1077 * This function is used by master to get maximum supported value. 1078 * 1079 * Return: Returns status, either success or error+reason. 1080 * 1081 */ 1082 static enum pm_ret_status pm_clock_get_max_divisor(uint32_t clock_id, 1083 uint8_t div_type, 1084 uint32_t *max_div) 1085 { 1086 return pm_api_clock_get_max_divisor(clock_id, div_type, max_div); 1087 } 1088 1089 /** 1090 * pm_clock_get_num_clocks - PM call to request number of clocks. 1091 * @nclocks: Number of clocks. 1092 * 1093 * This function is used by master to get number of clocks. 1094 * 1095 * Return: Returns status, either success or error+reason. 1096 * 1097 */ 1098 static enum pm_ret_status pm_clock_get_num_clocks(uint32_t *nclocks) 1099 { 1100 return pm_api_clock_get_num_clocks(nclocks); 1101 } 1102 1103 /** 1104 * pm_clock_get_name() - PM call to request a clock's name. 1105 * @clock_id: Clock ID. 1106 * @name: Name of clock (max 16 bytes). 1107 * 1108 * This function is used by master to get nmae of clock specified 1109 * by given clock ID. 1110 * 1111 */ 1112 static void pm_clock_get_name(uint32_t clock_id, char *name) 1113 { 1114 pm_api_clock_get_name(clock_id, name); 1115 } 1116 1117 /** 1118 * pm_clock_get_topology() - PM call to request a clock's topology. 1119 * @clock_id: Clock ID. 1120 * @index: Topology index for next toplogy node. 1121 * @topology: Buffer to store nodes in topology and flags. 1122 * 1123 * This function is used by master to get topology information for the 1124 * clock specified by given clock ID. Each response would return 3 1125 * topology nodes. To get next nodes, caller needs to call this API with 1126 * index of next node. Index starts from 0. 1127 * 1128 * Return: Returns status, either success or error+reason. 1129 * 1130 */ 1131 static enum pm_ret_status pm_clock_get_topology(uint32_t clock_id, 1132 uint32_t index, 1133 uint32_t *topology) 1134 { 1135 return pm_api_clock_get_topology(clock_id, index, topology); 1136 } 1137 1138 /** 1139 * pm_clock_get_fixedfactor_params() - PM call to request a clock's fixed factor 1140 * parameters for fixed clock. 1141 * @clock_id: Clock ID. 1142 * @mul: Multiplication value. 1143 * @div: Divisor value. 1144 * 1145 * This function is used by master to get fixed factor parameers for the 1146 * fixed clock. This API is application only for the fixed clock. 1147 * 1148 * Return: Returns status, either success or error+reason. 1149 * 1150 */ 1151 static enum pm_ret_status pm_clock_get_fixedfactor_params(uint32_t clock_id, 1152 uint32_t *mul, 1153 uint32_t *div) 1154 { 1155 return pm_api_clock_get_fixedfactor_params(clock_id, mul, div); 1156 } 1157 1158 /** 1159 * pm_clock_get_parents() - PM call to request a clock's first 3 parents. 1160 * @clock_id: Clock ID. 1161 * @index: Index of next parent. 1162 * @parents: Parents of the given clock. 1163 * 1164 * This function is used by master to get clock's parents information. 1165 * This API will return 3 parents with a single response. To get other 1166 * parents, master should call same API in loop with new parent index 1167 * till error is returned. 1168 * 1169 * E.g First call should have index 0 which will return parents 0, 1 and 1170 * 2. Next call, index should be 3 which will return parent 3,4 and 5 and 1171 * so on. 1172 * 1173 * Return: Returns status, either success or error+reason. 1174 * 1175 */ 1176 static enum pm_ret_status pm_clock_get_parents(uint32_t clock_id, 1177 uint32_t index, 1178 uint32_t *parents) 1179 { 1180 return pm_api_clock_get_parents(clock_id, index, parents); 1181 } 1182 1183 /** 1184 * pm_clock_get_attributes() - PM call to request a clock's attributes. 1185 * @clock_id: Clock ID. 1186 * @attr: Clock attributes. 1187 * 1188 * This function is used by master to get clock's attributes 1189 * (e.g. valid, clock type, etc). 1190 * 1191 * Return: Returns status, either success or error+reason. 1192 * 1193 */ 1194 static enum pm_ret_status pm_clock_get_attributes(uint32_t clock_id, 1195 uint32_t *attr) 1196 { 1197 return pm_api_clock_get_attributes(clock_id, attr); 1198 } 1199 1200 /** 1201 * pm_clock_gate() - Configure clock gate. 1202 * @clock_id: Id of the clock to be configured. 1203 * @enable: Flag 0=disable (gate the clock), !0=enable (activate the clock). 1204 * @flag: 0 - Call from secure source. 1205 * 1 - Call from non-secure source. 1206 * 1207 * Return: Error if an argument is not valid or status as returned by the 1208 * PM controller (PMU). 1209 * 1210 */ 1211 static enum pm_ret_status pm_clock_gate(uint32_t clock_id, 1212 uint8_t enable, 1213 uint32_t flag) 1214 { 1215 uint32_t payload[PAYLOAD_ARG_CNT]; 1216 enum pm_ret_status status; 1217 enum pm_api_id api_id; 1218 1219 /* Check if clock ID is valid and return an error if it is not */ 1220 status = pm_clock_id_is_valid(clock_id); 1221 if (status != PM_RET_SUCCESS) { 1222 goto exit_label; 1223 } 1224 1225 if (enable != 0U) { 1226 api_id = PM_CLOCK_ENABLE; 1227 } else { 1228 api_id = PM_CLOCK_DISABLE; 1229 } 1230 1231 /* Send request to the PMU */ 1232 PM_PACK_PAYLOAD2(payload, flag, api_id, clock_id); 1233 status = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1234 1235 /* If action fails due to the lack of permissions filter the error */ 1236 if (status == PM_RET_ERROR_ACCESS) { 1237 status = PM_RET_SUCCESS; 1238 } 1239 1240 exit_label: 1241 return status; 1242 } 1243 1244 /** 1245 * pm_clock_enable() - Enable the clock for given id. 1246 * @clock_id: Id of the clock to be enabled. 1247 * @flag: 0 - Call from secure source. 1248 * 1 - Call from non-secure source. 1249 * 1250 * This function is used by master to enable the clock 1251 * including peripherals and PLL clocks. 1252 * 1253 * Return: Error if an argument is not valid or status as returned by the 1254 * pm_clock_gate. 1255 * 1256 */ 1257 enum pm_ret_status pm_clock_enable(uint32_t clock_id, uint32_t flag) 1258 { 1259 struct pm_pll *pll; 1260 enum pm_ret_status ret = PM_RET_SUCCESS; 1261 1262 /* First try to handle it as a PLL */ 1263 pll = pm_clock_get_pll(clock_id); 1264 if (pll != NULL) { 1265 ret = pm_clock_pll_enable(pll, flag); 1266 } else { 1267 1268 /* It's an on-chip clock, PMU should configure clock's gate */ 1269 ret = pm_clock_gate(clock_id, 1, flag); 1270 } 1271 1272 return ret; 1273 } 1274 1275 /** 1276 * pm_clock_disable - Disable the clock for given id. 1277 * @clock_id: Id of the clock to be disable. 1278 * @flag: 0 - Call from secure source. 1279 * 1 - Call from non-secure source. 1280 * 1281 * This function is used by master to disable the clock 1282 * including peripherals and PLL clocks. 1283 * 1284 * Return: Error if an argument is not valid or status as returned by the 1285 * pm_clock_gate 1286 * 1287 */ 1288 enum pm_ret_status pm_clock_disable(uint32_t clock_id, uint32_t flag) 1289 { 1290 struct pm_pll *pll; 1291 enum pm_ret_status ret = PM_RET_SUCCESS; 1292 1293 /* First try to handle it as a PLL */ 1294 pll = pm_clock_get_pll(clock_id); 1295 if (pll != NULL) { 1296 ret = pm_clock_pll_disable(pll, flag); 1297 } else { 1298 1299 /* It's an on-chip clock, PMU should configure clock's gate */ 1300 ret = pm_clock_gate(clock_id, 0, flag); 1301 } 1302 1303 return ret; 1304 } 1305 1306 /** 1307 * pm_clock_getstate - Get the clock state for given id. 1308 * @clock_id: Id of the clock to be queried. 1309 * @state: 1/0 (Enabled/Disabled). 1310 * @flag: 0 - Call from secure source. 1311 * 1 - Call from non-secure source. 1312 * 1313 * This function is used by master to get the state of clock 1314 * including peripherals and PLL clocks. 1315 * 1316 * Return: Returns status, either success or error+reason. 1317 * 1318 */ 1319 enum pm_ret_status pm_clock_getstate(uint32_t clock_id, 1320 uint32_t *state, 1321 uint32_t flag) 1322 { 1323 struct pm_pll *pll; 1324 uint32_t payload[PAYLOAD_ARG_CNT]; 1325 enum pm_ret_status status; 1326 1327 /* First try to handle it as a PLL */ 1328 pll = pm_clock_get_pll(clock_id); 1329 if (pll != NULL) { 1330 status = pm_clock_pll_get_state(pll, state, flag); 1331 goto exit_label; 1332 } 1333 /* Check if clock ID is a valid on-chip clock */ 1334 status = pm_clock_id_is_valid(clock_id); 1335 if (status != PM_RET_SUCCESS) { 1336 goto exit_label; 1337 } 1338 1339 /* Send request to the PMU */ 1340 PM_PACK_PAYLOAD2(payload, flag, PM_CLOCK_GETSTATE, clock_id); 1341 status = pm_ipi_send_sync(primary_proc, payload, state, 1); 1342 1343 exit_label: 1344 return status; 1345 } 1346 1347 /** 1348 * pm_clock_setdivider - Set the clock divider for given id. 1349 * @clock_id: Id of the clock. 1350 * @divider: divider value. 1351 * @flag: 0 - Call from secure source. 1352 * 1 - Call from non-secure source. 1353 * 1354 * This function is used by master to set divider for any clock 1355 * to achieve desired rate. 1356 * 1357 * Return: Returns status, either success or error+reason. 1358 * 1359 */ 1360 enum pm_ret_status pm_clock_setdivider(uint32_t clock_id, 1361 uint32_t divider, 1362 uint32_t flag) 1363 { 1364 enum pm_ret_status status; 1365 enum pm_node_id nid; 1366 enum pm_clock_div_id div_id; 1367 uint32_t payload[PAYLOAD_ARG_CNT]; 1368 const uint32_t div0 = 0xFFFF0000; 1369 const uint32_t div1 = 0x0000FFFF; 1370 uint32_t val; 1371 1372 /* Get PLL node ID using PLL clock ID */ 1373 status = pm_clock_get_pll_node_id(clock_id, &nid); 1374 if (status == PM_RET_SUCCESS) { 1375 status = pm_pll_set_parameter(nid, PM_PLL_PARAM_FBDIV, divider, 1376 flag); 1377 goto exit_label; 1378 } 1379 1380 /* Check if clock ID is a valid on-chip clock */ 1381 status = pm_clock_id_is_valid(clock_id); 1382 if (status != PM_RET_SUCCESS) { 1383 goto exit_label; 1384 } 1385 1386 if (div0 == (divider & div0)) { 1387 div_id = PM_CLOCK_DIV0_ID; 1388 val = divider & ~div0; 1389 } else if (div1 == (divider & div1)) { 1390 div_id = PM_CLOCK_DIV1_ID; 1391 val = (divider & ~div1) >> 16; 1392 } else { 1393 status = PM_RET_ERROR_ARGS; 1394 goto exit_label; 1395 } 1396 1397 /* Send request to the PMU */ 1398 PM_PACK_PAYLOAD4(payload, flag, PM_CLOCK_SETDIVIDER, clock_id, div_id, val); 1399 status = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1400 1401 exit_label: 1402 return status; 1403 } 1404 1405 /** 1406 * pm_clock_getdivider - Get the clock divider for given id. 1407 * @clock_id: Id of the clock. 1408 * @divider: divider value. 1409 * @flag: 0 - Call from secure source. 1410 * 1 - Call from non-secure source. 1411 * 1412 * This function is used by master to get divider values 1413 * for any clock. 1414 * 1415 * Return: Returns status, either success or error+reason. 1416 * 1417 */ 1418 enum pm_ret_status pm_clock_getdivider(uint32_t clock_id, 1419 uint32_t *divider, 1420 uint32_t flag) 1421 { 1422 enum pm_ret_status status = PM_RET_SUCCESS; 1423 enum pm_node_id nid; 1424 uint32_t payload[PAYLOAD_ARG_CNT]; 1425 uint32_t val; 1426 1427 /* Get PLL node ID using PLL clock ID */ 1428 status = pm_clock_get_pll_node_id(clock_id, &nid); 1429 if (status == PM_RET_SUCCESS) { 1430 status = pm_pll_get_parameter(nid, PM_PLL_PARAM_FBDIV, divider, 1431 flag); 1432 goto exit_label; 1433 } 1434 1435 /* Check if clock ID is a valid on-chip clock */ 1436 status = pm_clock_id_is_valid(clock_id); 1437 if (status != PM_RET_SUCCESS) { 1438 goto exit_label; 1439 } 1440 1441 if ((pm_clock_has_div(clock_id, PM_CLOCK_DIV0_ID)) != 0U) { 1442 /* Send request to the PMU to get div0 */ 1443 PM_PACK_PAYLOAD3(payload, flag, PM_CLOCK_GETDIVIDER, clock_id, 1444 PM_CLOCK_DIV0_ID); 1445 status = pm_ipi_send_sync(primary_proc, payload, &val, 1); 1446 if (status != PM_RET_SUCCESS) { 1447 goto exit_label; 1448 } 1449 *divider = val; 1450 } 1451 1452 if ((pm_clock_has_div(clock_id, PM_CLOCK_DIV1_ID)) != 0U) { 1453 /* Send request to the PMU to get div1 */ 1454 PM_PACK_PAYLOAD3(payload, flag, PM_CLOCK_GETDIVIDER, clock_id, 1455 PM_CLOCK_DIV1_ID); 1456 status = pm_ipi_send_sync(primary_proc, payload, &val, 1); 1457 if (status != PM_RET_SUCCESS) { 1458 goto exit_label; 1459 } 1460 *divider |= val << 16; 1461 } 1462 exit_label: 1463 return status; 1464 } 1465 1466 /** 1467 * pm_clock_setparent - Set the clock parent for given id. 1468 * @clock_id: Id of the clock. 1469 * @parent_index: Index of the parent clock into clock's parents array. 1470 * @flag: 0 - Call from secure source. 1471 * 1 - Call from non-secure source. 1472 * 1473 * This function is used by master to set parent for any clock. 1474 * 1475 * Return: Returns status, either success or error+reason. 1476 * 1477 */ 1478 enum pm_ret_status pm_clock_setparent(uint32_t clock_id, 1479 uint32_t parent_index, 1480 uint32_t flag) 1481 { 1482 struct pm_pll *pll; 1483 uint32_t payload[PAYLOAD_ARG_CNT]; 1484 enum pm_ret_status status; 1485 1486 /* First try to handle it as a PLL */ 1487 pll = pm_clock_get_pll_by_related_clk(clock_id); 1488 if (pll != NULL) { 1489 status = pm_clock_pll_set_parent(pll, clock_id, parent_index, 1490 flag); 1491 goto exit_label; 1492 } 1493 1494 /* Check if clock ID is a valid on-chip clock */ 1495 status = pm_clock_id_is_valid(clock_id); 1496 if (status != PM_RET_SUCCESS) { 1497 goto exit_label; 1498 } 1499 1500 /* Send request to the PMU */ 1501 PM_PACK_PAYLOAD3(payload, flag, PM_CLOCK_SETPARENT, clock_id, parent_index); 1502 status = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1503 1504 exit_label: 1505 return status; 1506 } 1507 1508 /** 1509 * pm_clock_getparent - Get the clock parent for given id. 1510 * @clock_id: Id of the clock. 1511 * @parent_index: parent index. 1512 * @flag: 0 - Call from secure source. 1513 * 1 - Call from non-secure source. 1514 * 1515 * This function is used by master to get parent index 1516 * for any clock. 1517 * 1518 * Return: Returns status, either success or error+reason. 1519 * 1520 */ 1521 enum pm_ret_status pm_clock_getparent(uint32_t clock_id, 1522 uint32_t *parent_index, 1523 uint32_t flag) 1524 { 1525 struct pm_pll *pll; 1526 uint32_t payload[PAYLOAD_ARG_CNT]; 1527 enum pm_ret_status status; 1528 1529 /* First try to handle it as a PLL */ 1530 pll = pm_clock_get_pll_by_related_clk(clock_id); 1531 if (pll != NULL) { 1532 status = pm_clock_pll_get_parent(pll, clock_id, parent_index, 1533 flag); 1534 goto exit_label; 1535 } 1536 1537 /* Check if clock ID is a valid on-chip clock */ 1538 status = pm_clock_id_is_valid(clock_id); 1539 if (status != PM_RET_SUCCESS) { 1540 goto exit_label; 1541 } 1542 1543 /* Send request to the PMU */ 1544 PM_PACK_PAYLOAD2(payload, flag, PM_CLOCK_GETPARENT, clock_id); 1545 status = pm_ipi_send_sync(primary_proc, payload, parent_index, 1); 1546 1547 exit_label: 1548 return status; 1549 } 1550 1551 /** 1552 * pm_pinctrl_get_num_pins - PM call to request number of pins. 1553 * @npins: Number of pins. 1554 * 1555 * This function is used by master to get number of pins. 1556 * 1557 * Return: Returns status, either success or error+reason. 1558 * 1559 */ 1560 static enum pm_ret_status pm_pinctrl_get_num_pins(uint32_t *npins) 1561 { 1562 return pm_api_pinctrl_get_num_pins(npins); 1563 } 1564 1565 /** 1566 * pm_pinctrl_get_num_functions - PM call to request number of functions. 1567 * @nfuncs: Number of functions. 1568 * 1569 * This function is used by master to get number of functions. 1570 * 1571 * Return: Returns status, either success or error+reason. 1572 * 1573 */ 1574 static enum pm_ret_status pm_pinctrl_get_num_functions(uint32_t *nfuncs) 1575 { 1576 return pm_api_pinctrl_get_num_functions(nfuncs); 1577 } 1578 1579 /** 1580 * pm_pinctrl_get_num_function_groups - PM call to request number of 1581 * function groups. 1582 * @fid: Id of function. 1583 * @ngroups: Number of function groups. 1584 * 1585 * This function is used by master to get number of function groups specified 1586 * by given function Id. 1587 * 1588 * Return: Returns status, either success or error+reason. 1589 * 1590 */ 1591 static enum pm_ret_status pm_pinctrl_get_num_function_groups(uint32_t fid, 1592 uint32_t *ngroups) 1593 { 1594 return pm_api_pinctrl_get_num_func_groups(fid, ngroups); 1595 } 1596 1597 /** 1598 * pm_pinctrl_get_function_name - PM call to request function name. 1599 * @fid: Id of function. 1600 * @name: Name of function. 1601 * 1602 * This function is used by master to get name of function specified 1603 * by given function Id. 1604 * 1605 */ 1606 static void pm_pinctrl_get_function_name(uint32_t fid, char *name) 1607 { 1608 pm_api_pinctrl_get_function_name(fid, name); 1609 } 1610 1611 /** 1612 * pm_pinctrl_get_function_groups - PM call to request function groups. 1613 * @fid: Id of function. 1614 * @index: Index of next function groups. 1615 * @groups: Function groups. 1616 * 1617 * This function is used by master to get function groups specified 1618 * by given function Id. This API will return 6 function groups with 1619 * a single response. To get other function groups, master should call 1620 * same API in loop with new function groups index till error is returned. 1621 * 1622 * E.g First call should have index 0 which will return function groups 1623 * 0, 1, 2, 3, 4 and 5. Next call, index should be 6 which will return 1624 * function groups 6, 7, 8, 9, 10 and 11 and so on. 1625 * 1626 * Return: Returns status, either success or error+reason. 1627 * 1628 */ 1629 static enum pm_ret_status pm_pinctrl_get_function_groups(uint32_t fid, 1630 uint32_t index, 1631 uint16_t *groups) 1632 { 1633 return pm_api_pinctrl_get_function_groups(fid, index, groups); 1634 } 1635 1636 /** 1637 * pm_pinctrl_get_pin_groups - PM call to request pin groups. 1638 * @pin_id: Id of pin. 1639 * @index: Index of next pin groups. 1640 * @groups: pin groups. 1641 * 1642 * This function is used by master to get pin groups specified 1643 * by given pin Id. This API will return 6 pin groups with 1644 * a single response. To get other pin groups, master should call 1645 * same API in loop with new pin groups index till error is returned. 1646 * 1647 * E.g First call should have index 0 which will return pin groups 1648 * 0, 1, 2, 3, 4 and 5. Next call, index should be 6 which will return 1649 * pin groups 6, 7, 8, 9, 10 and 11 and so on. 1650 * 1651 * Return: Returns status, either success or error+reason. 1652 * 1653 */ 1654 static enum pm_ret_status pm_pinctrl_get_pin_groups(uint32_t pin_id, 1655 uint32_t index, 1656 uint16_t *groups) 1657 { 1658 return pm_api_pinctrl_get_pin_groups(pin_id, index, groups); 1659 } 1660 1661 /** 1662 * pm_query_data() - PM API for querying firmware data. 1663 * @qid: represents the query identifiers for PM. 1664 * @arg1: Argument 1 to requested IOCTL call. 1665 * @arg2: Argument 2 to requested IOCTL call. 1666 * @arg3: Argument 3 to requested IOCTL call. 1667 * @data: Returned output data. 1668 * @flag: 0 - Call from secure source. 1669 * 1 - Call from non-secure source. 1670 * 1671 * This function returns requested data. 1672 * 1673 */ 1674 void pm_query_data(enum pm_query_ids qid, uint32_t arg1, uint32_t arg2, 1675 uint32_t arg3, uint32_t *data, uint32_t flag) 1676 { 1677 (void)arg3; 1678 (void)flag; 1679 1680 switch (qid) { 1681 case PM_QID_CLOCK_GET_NAME: 1682 pm_clock_get_name(arg1, (char *)data); 1683 break; 1684 case PM_QID_CLOCK_GET_TOPOLOGY: 1685 data[0] = (uint32_t)pm_clock_get_topology(arg1, arg2, &data[1]); 1686 break; 1687 case PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS: 1688 data[0] = (uint32_t)pm_clock_get_fixedfactor_params(arg1, &data[1], 1689 &data[2]); 1690 break; 1691 case PM_QID_CLOCK_GET_PARENTS: 1692 data[0] = (uint32_t)pm_clock_get_parents(arg1, arg2, &data[1]); 1693 break; 1694 case PM_QID_CLOCK_GET_ATTRIBUTES: 1695 data[0] = (uint32_t)pm_clock_get_attributes(arg1, &data[1]); 1696 break; 1697 case PM_QID_PINCTRL_GET_NUM_PINS: 1698 data[0] = (uint32_t)pm_pinctrl_get_num_pins(&data[1]); 1699 break; 1700 case PM_QID_PINCTRL_GET_NUM_FUNCTIONS: 1701 data[0] = (uint32_t)pm_pinctrl_get_num_functions(&data[1]); 1702 break; 1703 case PM_QID_PINCTRL_GET_NUM_FUNCTION_GROUPS: 1704 data[0] = (uint32_t)pm_pinctrl_get_num_function_groups(arg1, &data[1]); 1705 break; 1706 case PM_QID_PINCTRL_GET_FUNCTION_NAME: 1707 pm_pinctrl_get_function_name(arg1, (char *)data); 1708 break; 1709 case PM_QID_PINCTRL_GET_FUNCTION_GROUPS: 1710 data[0] = (uint32_t)pm_pinctrl_get_function_groups(arg1, arg2, 1711 (uint16_t *)&data[1]); 1712 break; 1713 case PM_QID_PINCTRL_GET_PIN_GROUPS: 1714 data[0] = (uint32_t)pm_pinctrl_get_pin_groups(arg1, arg2, 1715 (uint16_t *)&data[1]); 1716 break; 1717 case PM_QID_CLOCK_GET_NUM_CLOCKS: 1718 data[0] = (uint32_t)pm_clock_get_num_clocks(&data[1]); 1719 break; 1720 1721 case PM_QID_CLOCK_GET_MAX_DIVISOR: 1722 data[0] = (uint32_t)pm_clock_get_max_divisor(arg1, (uint8_t)arg2, &data[1]); 1723 break; 1724 default: 1725 data[0] = (uint32_t)PM_RET_ERROR_ARGS; 1726 WARN("Unimplemented query service call: 0x%x\n", qid); 1727 break; 1728 } 1729 } 1730 1731 enum pm_ret_status pm_sha_hash(uint32_t address_high, 1732 uint32_t address_low, 1733 uint32_t size, 1734 uint32_t flags, 1735 uint32_t security_flag) 1736 { 1737 uint32_t payload[PAYLOAD_ARG_CNT]; 1738 1739 /* Send request to the PMU */ 1740 PM_PACK_PAYLOAD5(payload, security_flag, PM_SECURE_SHA, address_high, 1741 address_low, size, flags); 1742 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1743 } 1744 1745 enum pm_ret_status pm_rsa_core(uint32_t address_high, 1746 uint32_t address_low, 1747 uint32_t size, 1748 uint32_t flags, 1749 uint32_t security_flag) 1750 { 1751 uint32_t payload[PAYLOAD_ARG_CNT]; 1752 1753 /* Send request to the PMU */ 1754 PM_PACK_PAYLOAD5(payload, security_flag, PM_SECURE_RSA, address_high, 1755 address_low, size, flags); 1756 return pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1757 } 1758 1759 enum pm_ret_status pm_secure_image(uint32_t address_low, 1760 uint32_t address_high, 1761 uint32_t key_lo, 1762 uint32_t key_hi, 1763 uint32_t *value, 1764 uint32_t flag) 1765 { 1766 uint32_t payload[PAYLOAD_ARG_CNT]; 1767 1768 /* Send request to the PMU */ 1769 PM_PACK_PAYLOAD5(payload, flag, PM_SECURE_IMAGE, address_high, 1770 address_low, key_hi, key_lo); 1771 return pm_ipi_send_sync(primary_proc, payload, value, 2); 1772 } 1773 1774 /** 1775 * pm_fpga_read - Perform the fpga configuration readback. 1776 * @reg_numframes: Configuration register offset (or) Number of frames to read. 1777 * @address_low: lower 32-bit Linear memory space address. 1778 * @address_high: higher 32-bit Linear memory space address. 1779 * @readback_type: Type of fpga readback operation. 1780 * 0 -- Configuration Register readback. 1781 * 1 -- Configuration Data readback. 1782 * @value: Value to read. 1783 * @flag: 0 - Call from secure source. 1784 * 1 - Call from non-secure source. 1785 * 1786 * This function provides access to the xilfpga library to read 1787 * the PL configuration. 1788 * 1789 * Return: Returns status, either success or error+reason. 1790 * 1791 */ 1792 enum pm_ret_status pm_fpga_read(uint32_t reg_numframes, 1793 uint32_t address_low, 1794 uint32_t address_high, 1795 uint32_t readback_type, 1796 uint32_t *value, 1797 uint32_t flag) 1798 { 1799 uint32_t payload[PAYLOAD_ARG_CNT]; 1800 1801 /* Send request to the PMU */ 1802 PM_PACK_PAYLOAD5(payload, flag, PM_FPGA_READ, reg_numframes, address_low, 1803 address_high, readback_type); 1804 return pm_ipi_send_sync(primary_proc, payload, value, 1); 1805 } 1806 1807 /* 1808 * pm_pll_set_parameter() - Set the PLL parameter value. 1809 * @nid: Node id of the target PLL. 1810 * @param_id: ID of the PLL parameter. 1811 * @value: Parameter value to be set. 1812 * @flag: 0 - Call from secure source. 1813 * 1 - Call from non-secure source. 1814 * 1815 * Setting the parameter will have physical effect once the PLL mode is set to 1816 * integer or fractional. 1817 * 1818 * Return: Error if an argument is not valid or status as returned by the 1819 * PM controller (PMU). 1820 * 1821 */ 1822 enum pm_ret_status pm_pll_set_parameter(enum pm_node_id nid, 1823 enum pm_pll_param param_id, 1824 uint32_t value, 1825 uint32_t flag) 1826 { 1827 uint32_t payload[PAYLOAD_ARG_CNT]; 1828 enum pm_ret_status ret = 0; 1829 1830 /* Check if given node ID is a PLL node */ 1831 if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { 1832 ret = PM_RET_ERROR_ARGS; 1833 goto exit_label; 1834 } 1835 1836 /* Check if parameter ID is valid and return an error if it's not */ 1837 if (param_id >= PM_PLL_PARAM_MAX) { 1838 ret = PM_RET_ERROR_ARGS; 1839 goto exit_label; 1840 } 1841 1842 /* Send request to the PMU */ 1843 PM_PACK_PAYLOAD4(payload, flag, PM_PLL_SET_PARAMETER, nid, param_id, value); 1844 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1845 1846 exit_label: 1847 return ret; 1848 } 1849 1850 /** 1851 * pm_pll_get_parameter() - Get the PLL parameter value. 1852 * @nid: Node id of the target PLL. 1853 * @param_id: ID of the PLL parameter. 1854 * @value: Location to store the parameter value. 1855 * @flag: 0 - Call from secure source. 1856 * 1 - Call from non-secure source. 1857 * 1858 * Return: Error if an argument is not valid or status as returned by the 1859 * PM controller (PMU). 1860 * 1861 */ 1862 enum pm_ret_status pm_pll_get_parameter(enum pm_node_id nid, 1863 enum pm_pll_param param_id, 1864 uint32_t *value, uint32_t flag) 1865 { 1866 uint32_t payload[PAYLOAD_ARG_CNT]; 1867 enum pm_ret_status ret = PM_RET_SUCCESS; 1868 1869 /* Check if given node ID is a PLL node */ 1870 if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { 1871 ret = PM_RET_ERROR_ARGS; 1872 goto exit_label; 1873 } 1874 1875 /* Check if parameter ID is valid and return an error if it's not */ 1876 if (param_id >= PM_PLL_PARAM_MAX) { 1877 ret = PM_RET_ERROR_ARGS; 1878 goto exit_label; 1879 } 1880 1881 /* Send request to the PMU */ 1882 PM_PACK_PAYLOAD3(payload, flag, PM_PLL_GET_PARAMETER, nid, param_id); 1883 ret = pm_ipi_send_sync(primary_proc, payload, value, 1); 1884 1885 exit_label: 1886 return ret; 1887 } 1888 1889 /** 1890 * pm_pll_set_mode() - Set the PLL mode. 1891 * @nid: Node id of the target PLL. 1892 * @mode: PLL mode to be set. 1893 * @flag: 0 - Call from secure source. 1894 * 1 - Call from non-secure source. 1895 * 1896 * If reset mode is set the PM controller will first bypass the PLL and then 1897 * assert the reset. If integer or fractional mode is set the PM controller will 1898 * ensure that the complete PLL programming sequence is satisfied. After this 1899 * function returns success the PLL is locked and its bypass is deasserted. 1900 * 1901 * Return: Error if an argument is not valid or status as returned by the 1902 * PM controller (PMU). 1903 * 1904 */ 1905 enum pm_ret_status pm_pll_set_mode(enum pm_node_id nid, enum pm_pll_mode mode, 1906 uint32_t flag) 1907 { 1908 uint32_t payload[PAYLOAD_ARG_CNT]; 1909 enum pm_ret_status ret = PM_RET_SUCCESS; 1910 1911 /* Check if given node ID is a PLL node */ 1912 if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { 1913 ret = PM_RET_ERROR_ARGS; 1914 goto exit_label; 1915 } 1916 1917 /* Check if PLL mode is valid */ 1918 if (mode >= PM_PLL_MODE_MAX) { 1919 ret = PM_RET_ERROR_ARGS; 1920 goto exit_label; 1921 } 1922 1923 /* Send request to the PMU */ 1924 PM_PACK_PAYLOAD3(payload, flag, PM_PLL_SET_MODE, nid, mode); 1925 ret = pm_ipi_send_sync(primary_proc, payload, NULL, 0); 1926 1927 exit_label: 1928 return ret; 1929 } 1930 1931 /** 1932 * pm_pll_get_mode() - Get the PLL mode. 1933 * @nid: Node id of the target PLL. 1934 * @mode: Location to store the mode of the PLL. 1935 * @flag: 0 - Call from secure source. 1936 * 1 - Call from non-secure source. 1937 * 1938 * Return: Error if an argument is not valid or status as returned by the 1939 * PM controller (PMU). 1940 * 1941 */ 1942 enum pm_ret_status pm_pll_get_mode(enum pm_node_id nid, enum pm_pll_mode *mode, 1943 uint32_t flag) 1944 { 1945 uint32_t payload[PAYLOAD_ARG_CNT]; 1946 enum pm_ret_status ret = PM_RET_SUCCESS; 1947 1948 /* Check if given node ID is a PLL node */ 1949 if ((nid < NODE_APLL) || (nid > NODE_IOPLL)) { 1950 ret = PM_RET_ERROR_ARGS; 1951 } else { 1952 /* Send request to the PMU */ 1953 PM_PACK_PAYLOAD2(payload, flag, PM_PLL_GET_MODE, nid); 1954 ret = pm_ipi_send_sync(primary_proc, payload, mode, 1); 1955 } 1956 1957 return ret; 1958 } 1959 1960 /** 1961 * pm_register_access() - PM API for register read/write access data. 1962 * @register_access_id: Register_access_id which says register read/write. 1963 * @address: Address of the register to be accessed. 1964 * @mask: Mask value to be used while writing value. 1965 * @value: Value to be written to register. 1966 * @out: Returned output data. 1967 * @flag: 0 - Call from secure source. 1968 * 1 - Call from non-secure source. 1969 * 1970 * This function returns requested data. 1971 * 1972 * Return: Returns status, either success or error+reason. 1973 * 1974 */ 1975 enum pm_ret_status pm_register_access(uint32_t register_access_id, 1976 uint32_t address, 1977 uint32_t mask, 1978 uint32_t value, 1979 uint32_t *out, 1980 uint32_t flag) 1981 { 1982 enum pm_ret_status ret; 1983 1984 if (((ZYNQMP_CSU_BASEADDR & address) != ZYNQMP_CSU_BASEADDR) && 1985 ((CSUDMA_BASE & address) != CSUDMA_BASE) && 1986 ((RSA_CORE_BASE & address) != RSA_CORE_BASE) && 1987 ((PMU_GLOBAL_BASE & address) != PMU_GLOBAL_BASE)) { 1988 ret = PM_RET_ERROR_ACCESS; 1989 goto exit_label; 1990 } 1991 1992 switch (register_access_id) { 1993 case CONFIG_REG_WRITE: 1994 ret = pm_mmio_write(address, mask, value, flag); 1995 break; 1996 case CONFIG_REG_READ: 1997 ret = pm_mmio_read(address, out, flag); 1998 break; 1999 default: 2000 ret = PM_RET_ERROR_ARGS; 2001 WARN("Unimplemented register_access call\n\r"); 2002 break; 2003 } 2004 2005 exit_label: 2006 return ret; 2007 } 2008 2009 /** 2010 * pm_efuse_access() - To program or read efuse bits. This function provides 2011 * access to the xilskey library to program/read 2012 * efuse bits. 2013 * @address_low: lower 32-bit Linear memory space address. 2014 * @address_high: higher 32-bit Linear memory space address. 2015 * @value: Returned output value. 2016 * @flag: 0 - Call from secure source. 2017 * 1 - Call from non-secure source. 2018 * 2019 * Return: Returns status, either success or error+reason. 2020 * 2021 */ 2022 enum pm_ret_status pm_efuse_access(uint32_t address_high, 2023 uint32_t address_low, 2024 uint32_t *value, 2025 uint32_t flag) 2026 { 2027 uint32_t payload[PAYLOAD_ARG_CNT]; 2028 2029 /* Send request to the PMU */ 2030 PM_PACK_PAYLOAD3(payload, flag, PM_EFUSE_ACCESS, address_high, address_low); 2031 2032 return pm_ipi_send_sync(primary_proc, payload, value, 1); 2033 } 2034