xref: /rk3399_ARM-atf/plat/xilinx/zynqmp/pm_service/pm_api_ioctl.h (revision c48c11e7b7a04e2647e96df7ad7630020a494831)
1f76918a8SRajan Vaja /*
2619bc13eSMichal Simek  * Copyright (c) 2018-2022, Arm Limited and Contributors. All rights reserved.
3*8ce93ec9SRonak Jain  * Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved.
4f76918a8SRajan Vaja  *
5f76918a8SRajan Vaja  * SPDX-License-Identifier: BSD-3-Clause
6f76918a8SRajan Vaja  */
7f76918a8SRajan Vaja 
8f76918a8SRajan Vaja /*
9f76918a8SRajan Vaja  * ZynqMP system level PM-API functions for pin control.
10f76918a8SRajan Vaja  */
11f76918a8SRajan Vaja 
12c3cf06f1SAntonio Nino Diaz #ifndef PM_API_IOCTL_H
13c3cf06f1SAntonio Nino Diaz #define PM_API_IOCTL_H
14f76918a8SRajan Vaja 
15f76918a8SRajan Vaja #include "pm_common.h"
16f76918a8SRajan Vaja 
1737e1a68eSJolly Shah //RPU operation mode
1837e1a68eSJolly Shah #define	PM_RPU_MODE_LOCKSTEP 0U
1937e1a68eSJolly Shah #define	PM_RPU_MODE_SPLIT 1U
20f76918a8SRajan Vaja 
2137e1a68eSJolly Shah //RPU boot mem
2237e1a68eSJolly Shah #define	PM_RPU_BOOTMEM_LOVEC 0U
2337e1a68eSJolly Shah #define	PM_RPU_BOOTMEM_HIVEC 1U
24f76918a8SRajan Vaja 
2537e1a68eSJolly Shah //RPU tcm mpde
2637e1a68eSJolly Shah #define	PM_RPU_TCM_SPLIT 0U
2737e1a68eSJolly Shah #define	PM_RPU_TCM_COMB 1U
28f76918a8SRajan Vaja 
2937e1a68eSJolly Shah //tap delay signal type
3037e1a68eSJolly Shah #define	PM_TAPDELAY_NAND_DQS_IN 0U
3137e1a68eSJolly Shah #define	PM_TAPDELAY_NAND_DQS_OUT 1U
3237e1a68eSJolly Shah #define	PM_TAPDELAY_QSPI 2U
3337e1a68eSJolly Shah #define	PM_TAPDELAY_MAX 3U
341818c029SRajan Vaja 
3537e1a68eSJolly Shah //tap delay bypass
3637e1a68eSJolly Shah #define	PM_TAPDELAY_BYPASS_DISABLE 0U
3737e1a68eSJolly Shah #define	PM_TAPDELAY_BYPASS_ENABLE 1U
381818c029SRajan Vaja 
391818c029SRajan Vaja enum tap_delay_type {
401818c029SRajan Vaja 	PM_TAPDELAY_INPUT,
411818c029SRajan Vaja 	PM_TAPDELAY_OUTPUT,
421818c029SRajan Vaja };
431818c029SRajan Vaja 
4437e1a68eSJolly Shah //dll reset type
4537e1a68eSJolly Shah #define	PM_DLL_RESET_ASSERT 0U
4637e1a68eSJolly Shah #define	PM_DLL_RESET_RELEASE 1U
4737e1a68eSJolly Shah #define	PM_DLL_RESET_PULSE 2U
481818c029SRajan Vaja 
49f76918a8SRajan Vaja enum pm_ret_status pm_api_ioctl(enum pm_node_id nid,
50ffa91031SVenkatesh Yadav Abbarapu 				uint32_t ioctl_id,
51ffa91031SVenkatesh Yadav Abbarapu 				uint32_t arg1,
52ffa91031SVenkatesh Yadav Abbarapu 				uint32_t arg2,
53*8ce93ec9SRonak Jain 				uint32_t *value,
54*8ce93ec9SRonak Jain 				uint32_t flag);
55*8ce93ec9SRonak Jain enum pm_ret_status tfa_ioctl_bitmask(uint32_t *bit_mask, uint32_t flag);
56c3cf06f1SAntonio Nino Diaz #endif /* PM_API_IOCTL_H */
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