Merge changes I5fcf6578,Ic7792603 into integration

* changes:
fix(xilinx): fix missing security flag in suspend path
feat(zynqmp): mark IPI calls secure/non-secure

feat(zynqmp): mark IPI calls secure/non-secure

Use BIT24 of the IPI command header from payload[0] to identify the
caller's security state. If the SMC caller is non-secure, set BIT24
to indicate a n

feat(zynqmp): mark IPI calls secure/non-secure

Use BIT24 of the IPI command header from payload[0] to identify the
caller's security state. If the SMC caller is non-secure, set BIT24
to indicate a non-secure origin.

The mechanism is already present in Versal, Versal NET, and
Versal Gen 2 platforms. Extend the same support to Zynq UltraScale+
MPSoC (ZU+) to align its behavior with newer SoCs.

Change-Id: Ic77926033e76a53c0fa1a9949e6838ec64bd6ae5
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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Merge "feat(zynqmp): remove pm_ioctl_set_sgmii_mode api" into integration

feat(zynqmp): remove pm_ioctl_set_sgmii_mode api

There are no existing users of pm_ioctl_set_sgmii_mode() API so
cleanup the dead code.

Change-Id: I1088d2f5c944bf54fc5fdd554360bdd321ad798a
Signed-o

feat(zynqmp): remove pm_ioctl_set_sgmii_mode api

There are no existing users of pm_ioctl_set_sgmii_mode() API so
cleanup the dead code.

Change-Id: I1088d2f5c944bf54fc5fdd554360bdd321ad798a
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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Merge "chore(xilinx): replace ATF with TFA" into integration

chore(xilinx): replace ATF with TFA

Since the Arm Trusted Firmware(ATF) has been renamed to Trusted
Firmware-A (TF-A), replace all the instances of ATF from code comments,
macros, variables and func

chore(xilinx): replace ATF with TFA

Since the Arm Trusted Firmware(ATF) has been renamed to Trusted
Firmware-A (TF-A), replace all the instances of ATF from code comments,
macros, variables and functions to TF-A.

Change-Id: Iab448d96158612a3effb4e49943f8d6cb43aaad5
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Akshay Belsare <akshay.belsare@amd.com>

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Merge "style(xilinx): replace ARM by Arm in copyrights" into integration

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure

style(xilinx): replace ARM by Arm in copyrights

The commit 6bb49c876c75 ("style(hooks): adds Arm copyright style fix")
is enforcing proper case for ARM. That's why fix it in plat/xilinx to
make sure that pre-commit.copyright won't be touching platform specific
files.

Change-Id: I49c66e18d46ed871a6aa128c9b2a403d0cf83416
Signed-off-by: Michal Simek <michal.simek@amd.com>

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Merge changes from topic "set-wake-source-for-versal-net" into integration

* changes:
refactor(xilinx): move enum to common place
fix(xilinx): fix misra defects
fix(xilinx): remove unnecessary

Merge changes from topic "set-wake-source-for-versal-net" into integration

* changes:
refactor(xilinx): move enum to common place
fix(xilinx): fix misra defects
fix(xilinx): remove unnecessary condition
feat(versal): replace irq array with switch case
feat(versal-net): add support for set wakeup source
refactor(versal): move set wake src fn to common place

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refactor(xilinx): move enum to common place

Moved IOCTL enum from ZynqMP to common place so that it can be used
for all the platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Cha

refactor(xilinx): move enum to common place

Moved IOCTL enum from ZynqMP to common place so that it can be used
for all the platforms.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I6ad992da30f2def9f46c8ba79753d79ed00fe024

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Merge changes from topic "xlnx_zynqmp_misra_fix1" into integration

* changes:
fix(zynqmp): resolve the misra 8.6 warnings
fix(zynqmp): resolve the misra 4.6 warnings

fix(zynqmp): resolve the misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by:

fix(zynqmp): resolve the misra 4.6 warnings

MISRA Violation: MISRA-C:2012 R.4.6
- Using basic numerical type int rather than a typedef
that includes size and signedness information.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Change-Id: I9fb686e7aa2b85af6dfcb7bb5f87eddf469fb85c

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Merge changes I18d47384,Icc3c7424,I73f20d82,I07325644,Iff10ad26, ... into integration

* changes:
fix(zynqmp): query node status to power up APU
feat(zynqmp): pm_api_clock_get_num_clocks cleanup

Merge changes I18d47384,Icc3c7424,I73f20d82,I07325644,Iff10ad26, ... into integration

* changes:
fix(zynqmp): query node status to power up APU
feat(zynqmp): pm_api_clock_get_num_clocks cleanup
feat(zynqmp): add feature check support
fix(zynqmp): use common interface for eemi apis
feat(zynqmp): add support to get info of xilfpga
feat(zynqmp): pass ioctl calls to firmware

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feat(zynqmp): add feature check support

This API returns version of supported APIs.

Here, there are three cases to check API version by using feature
check implementation.

1. Completely implemente

feat(zynqmp): add feature check support

This API returns version of supported APIs.

Here, there are three cases to check API version by using feature
check implementation.

1. Completely implemented in TF-A: I mean the EEMI APIs which are
completely implemented in the TF-A only. So check those IDs and
return appropriate version for the same. Right now, it is base
version.

2. Completely implemented in firmware: I mean the EEMI APIs which are
completely implemented in the firmware only. Here, TF-A only passes
Linux request to the firmware to get the version of supported API. So
check those IDs and send request to firmware to get the version and
return to Linux if the version is supported or return the error code
if the feature is not supported.

3. Partially implemented (Implemented in TF-A and firmware both):
First check dependent EEMI API version with the expected version in
the TF-A. If the dependent EEMI API is supported in firmware then
return its version and check with the expected version in the TF-A.
If the version matches then check for the actual requested EEMI API
version. If the version is supported then return version of API
implemented in TF-A.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I73f20d8222c518df1cda7879548b408b130b5b2e

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feat(zynqmp): pass ioctl calls to firmware

Firmware supports new IOCTL for different purposes. To avoid
maintaining new IOCTL IDs in ATF, pass IOCTL call to firmware
for IOCTL IDs implemented in fir

feat(zynqmp): pass ioctl calls to firmware

Firmware supports new IOCTL for different purposes. To avoid
maintaining new IOCTL IDs in ATF, pass IOCTL call to firmware
for IOCTL IDs implemented in firmware.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: Ie14697c8da9581b0f695f4d33f05161ece558385

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Merge changes I976aef15,I11ae679f into integration

* changes:
feat(plat/xilinx/zynqmp): add support for runtime feature config
feat(plat/xilinx/zynqmp): sync IOCTL IDs

feat(plat/xilinx/zynqmp): add support for runtime feature config

Add support for runtime feature configuration which are running on the
firmware. Add new IOCTL IDs like IOCTL_SET_FEATURE_CONFIG and

feat(plat/xilinx/zynqmp): add support for runtime feature config

Add support for runtime feature configuration which are running on the
firmware. Add new IOCTL IDs like IOCTL_SET_FEATURE_CONFIG and
IOCTL_GET_FEATURE_CONFIG for configuring the features.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I976aef15932783a25396b2adeb4c8f140cc87e79

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feat(plat/xilinx/zynqmp): sync IOCTL IDs

Sync IOCTL IDs in order to avoid conflict with other components like,
Linux and firmware. Hence assigning value to IDs to make it more
specific.

Signed-of

feat(plat/xilinx/zynqmp): sync IOCTL IDs

Sync IOCTL IDs in order to avoid conflict with other components like,
Linux and firmware. Hence assigning value to IDs to make it more
specific.

Signed-off-by: Ronak Jain <ronak.jain@xilinx.com>
Change-Id: I11ae679fbd0a953290306b62d661cc142f50dc28

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Merge pull request #1673 from antonio-nino-diaz-arm/an/headers

Standardise header guards across codebase

Standardise header guards across codebase

All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this proje

Standardise header guards across codebase

All identifiers, regardless of use, that start with two underscores are
reserved. This means they can't be used in header guards.

The style that this project is now to use the full name of the file in
capital letters followed by 'H'. For example, for a file called
"uart_example.h", the header guard is UART_EXAMPLE_H.

The exceptions are files that are imported from other projects:

- CryptoCell driver
- dt-bindings folders
- zlib headers

Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>

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Merge pull request #1557 from sivadur/integration

Xilinx latest platform related changes

zynqmp: pm_service: Add support for writing to AFI registers

Add support for writing to AFI registers.
So that after writing a bitstream the interface can be programmed.

Signed-off-by: Shubhrajyoti

zynqmp: pm_service: Add support for writing to AFI registers

Add support for writing to AFI registers.
So that after writing a bitstream the interface can be programmed.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

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zynqmp: pm: Add IOCTL to set boot health status

Since the MMIO read/write APIs are removed from Linux user space,
Linux cannot directly write to the Global General Storage Register 4
any more to set

zynqmp: pm: Add IOCTL to set boot health status

Since the MMIO read/write APIs are removed from Linux user space,
Linux cannot directly write to the Global General Storage Register 4
any more to set healthy boot status.

Create an IOCTL to allow Linux to set boot health status.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Acked-by: Will Wong <willw@xilinx.com>

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zynqmp: pm_service: Add support for resetting ULPI transceiver

To make ULPI transceiver work, a HIGH - LOW - HIGH pulse needs
to be given to resetb pin of ULPI chip. In ZYNQMP, this resetb
pin is be

zynqmp: pm_service: Add support for resetting ULPI transceiver

To make ULPI transceiver work, a HIGH - LOW - HIGH pulse needs
to be given to resetb pin of ULPI chip. In ZYNQMP, this resetb
pin is being driven by BOOT MODE PIN 1. The BOOT MODE PIN's
are controlled by BOOT_PIN_CTRL register present in CRL_APB
address region. Since CRL_APB can be resticted to secure access,
this pin should be controlled by ATF.

This patch adds the support for the same.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>

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Merge pull request #1250 from jollysxilinx/zynqmp-new-eemi-api

plat/xilinx: Add support for new platform management APIs for ZynqMP