1*2cc97771SAmbroise Vincent# Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved. 2f91c3cb1SSiva Durga Prasad Paladugu# 3f91c3cb1SSiva Durga Prasad Paladugu# SPDX-License-Identifier: BSD-3-Clause 4f91c3cb1SSiva Durga Prasad Paladugu 5f91c3cb1SSiva Durga Prasad Paladuguoverride PROGRAMMABLE_RESET_ADDRESS := 1 6f91c3cb1SSiva Durga Prasad PaladuguPSCI_EXTENDED_STATE_ID := 1 7f91c3cb1SSiva Durga Prasad PaladuguA53_DISABLE_NON_TEMPORAL_HINT := 0 8f91c3cb1SSiva Durga Prasad PaladuguSEPARATE_CODE_AND_RODATA := 1 9f91c3cb1SSiva Durga Prasad Paladuguoverride RESET_TO_BL31 := 1 10f91c3cb1SSiva Durga Prasad PaladuguPL011_GENERIC_UART := 1 11f91c3cb1SSiva Durga Prasad PaladuguMULTI_CONSOLE_API := 1 12f91c3cb1SSiva Durga Prasad Paladugu 13f91c3cb1SSiva Durga Prasad Paladuguifdef VERSAL_ATF_MEM_BASE 14f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_ATF_MEM_BASE)) 15f91c3cb1SSiva Durga Prasad Paladugu 16f91c3cb1SSiva Durga Prasad Paladugu ifndef VERSAL_ATF_MEM_SIZE 17f91c3cb1SSiva Durga Prasad Paladugu $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE") 18f91c3cb1SSiva Durga Prasad Paladugu endif 19f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_ATF_MEM_SIZE)) 20f91c3cb1SSiva Durga Prasad Paladugu 21f91c3cb1SSiva Durga Prasad Paladugu ifdef VERSAL_ATF_MEM_PROGBITS_SIZE 22f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE)) 23f91c3cb1SSiva Durga Prasad Paladugu endif 24f91c3cb1SSiva Durga Prasad Paladuguendif 25f91c3cb1SSiva Durga Prasad Paladugu 26f91c3cb1SSiva Durga Prasad Paladuguifdef VERSAL_BL32_MEM_BASE 27f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_BL32_MEM_BASE)) 28f91c3cb1SSiva Durga Prasad Paladugu 29f91c3cb1SSiva Durga Prasad Paladugu ifndef VERSAL_BL32_MEM_SIZE 30f91c3cb1SSiva Durga Prasad Paladugu $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE") 31f91c3cb1SSiva Durga Prasad Paladugu endif 32f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_BL32_MEM_SIZE)) 33f91c3cb1SSiva Durga Prasad Paladuguendif 34f91c3cb1SSiva Durga Prasad Paladugu 35f91c3cb1SSiva Durga Prasad PaladuguVERSAL_PLATFORM ?= versal_virt 36f91c3cb1SSiva Durga Prasad Paladugu$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM})) 37f91c3cb1SSiva Durga Prasad Paladugu 38f91c3cb1SSiva Durga Prasad PaladuguVERSAL_CONSOLE ?= pl011 39f91c3cb1SSiva Durga Prasad Paladugu$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE})) 40f91c3cb1SSiva Durga Prasad Paladugu 41f91c3cb1SSiva Durga Prasad PaladuguPLAT_INCLUDES := -Iplat/xilinx/versal/include/ 42f91c3cb1SSiva Durga Prasad Paladugu 43f91c3cb1SSiva Durga Prasad PaladuguPLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 44f91c3cb1SSiva Durga Prasad Paladugu lib/xlat_tables/aarch64/xlat_tables.c \ 45f91c3cb1SSiva Durga Prasad Paladugu drivers/delay_timer/delay_timer.c \ 46f91c3cb1SSiva Durga Prasad Paladugu drivers/delay_timer/generic_delay_timer.c \ 47f91c3cb1SSiva Durga Prasad Paladugu drivers/arm/gic/common/gic_common.c \ 48f91c3cb1SSiva Durga Prasad Paladugu drivers/arm/gic/v3/gicv3_main.c \ 49f91c3cb1SSiva Durga Prasad Paladugu drivers/arm/gic/v3/gicv3_helpers.c \ 50f91c3cb1SSiva Durga Prasad Paladugu drivers/arm/pl011/aarch64/pl011_console.S \ 51*2cc97771SAmbroise Vincent plat/common/aarch64/crash_console_helpers.S \ 52f91c3cb1SSiva Durga Prasad Paladugu plat/common/plat_gicv3.c \ 53f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/aarch64/versal_helpers.S \ 54f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/aarch64/versal_common.c 55f91c3cb1SSiva Durga Prasad Paladugu 56f91c3cb1SSiva Durga Prasad PaladuguBL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \ 57f91c3cb1SSiva Durga Prasad Paladugu lib/cpus/aarch64/cortex_a72.S \ 58f91c3cb1SSiva Durga Prasad Paladugu plat/common/plat_psci_common.c \ 59f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/bl31_versal_setup.c \ 60f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/plat_psci.c \ 61f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/plat_versal.c \ 62f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/plat_topology.c \ 63f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/sip_svc_setup.c \ 64f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/versal_gicv3.c 65