1619bc13eSMichal Simek# Copyright (c) 2018-2021, Arm Limited and Contributors. All rights reserved. 2a92681d9SJay Buddhabhatti# Copyright (c) 2022-2023, Advanced Micro Devices, Inc. All rights reserved. 3f91c3cb1SSiva Durga Prasad Paladugu# 4f91c3cb1SSiva Durga Prasad Paladugu# SPDX-License-Identifier: BSD-3-Clause 5f91c3cb1SSiva Durga Prasad Paladugu 6f91c3cb1SSiva Durga Prasad Paladuguoverride PROGRAMMABLE_RESET_ADDRESS := 1 7f91c3cb1SSiva Durga Prasad PaladuguPSCI_EXTENDED_STATE_ID := 1 8f91c3cb1SSiva Durga Prasad PaladuguA53_DISABLE_NON_TEMPORAL_HINT := 0 9f91c3cb1SSiva Durga Prasad PaladuguSEPARATE_CODE_AND_RODATA := 1 10f91c3cb1SSiva Durga Prasad Paladuguoverride RESET_TO_BL31 := 1 11f91c3cb1SSiva Durga Prasad PaladuguPL011_GENERIC_UART := 1 12654bd99dSVenkatesh Yadav AbbarapuIPI_CRC_CHECK := 0 13302b4dfbSVenkatesh Yadav AbbarapuHARDEN_SLS_ALL := 0 14f91c3cb1SSiva Durga Prasad Paladugu 15769446a6SMichal Simek# A72 Erratum for SoC 16769446a6SMichal SimekERRATA_A72_859971 := 1 17769446a6SMichal SimekERRATA_A72_1319367 := 1 18769446a6SMichal Simek 19f91c3cb1SSiva Durga Prasad Paladuguifdef VERSAL_ATF_MEM_BASE 20f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_ATF_MEM_BASE)) 21f91c3cb1SSiva Durga Prasad Paladugu 22f91c3cb1SSiva Durga Prasad Paladugu ifndef VERSAL_ATF_MEM_SIZE 23f91c3cb1SSiva Durga Prasad Paladugu $(error "VERSAL_ATF_BASE defined without VERSAL_ATF_SIZE") 24f91c3cb1SSiva Durga Prasad Paladugu endif 25f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_ATF_MEM_SIZE)) 26f91c3cb1SSiva Durga Prasad Paladugu 27f91c3cb1SSiva Durga Prasad Paladugu ifdef VERSAL_ATF_MEM_PROGBITS_SIZE 28f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_ATF_MEM_PROGBITS_SIZE)) 29f91c3cb1SSiva Durga Prasad Paladugu endif 30f91c3cb1SSiva Durga Prasad Paladuguendif 31f91c3cb1SSiva Durga Prasad Paladugu 32f91c3cb1SSiva Durga Prasad Paladuguifdef VERSAL_BL32_MEM_BASE 33f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_BL32_MEM_BASE)) 34f91c3cb1SSiva Durga Prasad Paladugu 35f91c3cb1SSiva Durga Prasad Paladugu ifndef VERSAL_BL32_MEM_SIZE 36f91c3cb1SSiva Durga Prasad Paladugu $(error "VERSAL_BL32_BASE defined without VERSAL_BL32_SIZE") 37f91c3cb1SSiva Durga Prasad Paladugu endif 38f91c3cb1SSiva Durga Prasad Paladugu $(eval $(call add_define,VERSAL_BL32_MEM_SIZE)) 39f91c3cb1SSiva Durga Prasad Paladuguendif 40f91c3cb1SSiva Durga Prasad Paladugu 41654bd99dSVenkatesh Yadav Abbarapuifdef IPI_CRC_CHECK 42654bd99dSVenkatesh Yadav Abbarapu $(eval $(call add_define,IPI_CRC_CHECK)) 43654bd99dSVenkatesh Yadav Abbarapuendif 44654bd99dSVenkatesh Yadav Abbarapu 457b9f0cfdSSiva Durga Prasad PaladuguVERSAL_PLATFORM ?= silicon 46f91c3cb1SSiva Durga Prasad Paladugu$(eval $(call add_define_val,VERSAL_PLATFORM,VERSAL_PLATFORM_ID_${VERSAL_PLATFORM})) 47f91c3cb1SSiva Durga Prasad Paladugu 4856d1857eSAmit Nagalifdef XILINX_OF_BOARD_DTB_ADDR 4956d1857eSAmit Nagal$(eval $(call add_define,XILINX_OF_BOARD_DTB_ADDR)) 5056d1857eSAmit Nagalendif 5156d1857eSAmit Nagal 527ca7fb1bSAmit NagalPLAT_XLAT_TABLES_DYNAMIC := 0 537ca7fb1bSAmit Nagalifeq (${PLAT_XLAT_TABLES_DYNAMIC},1) 547ca7fb1bSAmit Nagal$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC)) 557ca7fb1bSAmit Nagalendif 567ca7fb1bSAmit Nagal 57*0375188aSAmit Nagal# enable assert() for release/debug builds 58*0375188aSAmit NagalENABLE_ASSERTIONS := 1 59*0375188aSAmit Nagal 605a8ffeabSTejas PatelPLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 615a8ffeabSTejas Patel -Iplat/xilinx/common/include/ \ 626e2f0d10SWendy Liang -Iplat/xilinx/common/ipi_mailbox_service/ \ 63c73a90e5STejas Patel -Iplat/xilinx/versal/include/ \ 64c73a90e5STejas Patel -Iplat/xilinx/versal/pm_service/ 65f91c3cb1SSiva Durga Prasad Paladugu 6656d1857eSAmit Nagalinclude lib/libfdt/libfdt.mk 67a6ea06f5SAlexei Fedorov# Include GICv3 driver files 68a6ea06f5SAlexei Fedorovinclude drivers/arm/gic/v3/gicv3.mk 690e9f54e5SMichal Simekinclude lib/xlat_tables_v2/xlat_tables.mk 70a6ea06f5SAlexei Fedorov 710e9f54e5SMichal SimekPLAT_BL_COMMON_SOURCES := drivers/arm/dcc/dcc_console.c \ 72f91c3cb1SSiva Durga Prasad Paladugu drivers/delay_timer/delay_timer.c \ 73f91c3cb1SSiva Durga Prasad Paladugu drivers/delay_timer/generic_delay_timer.c \ 74a6ea06f5SAlexei Fedorov ${GICV3_SOURCES} \ 75f91c3cb1SSiva Durga Prasad Paladugu drivers/arm/pl011/aarch64/pl011_console.S \ 762cc97771SAmbroise Vincent plat/common/aarch64/crash_console_helpers.S \ 775a8ffeabSTejas Patel plat/arm/common/arm_cci.c \ 7831ce893eSVenkatesh Yadav Abbarapu plat/arm/common/arm_common.c \ 79f91c3cb1SSiva Durga Prasad Paladugu plat/common/plat_gicv3.c \ 80f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/aarch64/versal_helpers.S \ 810e9f54e5SMichal Simek plat/xilinx/versal/aarch64/versal_common.c \ 820e9f54e5SMichal Simek ${XLAT_TABLES_LIB_SRCS} 83f91c3cb1SSiva Durga Prasad Paladugu 840b25f404SVenkatesh Yadav AbbarapuVERSAL_CONSOLE ?= pl011 850b25f404SVenkatesh Yadav Abbarapuifeq (${VERSAL_CONSOLE}, $(filter ${VERSAL_CONSOLE},pl011 pl011_0 pl011_1 dcc)) 860b25f404SVenkatesh Yadav Abbarapuelse 870b25f404SVenkatesh Yadav Abbarapu $(error "Please define VERSAL_CONSOLE") 880b25f404SVenkatesh Yadav Abbarapuendif 890b25f404SVenkatesh Yadav Abbarapu 900b25f404SVenkatesh Yadav Abbarapu$(eval $(call add_define_val,VERSAL_CONSOLE,VERSAL_CONSOLE_ID_${VERSAL_CONSOLE})) 910b25f404SVenkatesh Yadav Abbarapu 925a8ffeabSTejas PatelBL31_SOURCES += drivers/arm/cci/cci.c \ 93f91c3cb1SSiva Durga Prasad Paladugu lib/cpus/aarch64/cortex_a72.S \ 947c36fbccSPrasad Kummari common/fdt_wrappers.c \ 95f91c3cb1SSiva Durga Prasad Paladugu plat/common/plat_psci_common.c \ 96c73a90e5STejas Patel plat/xilinx/common/ipi.c \ 9756d1857eSAmit Nagal plat/xilinx/common/plat_fdt.c \ 987c36fbccSPrasad Kummari plat/xilinx/common/plat_console.c \ 9931ce893eSVenkatesh Yadav Abbarapu plat/xilinx/common/plat_startup.c \ 1006e2f0d10SWendy Liang plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ 101c73a90e5STejas Patel plat/xilinx/common/pm_service/pm_ipi.c \ 102a92681d9SJay Buddhabhatti plat/xilinx/common/pm_service/pm_api_sys.c \ 103a92681d9SJay Buddhabhatti plat/xilinx/common/pm_service/pm_svc_main.c \ 104079c6e24SAkshay Belsare plat/xilinx/common/versal.c \ 105f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/bl31_versal_setup.c \ 106f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/plat_psci.c \ 107f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/plat_versal.c \ 108f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/plat_topology.c \ 109f91c3cb1SSiva Durga Prasad Paladugu plat/xilinx/versal/sip_svc_setup.c \ 110c73a90e5STejas Patel plat/xilinx/versal/versal_gicv3.c \ 111c73a90e5STejas Patel plat/xilinx/versal/versal_ipi.c \ 11256d1857eSAmit Nagal plat/xilinx/versal/pm_service/pm_client.c \ 11356d1857eSAmit Nagal common/fdt_fixup.c \ 11456d1857eSAmit Nagal ${LIBFDT_SRCS} 115302b4dfbSVenkatesh Yadav Abbarapu 116302b4dfbSVenkatesh Yadav Abbarapuifeq ($(HARDEN_SLS_ALL), 1) 117302b4dfbSVenkatesh Yadav AbbarapuTF_CFLAGS_aarch64 += -mharden-sls=all 118302b4dfbSVenkatesh Yadav Abbarapuendif 119