1 /* 2 * Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <plat_ipi.h> 8 #include <versal_def.h> 9 #include <plat_private.h> 10 #include <common/debug.h> 11 #include <drivers/generic_delay_timer.h> 12 #include <lib/mmio.h> 13 #include <lib/xlat_tables/xlat_tables.h> 14 #include <plat/common/platform.h> 15 16 /* 17 * Table of regions to map using the MMU. 18 * This doesn't include TZRAM as the 'mem_layout' argument passed to 19 * configure_mmu_elx() will give the available subset of that, 20 */ 21 const mmap_region_t plat_versal_mmap[] = { 22 MAP_REGION_FLAT(DEVICE0_BASE, DEVICE0_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 23 MAP_REGION_FLAT(DEVICE1_BASE, DEVICE1_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 24 MAP_REGION_FLAT(CRF_BASE, CRF_SIZE, MT_DEVICE | MT_RW | MT_SECURE), 25 MAP_REGION_FLAT(FPD_MAINCCI_BASE, FPD_MAINCCI_SIZE, MT_DEVICE | MT_RW | 26 MT_SECURE), 27 { 0 } 28 }; 29 30 const mmap_region_t *plat_versal_get_mmap(void) 31 { 32 return plat_versal_mmap; 33 } 34 35 static void versal_print_platform_name(void) 36 { 37 NOTICE("ATF running on Xilinx %s\n", PLATFORM_NAME); 38 } 39 40 void versal_config_setup(void) 41 { 42 uint32_t val; 43 44 /* Configure IPI data for versal */ 45 versal_ipi_config_table_init(); 46 47 versal_print_platform_name(); 48 49 /* Global timer init - Program time stamp reference clk */ 50 val = mmio_read_32(VERSAL_CRL_TIMESTAMP_REF_CTRL); 51 val |= VERSAL_CRL_APB_TIMESTAMP_REF_CTRL_CLKACT_BIT; 52 mmio_write_32(VERSAL_CRL_TIMESTAMP_REF_CTRL, val); 53 54 /* Clear reset of timestamp reg */ 55 mmio_write_32(VERSAL_CRL_RST_TIMESTAMP_OFFSET, 0x0); 56 57 /* Program freq register in System counter and enable system counter. */ 58 mmio_write_32(VERSAL_IOU_SCNTRS_BASE_FREQ, VERSAL_CPU_CLOCK); 59 mmio_write_32(VERSAL_IOU_SCNTRS_COUNTER_CONTROL_REG, 60 VERSAL_IOU_SCNTRS_CONTROL_EN); 61 62 generic_delay_timer_init(); 63 } 64 65 unsigned int plat_get_syscnt_freq2(void) 66 { 67 return VERSAL_CPU_CLOCK; 68 } 69 70