1 /* 2 * Copyright (c) 2014-2019, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2023, Advanced Micro Devices. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <common/bl_common.h> 9 #include <common/debug.h> 10 #include <drivers/arm/pl011.h> 11 #include <drivers/console.h> 12 #include <plat/arm/common/plat_arm.h> 13 #include <platform_tsp.h> 14 15 #include <plat_private.h> 16 17 /******************************************************************************* 18 * Initialize the UART 19 ******************************************************************************/ 20 void tsp_early_platform_setup(void) 21 { 22 /* 23 * Register a different console than already in use to display 24 * messages from TSP 25 */ 26 static console_t tsp_boot_console; 27 int32_t rc; 28 29 #if defined(PLAT_zynqmp) 30 rc = console_cdns_register((uintptr_t)UART_BASE, 31 (uint32_t)get_uart_clk(), 32 (uint32_t)UART_BAUDRATE, 33 &tsp_boot_console); 34 #else 35 rc = console_pl011_register((uintptr_t)UART_BASE, 36 (uint32_t)get_uart_clk(), 37 (uint32_t)UART_BAUDRATE, 38 &tsp_boot_console); 39 #endif 40 41 if (rc == 0) { 42 panic(); 43 } 44 45 console_set_scope(&tsp_boot_console, 46 CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_BOOT); 47 } 48 49 /******************************************************************************* 50 * Perform platform specific setup placeholder 51 ******************************************************************************/ 52 void tsp_platform_setup(void) 53 { 54 /* 55 * For ZynqMP, the GICv2 driver needs to be initialized in S-EL1, 56 * and for other platforms, the GICv3 driver is initialized in EL3. 57 * This is because S-EL1 can use GIC system registers to manage 58 * interrupts and does not need to be initialized again in SEL1. 59 */ 60 #if defined(PLAT_zynqmp) 61 plat_arm_gic_driver_init(); 62 plat_arm_gic_init(); 63 #endif 64 } 65 66 /******************************************************************************* 67 * Perform the very early platform specific architectural setup here. At the 68 * moment this is only initializes the MMU 69 ******************************************************************************/ 70 void tsp_plat_arch_setup(void) 71 { 72 const mmap_region_t bl_regions[] = { 73 MAP_REGION_FLAT(BL32_BASE, BL32_END - BL32_BASE, 74 MT_MEMORY | MT_RW | MT_SECURE), 75 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, 76 MT_CODE | MT_SECURE), 77 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE, 78 MT_RO_DATA | MT_SECURE), 79 #if defined(PLAT_zynqmp) || defined(PLAT_versal) 80 MAP_REGION_FLAT(BL_COHERENT_RAM_BASE, 81 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 82 MT_DEVICE | MT_RW | MT_SECURE), 83 #endif 84 {0} 85 }; 86 87 setup_page_tables(bl_regions, plat_get_mmap()); 88 enable_mmu_el1(0); 89 } 90