xref: /rk3399_ARM-atf/plat/xilinx/common/tsp/tsp_plat_setup.c (revision 66fb7ee422c2de7a126c57945a245c855ba7d807)
1 /*
2  * Copyright (c) 2014-2025, Arm Limited and Contributors. All rights reserved.
3  * Copyright (c) 2023, Advanced Micro Devices. All rights reserved.
4  *
5  * SPDX-License-Identifier: BSD-3-Clause
6  */
7 
8 #include <common/bl_common.h>
9 #include <common/debug.h>
10 #include <drivers/arm/pl011.h>
11 #include <drivers/console.h>
12 #include <plat/arm/common/plat_arm.h>
13 #include <platform_tsp.h>
14 
15 #include <plat_private.h>
16 
17 /*******************************************************************************
18  * Initialize the UART
19  ******************************************************************************/
tsp_early_platform_setup(u_register_t arg0,u_register_t arg1,u_register_t arg2,u_register_t arg3)20 void tsp_early_platform_setup(u_register_t arg0, u_register_t arg1,
21 			      u_register_t arg2, u_register_t arg3)
22 {
23 	/*
24 	 * Register a different console than already in use to display
25 	 * messages from TSP
26 	 */
27 	static console_t tsp_boot_console;
28 	int32_t rc;
29 
30 #if defined(PLAT_zynqmp)
31 	rc = console_cdns_register((uintptr_t)UART_BASE,
32 				   (uint32_t)get_uart_clk(),
33 				   (uint32_t)UART_BAUDRATE,
34 				   &tsp_boot_console);
35 #else
36 	rc = console_pl011_register((uintptr_t)UART_BASE,
37 				    (uint32_t)get_uart_clk(),
38 				    (uint32_t)UART_BAUDRATE,
39 				    &tsp_boot_console);
40 #endif
41 
42 	if (rc == 0) {
43 		panic();
44 	}
45 
46 	console_set_scope(&tsp_boot_console,
47 			  CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_BOOT);
48 }
49 
50 /*******************************************************************************
51  * Perform platform specific setup placeholder
52  ******************************************************************************/
tsp_platform_setup(void)53 void tsp_platform_setup(void)
54 {
55 /*
56  * For ZynqMP, the GICv2 driver needs to be initialized in S-EL1,
57  * and for other platforms, the GICv3 driver is initialized in EL3.
58  * This is because S-EL1 can use GIC system registers to manage
59  * interrupts and does not need to be initialized again in SEL1.
60  */
61 #if defined(PLAT_zynqmp)
62 	plat_arm_gic_driver_init();
63 	plat_arm_gic_init();
64 #endif
65 }
66 
67 /*******************************************************************************
68  * Perform the very early platform specific architectural setup here. At the
69  * moment this is only initializes the MMU
70  ******************************************************************************/
tsp_plat_arch_setup(void)71 void tsp_plat_arch_setup(void)
72 {
73 	const mmap_region_t bl_regions[] = {
74 		MAP_REGION_FLAT(BL32_BASE, BL32_END - BL32_BASE,
75 			MT_MEMORY | MT_RW | MT_SECURE),
76 		MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
77 			MT_CODE | MT_SECURE),
78 		MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE,
79 			MT_RO_DATA | MT_SECURE),
80 #if defined(PLAT_zynqmp) || defined(PLAT_versal)
81 		MAP_REGION_FLAT(BL_COHERENT_RAM_BASE,
82 			BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE,
83 			MT_DEVICE | MT_RW | MT_SECURE),
84 #endif
85 		{0}
86 	};
87 
88 	setup_page_tables(bl_regions, plat_get_mmap());
89 	enable_mmu_el1(0);
90 }
91