1 /* 2 * Copyright (c) 2014-2019, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2023, Advanced Micro Devices. All rights reserved. 4 * 5 * SPDX-License-Identifier: BSD-3-Clause 6 */ 7 8 #include <common/bl_common.h> 9 #include <common/debug.h> 10 #include <drivers/console.h> 11 #include <plat/arm/common/plat_arm.h> 12 #include <platform_tsp.h> 13 14 #include <plat_private.h> 15 16 /******************************************************************************* 17 * Initialize the UART 18 ******************************************************************************/ 19 void tsp_early_platform_setup(void) 20 { 21 /* 22 * Register a different console than already in use to display 23 * messages from TSP 24 */ 25 static console_t tsp_boot_console; 26 int32_t rc; 27 28 rc = console_cdns_register((uintptr_t)UART_BASE, 29 (uint32_t)get_uart_clk(), 30 (uint32_t)UART_BAUDRATE, 31 &tsp_boot_console); 32 if (rc == 0) { 33 panic(); 34 } 35 36 console_set_scope(&tsp_boot_console, 37 CONSOLE_FLAG_RUNTIME | CONSOLE_FLAG_BOOT); 38 } 39 40 /******************************************************************************* 41 * Perform platform specific setup placeholder 42 ******************************************************************************/ 43 void tsp_platform_setup(void) 44 { 45 plat_arm_gic_driver_init(); 46 plat_arm_gic_init(); 47 } 48 49 /******************************************************************************* 50 * Perform the very early platform specific architectural setup here. At the 51 * moment this is only initializes the MMU 52 ******************************************************************************/ 53 void tsp_plat_arch_setup(void) 54 { 55 const mmap_region_t bl_regions[] = { 56 MAP_REGION_FLAT(BL32_BASE, BL32_END - BL32_BASE, 57 MT_MEMORY | MT_RW | MT_SECURE), 58 MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE, 59 MT_CODE | MT_SECURE), 60 MAP_REGION_FLAT(BL_RO_DATA_BASE, BL_RO_DATA_END - BL_RO_DATA_BASE, 61 MT_RO_DATA | MT_SECURE), 62 MAP_REGION_FLAT(BL_COHERENT_RAM_BASE, 63 BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, 64 MT_DEVICE | MT_RW | MT_SECURE), 65 {0} 66 }; 67 68 setup_page_tables(bl_regions, plat_get_mmap()); 69 enable_mmu_el1(0); 70 } 71