1 /* 2 * Copyright (c) 2013-2020, Arm Limited and Contributors. All rights reserved. 3 * Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved. 4 * Copyright (c) 2022-2025, Advanced Micro Devices, Inc. All rights reserved. 5 * 6 * SPDX-License-Identifier: BSD-3-Clause 7 */ 8 9 10 #include <arch_helpers.h> 11 #include <lib/bakery_lock.h> 12 #include <lib/mmio.h> 13 #include <lib/spinlock.h> 14 #include <plat/common/platform.h> 15 16 #include <ipi.h> 17 #include <plat_ipi.h> 18 #include <plat_private.h> 19 #include "pm_defs.h" 20 #include "pm_ipi.h" 21 22 #define ERROR_CODE_MASK (0xFFFFU) 23 #define PM_OFFSET (0U) 24 25 /* 26 * ARM v8.2, the cache will turn off automatically when cpu 27 * power down. Therefore, there is no doubt to use the spin_lock here. 28 */ 29 #if !HW_ASSISTED_COHERENCY 30 static DEFINE_BAKERY_LOCK(pm_secure_lock); 31 static inline void pm_ipi_lock_get(void) 32 { 33 bakery_lock_get(&pm_secure_lock); 34 } 35 36 static inline void pm_ipi_lock_release(void) 37 { 38 bakery_lock_release(&pm_secure_lock); 39 } 40 #else 41 spinlock_t pm_secure_lock; 42 static inline void pm_ipi_lock_get(void) 43 { 44 spin_lock(&pm_secure_lock); 45 } 46 47 static inline void pm_ipi_lock_release(void) 48 { 49 spin_unlock(&pm_secure_lock); 50 } 51 #endif 52 53 /** 54 * pm_ipi_init() - Initialize IPI peripheral for communication with 55 * remote processor. 56 * @proc: Pointer to the processor who is initiating request. 57 * 58 * Return: On success, the initialization function must return 0. 59 * Any other return value will cause the framework to ignore 60 * the service. 61 * 62 * Called from pm_setup initialization function. 63 */ 64 void pm_ipi_init(const struct pm_proc *proc) 65 { 66 ipi_mb_open(proc->ipi->local_ipi_id, proc->ipi->remote_ipi_id); 67 } 68 69 /** 70 * pm_ipi_send_common() - Sends IPI request to the remote processor. 71 * @proc: Pointer to the processor who is initiating request. 72 * @payload: API id and call arguments to be written in IPI buffer. 73 * @is_blocking: if to trigger the notification in blocking mode or not. 74 * 75 * Send an IPI request to the power controller. Caller needs to hold 76 * the 'pm_secure_lock' lock. 77 * 78 * Return: Returns status, either success or error+reason. 79 * 80 */ 81 static enum pm_ret_status pm_ipi_send_common(const struct pm_proc *proc, 82 uint32_t payload[PAYLOAD_ARG_CNT], 83 uint32_t is_blocking) 84 { 85 uint32_t offset = PM_OFFSET; 86 uintptr_t buffer_base = proc->ipi->buffer_base + 87 IPI_BUFFER_TARGET_REMOTE_OFFSET + 88 IPI_BUFFER_REQ_OFFSET; 89 #if IPI_CRC_CHECK 90 payload[PAYLOAD_CRC_POS] = calculate_crc(payload, IPI_W0_TO_W6_SIZE); 91 #endif 92 93 /* Write payload into IPI buffer */ 94 for (size_t i = 0; i < PAYLOAD_ARG_CNT; i++) { 95 mmio_write_32(buffer_base + offset, payload[i]); 96 offset += PAYLOAD_ARG_SIZE; 97 } 98 99 /* Generate IPI to remote processor */ 100 ipi_mb_notify(proc->ipi->local_ipi_id, proc->ipi->remote_ipi_id, 101 is_blocking); 102 103 return PM_RET_SUCCESS; 104 } 105 106 /** 107 * pm_ipi_send_non_blocking() - Sends IPI request to the remote processor 108 * without blocking notification. 109 * @proc: Pointer to the processor who is initiating request. 110 * @payload: API id and call arguments to be written in IPI buffer. 111 * 112 * Send an IPI request to the power controller. 113 * 114 * Return: Returns status, either success or error+reason. 115 * 116 */ 117 enum pm_ret_status pm_ipi_send_non_blocking(const struct pm_proc *proc, 118 uint32_t payload[PAYLOAD_ARG_CNT]) 119 { 120 enum pm_ret_status ret; 121 122 pm_ipi_lock_get(); 123 124 ret = pm_ipi_send_common(proc, payload, IPI_NON_BLOCKING); 125 126 pm_ipi_lock_release(); 127 128 return ret; 129 } 130 131 /** 132 * pm_ipi_send() - Sends IPI request to the remote processor. 133 * @proc: Pointer to the processor who is initiating request. 134 * @payload: API id and call arguments to be written in IPI buffer. 135 * 136 * Send an IPI request to the power controller. 137 * 138 * Return: Returns status, either success or error+reason. 139 * 140 */ 141 enum pm_ret_status pm_ipi_send(const struct pm_proc *proc, 142 uint32_t payload[PAYLOAD_ARG_CNT]) 143 { 144 enum pm_ret_status ret; 145 146 pm_ipi_lock_get(); 147 148 ret = pm_ipi_send_common(proc, payload, IPI_BLOCKING); 149 150 pm_ipi_lock_release(); 151 152 return ret; 153 } 154 155 156 /** 157 * pm_ipi_buff_read() - Reads IPI response after remote processor has handled 158 * interrupt. 159 * @proc: Pointer to the processor who is waiting and reading response. 160 * @value: Used to return value from IPI buffer element (optional). 161 * @count: Number of values to return in @value. 162 * 163 * Return: Returns status, either success or error+reason. 164 * 165 */ 166 static enum pm_ret_status pm_ipi_buff_read(const struct pm_proc *proc, 167 uint32_t *value, size_t count) 168 { 169 size_t i; 170 enum pm_ret_status ret; 171 #if IPI_CRC_CHECK 172 uint32_t crc; 173 #endif 174 uintptr_t buffer_base = proc->ipi->buffer_base + 175 IPI_BUFFER_TARGET_REMOTE_OFFSET + 176 IPI_BUFFER_RESP_OFFSET; 177 178 /* 179 * Read response from IPI buffer 180 * buf-0: success or error+reason 181 * buf-1: value 182 * buf-2: unused 183 * buf-3: unused 184 */ 185 for (i = 0U; i < count; i++) { 186 value[i] = mmio_read_32(buffer_base + ((i + 1U) * PAYLOAD_ARG_SIZE)); 187 } 188 189 /* 190 * Here mmio_read_32() reads return status stored in IPI payload that 191 * is received from firmware and it's value will be one the values 192 * listed in enum pm_ret_status. 193 */ 194 ret = (enum pm_ret_status)mmio_read_32(buffer_base); 195 #if IPI_CRC_CHECK 196 crc = mmio_read_32(buffer_base + (PAYLOAD_CRC_POS * PAYLOAD_ARG_SIZE)); 197 if (crc != calculate_crc((uint32_t *)buffer_base, IPI_W0_TO_W6_SIZE)) { 198 NOTICE("ERROR in CRC response payload value:0x%x\n", crc); 199 ret = PM_RET_ERROR_INVALID_CRC; 200 /* Payload data is invalid as CRC validation failed 201 * Clear the payload to avoid leakage of data to upper layers 202 */ 203 memset(value, 0, count); 204 } 205 #endif 206 207 return ret; 208 } 209 210 /** 211 * pm_ipi_buff_read_callb() - Callback function that reads value from 212 * ipi response buffer. 213 * @value: Used to return value from IPI buffer element. 214 * @count: Number of values to return in @value. 215 * 216 * This callback function fills requested data in @value from ipi response 217 * buffer. 218 * 219 * Return: Returns status, either success or error. 220 * 221 */ 222 enum pm_ret_status pm_ipi_buff_read_callb(uint32_t *value, size_t count) 223 { 224 size_t i; 225 #if IPI_CRC_CHECK 226 size_t local_count = count; 227 uint32_t crc; 228 #endif 229 uintptr_t buffer_base = IPI_BUFFER_REMOTE_BASE + 230 IPI_BUFFER_TARGET_LOCAL_OFFSET + 231 IPI_BUFFER_REQ_OFFSET; 232 enum pm_ret_status ret = PM_RET_SUCCESS; 233 234 for (i = 0; i < count; i++) { 235 value[i] = mmio_read_32(buffer_base + (i * PAYLOAD_ARG_SIZE)); 236 } 237 #if IPI_CRC_CHECK 238 if (local_count > (uint32_t)IPI_BUFFER_MAX_WORDS) { 239 local_count = IPI_BUFFER_MAX_WORDS; 240 } 241 242 crc = mmio_read_32(buffer_base + (PAYLOAD_CRC_POS * PAYLOAD_ARG_SIZE)); 243 if (crc != calculate_crc((uint32_t *)buffer_base, IPI_W0_TO_W6_SIZE)) { 244 NOTICE("ERROR in CRC response payload value:0x%x\n", crc); 245 ret = PM_RET_ERROR_INVALID_CRC; 246 /* Payload data is invalid as CRC validation failed 247 * Clear the payload to avoid leakage of data to upper layers 248 */ 249 memset(value, 0, local_count); 250 } 251 #endif 252 return ret; 253 } 254 255 /** 256 * pm_ipi_send_sync() - Sends IPI request to the remote processor. 257 * @proc: Pointer to the processor who is initiating request. 258 * @payload: API id and call arguments to be written in IPI buffer. 259 * @value: Used to return value from IPI buffer element (optional). 260 * @count: Number of values to return in @value. 261 * 262 * Send an IPI request to the power controller and wait for it to be handled. 263 * 264 * Return: Returns status, either success or error+reason and, optionally, 265 * @value. 266 * 267 */ 268 enum pm_ret_status pm_ipi_send_sync(const struct pm_proc *proc, 269 uint32_t payload[PAYLOAD_ARG_CNT], 270 uint32_t *value, size_t count) 271 { 272 enum pm_ret_status ret; 273 274 pm_ipi_lock_get(); 275 276 ret = pm_ipi_send_common(proc, payload, IPI_BLOCKING); 277 if (ret != PM_RET_SUCCESS) { 278 goto unlock; 279 } 280 281 ret = (enum pm_ret_status)(ERROR_CODE_MASK & 282 (uint32_t)(pm_ipi_buff_read(proc, value, count))); 283 284 unlock: 285 pm_ipi_lock_release(); 286 287 return ret; 288 } 289 290 void pm_ipi_irq_enable(const struct pm_proc *proc) 291 { 292 ipi_mb_enable_irq(proc->ipi->local_ipi_id, proc->ipi->remote_ipi_id); 293 } 294 295 void pm_ipi_irq_clear(const struct pm_proc *proc) 296 { 297 ipi_mb_ack(proc->ipi->local_ipi_id, proc->ipi->remote_ipi_id); 298 } 299 300 uint32_t pm_ipi_irq_status(const struct pm_proc *proc) 301 { 302 uint32_t ret; 303 uint32_t result = (uint32_t)PM_RET_SUCCESS; 304 305 ret = ipi_mb_enquire_status(proc->ipi->local_ipi_id, 306 proc->ipi->remote_ipi_id); 307 if ((ret & IPI_MB_STATUS_RECV_PENDING) != 0U) { 308 result = IPI_MB_STATUS_RECV_PENDING; 309 } 310 311 return result; 312 } 313 314 #if IPI_CRC_CHECK 315 uint32_t calculate_crc(uint32_t payload[PAYLOAD_ARG_CNT], uint32_t buffersize) 316 { 317 uint32_t crcinit = CRC_INIT_VALUE; 318 uint32_t order = CRC_ORDER; 319 uint32_t polynom = CRC_POLYNOM; 320 uint32_t i, j, c, bit, datain, crcmask, crchighbit; 321 uint32_t crc = crcinit; 322 323 crcmask = ((((uint32_t)1U << (order - 1U)) - 1U) << 1U) | 1U; 324 crchighbit = ((uint32_t)1U << (order - 1U)); 325 326 for (i = 0U; i < buffersize; i++) { 327 datain = mmio_read_8((unsigned long)payload + i); 328 c = datain; 329 j = 0x80U; 330 while (j != 0U) { 331 bit = crc & crchighbit; 332 crc <<= 1U; 333 if (0U != (c & j)) { 334 bit ^= crchighbit; 335 } 336 if (bit != 0U) { 337 crc ^= polynom; 338 } 339 j >>= 1U; 340 } 341 crc &= crcmask; 342 } 343 return crc; 344 } 345 #endif 346