Merge changes from topic "xlnx_enhancement_on_secure_and_non_secure_flag" into integration

* changes:
feat(xilinx): use common SECURE/NON_SECURE macro
fix(xilinx): incorrect usage of SECURE_FLAG

Merge changes from topic "xlnx_enhancement_on_secure_and_non_secure_flag" into integration

* changes:
feat(xilinx): use common SECURE/NON_SECURE macro
fix(xilinx): incorrect usage of SECURE_FLAG for psci

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feat(xilinx): use common SECURE/NON_SECURE macro

Remove platform-specific macro definitions such as SECURE_FLAG and
NON_SECURE_FLAG, and replace them with the common macros SECURE and
NON_SECURE acr

feat(xilinx): use common SECURE/NON_SECURE macro

Remove platform-specific macro definitions such as SECURE_FLAG and
NON_SECURE_FLAG, and replace them with the common macros SECURE and
NON_SECURE across all AMD-Xilinx platforms.

Change-Id: I95465e29ac8a9370da135c2113203c3206ecfec0
Signed-off-by: Ronak Jain <ronak.jain@amd.com>

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Merge "fix(xilinx): resolve violations generated with IPI_CRC_CHECK enabled" into integration

fix(xilinx): resolve violations generated with IPI_CRC_CHECK enabled

Fix below MISRA violations generated with IPI_CRC_CHECK enabled:
- MISRA-C rule 8.3
- Made same parameter names in function dec

fix(xilinx): resolve violations generated with IPI_CRC_CHECK enabled

Fix below MISRA violations generated with IPI_CRC_CHECK enabled:
- MISRA-C rule 8.3
- Made same parameter names in function declaration and definition.
- MISRA-C rule 12.2
- Type casted left operand to a larger width than shift.
- MISRA-C rule 15.6
- Added braces for if statements.

Change-Id: I90c5723e77431cc29b9896425ce1be94df44c042
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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Merge changes from topic "xlnx_versal_misra_fixes" into integration

* changes:
fix(xilinx): resolve misra rule 2.3 violations
fix(xilinx): resolve misra rule 2.7 violations
fix(xilinx): resolv

Merge changes from topic "xlnx_versal_misra_fixes" into integration

* changes:
fix(xilinx): resolve misra rule 2.3 violations
fix(xilinx): resolve misra rule 2.7 violations
fix(xilinx): resolve misra rule 8.6 violations
fix(xilinx): resolve misra rule 11.3 violations
fix(xilinx): resolve misra rule 2.2 violations
fix(xilinx): resolve misra rule 15.7 violations

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Merge "fix(xilinx): resolve misra rule 8.4 violations" into integration

fix(xilinx): resolve misra rule 2.2 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.2.2:
- There shall be no dead code.
- Fix:
- Moved code to macro protected section.

fix(xilinx): resolve misra rule 2.2 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.2.2:
- There shall be no dead code.
- Fix:
- Moved code to macro protected section.

Change-Id: I58b340aa452b67ba765dfe33ff7eb64a4eac8624
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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Merge changes from topic "xlnx_misra_fixes_versal" into integration

* changes:
fix(xilinx): resolve misra rule 8.3 violations
fix(xilinx): resolve misra rule 14.4 violation
fix(xilinx): resolv

Merge changes from topic "xlnx_misra_fixes_versal" into integration

* changes:
fix(xilinx): resolve misra rule 8.3 violations
fix(xilinx): resolve misra rule 14.4 violation
fix(xilinx): resolve misra rule 10.4 violations
fix(xilinx): resolve misra rule 10.3 violations

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fix(xilinx): resolve misra rule 8.4 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.4:
- A compatible declaration shall be visible when an object or function
with e

fix(xilinx): resolve misra rule 8.4 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.8.4:
- A compatible declaration shall be visible when an object or function
with external linkage is defined.
- Fix:
- Declared variable as static.

Change-Id: I44a022de3d5a62d255e2481dc1f4d1e8df2c7eb0
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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fix(xilinx): resolve misra rule 10.4 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.4:
- Both operands of an operator in which the usual arithmetic conversions
ar

fix(xilinx): resolve misra rule 10.4 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.4:
- Both operands of an operator in which the usual arithmetic conversions
are performed shall have the same essential type category.
- Fix:
- Made data type same for both the operands.

Change-Id: I0cea19477f3c10265d95ea1d5d2ea151dbf174bb
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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fix(xilinx): resolve misra rule 10.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.3:
- The value of an expression shall not be assigned to an object
with a narr

fix(xilinx): resolve misra rule 10.3 violations

Fixed below MISRA violation:
- MISRA Violation: MISRA-C:2012 R.10.3:
- The value of an expression shall not be assigned to an object
with a narrower essential type or of a different essential type
category.
- Fix:
- Explicitly type casted to narrower essential type or of a different
essential type category.

Change-Id: Ia4258d2d0655f7847f832804a13d182ac0a2a29b
Signed-off-by: Devanshi Chauhan Alpeshbhai <devanshi.chauhanalpeshbhai@amd.com>

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Merge changes from topic "xlnx_fix_plat_single_ret" into integration

* changes:
fix(versal2): modify function to have single return
fix(versal-net): modify function to have single return
fix(v

Merge changes from topic "xlnx_fix_plat_single_ret" into integration

* changes:
fix(versal2): modify function to have single return
fix(versal-net): modify function to have single return
fix(versal): modify function to have single return
fix(xilinx): modify function to have single return
fix(zynqmp): modify function to have single return
fix(versal-net): add unsigned suffix to match data type
fix(versal): add unsigned suffix to match data type
fix(versal2): add missing curly braces
fix(versal-net): add missing curly braces
fix(zynqmp): add missing curly braces

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fix(xilinx): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store th

fix(xilinx): modify function to have single return

This corrects the MISRA violation C2012-15.5:
A function should have a single point of exit at the end.
Introduced a temporary variable to store the return value to
ensure single return for the function.

Change-Id: Ice3eb939664ffc62c1f586b641e37481f10ffff6
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes from topic "xlnx_fix_plat_data_types" into integration

* changes:
fix(versal2): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(versal-

Merge changes from topic "xlnx_fix_plat_data_types" into integration

* changes:
fix(versal2): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(versal-net): typecast operands to match data type
fix(xilinx): typecast operands to match data type
fix(zynqmp): typecast operands to match data type
fix(versal-net): typecast operands to match data type
fix(versal): typecast operands to match data type
fix(xilinx): typecast operands to match data type
fix(zynqmp): typecast operands to match data type
fix(versal2): typecast expressions to match data type
fix(versal-net): typecast expressions to match data type
fix(versal): typecast expressions to match data type
fix(xilinx): typecast expressions to match data type
fix(zynqmp): typecast expressions to match data type
fix(zynqmp): align essential type categories
fix(zynqmp): typecast expression to match data type
fix(xilinx): typecast expression to match data type

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fix(xilinx): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic conversions
are performed shall have the

fix(xilinx): typecast expressions to match data type

This corrects the MISRA violation C2012-10.4:
Both operands of an operator in which the usual arithmetic conversions
are performed shall have the same essential type category.
The condition is explicitly checked against 0U, appending 'U' and
typecasting for unsigned comparison.

Change-Id: I9110ea86f5ee49af0b21be78fd0890742ef95ddf
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge changes from topic "xlnx_fix_plat_boolc_fn_ret" into integration

* changes:
fix(xilinx): avoid altering function parameters
fix(versal-net): ignore the unused function return value
fix(z

Merge changes from topic "xlnx_fix_plat_boolc_fn_ret" into integration

* changes:
fix(xilinx): avoid altering function parameters
fix(versal-net): ignore the unused function return value
fix(zynqmp): ignore the unused function return value
fix(versal-net): modify conditions to have boolean type
fix(versal): modify conditions to have boolean type
fix(xilinx): modify conditions to have boolean type
fix(zynqmp): modify conditions to have boolean type

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fix(xilinx): avoid altering function parameters

This corrects the MISRA violation C2012-17.8:
A function parameter should not be modified.
Local variable is declared and used to process the value
fr

fix(xilinx): avoid altering function parameters

This corrects the MISRA violation C2012-17.8:
A function parameter should not be modified.
Local variable is declared and used to process the value
from the argument.

Change-Id: I96b4381c3e05f7065d824592e7b5e5929f6b3627
Signed-off-by: Nithin G <nithing@amd.com>
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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Merge "fix(xilinx): optimize logic to read IPI response" into integration

fix(xilinx): optimize logic to read IPI response

Optimize logic to read IPI response from firmware and avoid using
temporary buffer. Also, use pointer instead of array as per standard
format to pass

fix(xilinx): optimize logic to read IPI response

Optimize logic to read IPI response from firmware and avoid using
temporary buffer. Also, use pointer instead of array as per standard
format to pass by reference in function.

Change-Id: I45ebaeacc932a11bbfd4b7d9b9c43b4ee8ee7df2
Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>

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Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration

* changes:
docs(xilinx): update SMC documentation in TF-A
feat(xilinx): add feature check function for TF-A specific

Merge changes from topic "xlnx_tfa_passthrough_plm_ipi_cmd" into integration

* changes:
docs(xilinx): update SMC documentation in TF-A
feat(xilinx): add feature check function for TF-A specific APIs
feat(xilinx): update SiP SVC version number
feat(xilinx): update TF-A to passthrough all PLM commands
fix(xilinx): fix logic to read ipi response

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fix(xilinx): fix logic to read ipi response

Currently, PLM IPI command supports total 8 32-bit payloads. But existing
logic to read IPI response in TF-A is trying to read 9 32-bit payloads
(ret stat

fix(xilinx): fix logic to read ipi response

Currently, PLM IPI command supports total 8 32-bit payloads. But existing
logic to read IPI response in TF-A is trying to read 9 32-bit payloads
(ret status + 8 ret payloads) in case of IPI_CRC_CHECK enabled which is
incorrect.

So, fix logic to read only 8 32-bit payloads (ret status + 6 ret payloads + CRC)
in case when IPI_CRC_CHECK is enabled and read 7 32-bit payloads
(ret status + 5 ret payloads + CRC) in case when IPI_CRC_CHECK is disabled.

Signed-off-by: Jay Buddhabhatti <jay.buddhabhatti@amd.com>
Change-Id: I0abca2f787cc7a66fdd5522e6bd15a9771029071

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Merge "chore(xilinx): reorder include files as per TF-A guidelines" into integration

chore(xilinx): reorder include files as per TF-A guidelines

This commit reorders the include files in accordance with the
guidelines provided by Trusted Firmware-A (TF-A).
The include files are rear

chore(xilinx): reorder include files as per TF-A guidelines

This commit reorders the include files in accordance with the
guidelines provided by Trusted Firmware-A (TF-A).
The include files are rearranged to ensure a consistent and
organized structure in the codebase, facilitating better
readability and maintainability.

https: //trustedfirmware-a.readthedocs.io/en/latest/process/coding-style.html#headers-and-inclusion
https://git.trustedfirmware.org/ci/tf-a-ci-scripts.git/tree/script/static-checks/

For example, to run header check:
/tf-a-ci-scripts/script/static-checks/check-include-order.py --tree ${PWD} > Includefileorder.txt

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Ia5802722e69859596b94f31ec40755adbf7d865b

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Merge "chore(xilinx): follow kernel doc format for functional documentation" into integration

chore(xilinx): follow kernel doc format for functional documentation

For TF-A, there is no format specified for functional documentation.
For AMD-Xilinx platforms, following kernel-doc format for th

chore(xilinx): follow kernel doc format for functional documentation

For TF-A, there is no format specified for functional documentation.
For AMD-Xilinx platforms, following kernel-doc format for the functional
documentation to make sure AMD-xilinx documentation is align with
actual code.

For example use kernel-doc from linux to call:
<linux>/scripts/kernel-doc -man -v 1 >/dev/null file...

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Change-Id: Idcc9def408b6c8da35b36f67ef82fc00890e998c

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