History log of /rk3399_ARM-atf/plat/xilinx/common/plat_clkfunc.c (Results 1 – 7 of 7)
Revision Date Author Comments
# 147e4677 18-Sep-2025 Govindraj Raja <govindraj.raja@arm.com>

Merge changes from topic "xlnx_misra_fix_gen_common" into integration

* changes:
fix(bl31): add missing curly braces
fix(xilinx): match function type as its declared
fix(platforms): typedef op

Merge changes from topic "xlnx_misra_fix_gen_common" into integration

* changes:
fix(bl31): add missing curly braces
fix(xilinx): match function type as its declared
fix(platforms): typedef operands to match data type
fix(platforms): declare unused parameters as void
fix(platforms): add essential bool type
fix(platforms): fix misra violation 10.1

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# 1d94b27b 30-Jun-2025 Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

fix(xilinx): match function type as its declared

This corrects the MISRA violation C2012-8.3:
matching the type of function definition as per its declaration.

Change-Id: Iee582e3bdb3d51fd53938009d2

fix(xilinx): match function type as its declared

This corrects the MISRA violation C2012-8.3:
matching the type of function definition as per its declaration.

Change-Id: Iee582e3bdb3d51fd53938009d29a921569616566
Signed-off-by: Saivardhan Thatikonda <saivardhan.thatikonda@amd.com>

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# a9fdd198 06-Nov-2024 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_fix_plat_extn_decl_link" into integration

* changes:
fix(versal2): variable conflicting with external linkage
fix(versal-net): variable conflicting with external l

Merge changes from topic "xlnx_fix_plat_extn_decl_link" into integration

* changes:
fix(versal2): variable conflicting with external linkage
fix(versal-net): variable conflicting with external linkage
fix(versal): variable conflicting with external linkage
fix(zynqmp): variable conflicting with external linkage
fix(versal2): add external declaration
fix(versal): add external declaration
fix(zynqmp): add external declaration

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# 16c611f8 07-Oct-2024 Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

fix(versal): add external declaration

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined.

Change-Id:

fix(versal): add external declaration

This corrects the MISRA violation C2012-8.4:
A compatible declaration shall be visible when an object or
function with external linkage is defined.

Change-Id: I91817596c5de84b259a5dffcc01a7b1106a5b7a4
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>

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# 1c76dd2d 05-Jan-2024 Joanna Farley <joanna.farley@arm.com>

Merge changes from topic "xlnx_set_freq" into integration

* changes:
refactor(xilinx): move plat_get_syscnt_freq2 to common file
refactor(versal-net): rename VERSAL_NET_IOU_SCNTRS register to ge

Merge changes from topic "xlnx_set_freq" into integration

* changes:
refactor(xilinx): move plat_get_syscnt_freq2 to common file
refactor(versal-net): rename VERSAL_NET_IOU_SCNTRS register to generic
fix(versal-net): setup counter frequency
fix(versal): initialize cntfrq_el0 register

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# cc3374ac 20-Dec-2023 Prasad Kummari <prasad.kummari@amd.com>

refactor(xilinx): move plat_get_syscnt_freq2 to common file

The code in the AMD-Xilinx platform for Versal and Versal NET is being
refactored to move the plat_get_syscnt_freq2() function to a common

refactor(xilinx): move plat_get_syscnt_freq2 to common file

The code in the AMD-Xilinx platform for Versal and Versal NET is being
refactored to move the plat_get_syscnt_freq2() function to a common
file. This common function is utilized for obtaining the CPU clock
frequency from the platform.

Change-Id: I7a4c3fa43a2941d51cacd259c57b24e545aea848
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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# f000744e 14-Dec-2023 Prasad Kummari <prasad.kummari@amd.com>

fix(versal): initialize cntfrq_el0 register

The set_cnt_freq() function is introduced to configure the counter
frequency register.If the counter frequency register is zero, it writes
the output of p

fix(versal): initialize cntfrq_el0 register

The set_cnt_freq() function is introduced to configure the counter
frequency register.If the counter frequency register is zero, it writes
the output of plat_get_syscnt_freq2() the cpu_clocks to the counter
frequency register.

According to the design specifications provided for Versal, the
lpd_data.cdo file contains a mask_write operation for register
0xFF140020 (base_frequency_ID_register) to set it to 0x5f5e100,
configuring it for a 100MHz clock frequency.

Reading the value of the IOU_SCNTRS_BASE_FREQ register using
mmio_read_32() to determine the counter frequency. If the counter
frequency is zero, the system will set the default CPU clocks constants
in TF-A and displays message. However, if the counter frequency is
non-zero, the program will return the value stored in the
IOU_SCNTRS_BASE_FREQ register.

The issue lies in dcc_status_timeout(),function verifying timeout
status, particularly within timeout_cnt_us2cnt(), converting
microseconds to counter ticks using read_cntfrq_el0(), which returns
zero. timeout_elapsed() then checks if the current counter from
read_cntpct_el0()exceeds the expiration count, denoting timeout.

After the function set_cnt_freq() writes into the counter frequency
register, the function timeout_cnt_us2cnt() is used to obtain the
appropriate counter ticks. Subsequently, the function timeout_elapsed()
checks whether the current counter value read_cntpct_el0() has
exceeded the specified expiration count. If it has, this indicates
that the timeout has lapsed.

Change-Id: I8f2f4d804b5aefa6f92083d831a5ebfade384294
Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>

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