1 /* 2 * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <arch_helpers.h> 8 #include <arm_gic.h> 9 #include <assert.h> 10 #include <bl_common.h> 11 #include <console.h> 12 #include <context.h> 13 #include <context_mgmt.h> 14 #include <debug.h> 15 #include <dt-bindings/clock/stm32mp1-clks.h> 16 #include <generic_delay_timer.h> 17 #include <mmio.h> 18 #include <platform.h> 19 #include <platform_def.h> 20 #include <platform_sp_min.h> 21 #include <stm32mp1_clk.h> 22 #include <stm32mp1_dt.h> 23 #include <stm32mp1_private.h> 24 #include <string.h> 25 #include <tzc400.h> 26 #include <xlat_tables_v2.h> 27 28 /****************************************************************************** 29 * Placeholder variables for copying the arguments that have been passed to 30 * BL32 from BL2. 31 ******************************************************************************/ 32 static entry_point_info_t bl33_image_ep_info; 33 34 /******************************************************************************* 35 * Interrupt handler for FIQ (secure IRQ) 36 ******************************************************************************/ 37 void sp_min_plat_fiq_handler(uint32_t id) 38 { 39 switch (id) { 40 case STM32MP1_IRQ_TZC400: 41 ERROR("STM32MP1_IRQ_TZC400 generated\n"); 42 panic(); 43 break; 44 case STM32MP1_IRQ_AXIERRIRQ: 45 ERROR("STM32MP1_IRQ_AXIERRIRQ generated\n"); 46 panic(); 47 break; 48 default: 49 ERROR("SECURE IT handler not define for it : %i", id); 50 break; 51 } 52 } 53 54 /******************************************************************************* 55 * Return a pointer to the 'entry_point_info' structure of the next image for 56 * the security state specified. BL33 corresponds to the non-secure image type 57 * while BL32 corresponds to the secure image type. A NULL pointer is returned 58 * if the image does not exist. 59 ******************************************************************************/ 60 entry_point_info_t *sp_min_plat_get_bl33_ep_info(void) 61 { 62 entry_point_info_t *next_image_info; 63 64 next_image_info = &bl33_image_ep_info; 65 66 if (next_image_info->pc == 0U) { 67 return NULL; 68 } 69 70 return next_image_info; 71 } 72 73 /******************************************************************************* 74 * Perform any BL32 specific platform actions. 75 ******************************************************************************/ 76 void sp_min_early_platform_setup2(u_register_t arg0, u_register_t arg1, 77 u_register_t arg2, u_register_t arg3) 78 { 79 struct dt_node_info dt_dev_info; 80 int result; 81 bl_params_t *params_from_bl2 = (bl_params_t *)arg0; 82 83 /* Imprecise aborts can be masked in NonSecure */ 84 write_scr(read_scr() | SCR_AW_BIT); 85 86 assert(params_from_bl2 != NULL); 87 assert(params_from_bl2->h.type == PARAM_BL_PARAMS); 88 assert(params_from_bl2->h.version >= VERSION_2); 89 90 bl_params_node_t *bl_params = params_from_bl2->head; 91 92 /* 93 * Copy BL33 entry point information. 94 * They are stored in Secure RAM, in BL2's address space. 95 */ 96 while (bl_params != NULL) { 97 if (bl_params->image_id == BL33_IMAGE_ID) { 98 bl33_image_ep_info = *bl_params->ep_info; 99 break; 100 } 101 102 bl_params = bl_params->next_params_info; 103 } 104 105 if (dt_open_and_check() < 0) { 106 panic(); 107 } 108 109 if (stm32mp1_clk_probe() < 0) { 110 panic(); 111 } 112 113 result = dt_get_stdout_uart_info(&dt_dev_info); 114 115 if ((result > 0) && dt_dev_info.status) { 116 if (console_init(dt_dev_info.base, 0, STM32MP1_UART_BAUDRATE) 117 == 0) { 118 panic(); 119 } 120 } 121 } 122 123 /******************************************************************************* 124 * Initialize the MMU, security and the GIC. 125 ******************************************************************************/ 126 void sp_min_platform_setup(void) 127 { 128 mmap_add_region(BL_CODE_BASE, BL_CODE_BASE, 129 BL_CODE_END - BL_CODE_BASE, 130 MT_CODE | MT_SECURE); 131 132 configure_mmu(); 133 134 /* Initialize tzc400 after DDR initialization */ 135 stm32mp1_security_setup(); 136 137 generic_delay_timer_init(); 138 139 stm32mp1_gic_init(); 140 } 141 142 void sp_min_plat_arch_setup(void) 143 { 144 } 145