14353bb20SYann Gautier /* 2*3007c728SYann Gautier * Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved. 34353bb20SYann Gautier * 44353bb20SYann Gautier * SPDX-License-Identifier: BSD-3-Clause 54353bb20SYann Gautier */ 64353bb20SYann Gautier 7c3cf06f1SAntonio Nino Diaz #ifndef STM32MP1_PRIVATE_H 8c3cf06f1SAntonio Nino Diaz #define STM32MP1_PRIVATE_H 9c3cf06f1SAntonio Nino Diaz 10c3cf06f1SAntonio Nino Diaz #include <stdint.h> 114353bb20SYann Gautier 124353bb20SYann Gautier void configure_mmu(void); 134353bb20SYann Gautier 1410a511ceSYann Gautier void stm32mp1_arch_security_setup(void); 15964dfee1SYann Gautier void stm32mp1_security_setup(void); 1610a511ceSYann Gautier 17f33b2433SYann Gautier void stm32mp1_syscfg_init(void); 181f4513cbSYann Gautier void stm32mp1_syscfg_enable_io_compensation_start(void); 191f4513cbSYann Gautier void stm32mp1_syscfg_enable_io_compensation_finish(void); 20f33b2433SYann Gautier void stm32mp1_syscfg_disable_io_compensation(void); 216512c3a6SYann Gautier uint32_t stm32mp1_syscfg_get_chip_version(void); 226512c3a6SYann Gautier uint32_t stm32mp1_syscfg_get_chip_dev_id(void); 23296ac801SNicolas Toromanoff #if STM32MP13 24296ac801SNicolas Toromanoff void stm32mp1_syscfg_boot_mode_enable(void); 25296ac801SNicolas Toromanoff void stm32mp1_syscfg_boot_mode_disable(void); 26296ac801SNicolas Toromanoff #endif 27296ac801SNicolas Toromanoff #if STM32MP15 28296ac801SNicolas Toromanoff static inline void stm32mp1_syscfg_boot_mode_enable(void){} 29296ac801SNicolas Toromanoff static inline void stm32mp1_syscfg_boot_mode_disable(void){} 30296ac801SNicolas Toromanoff #endif 31f33b2433SYann Gautier 32d7176f03SYann Gautier void stm32mp1_deconfigure_uart_pins(void); 33d7176f03SYann Gautier 34fdaaaeb4SEtienne Carriere void stm32mp1_init_scmi_server(void); 35*3007c728SYann Gautier 36*3007c728SYann Gautier /* Wrappers for OTP / BSEC functions */ 37*3007c728SYann Gautier static inline uint32_t stm32_otp_read(uint32_t *val, uint32_t otp) 38*3007c728SYann Gautier { 39*3007c728SYann Gautier return bsec_read_otp(val, otp); 40*3007c728SYann Gautier } 41*3007c728SYann Gautier 42*3007c728SYann Gautier static inline uint32_t stm32_otp_shadow_read(uint32_t *val, uint32_t otp) 43*3007c728SYann Gautier { 44*3007c728SYann Gautier return bsec_shadow_read_otp(val, otp); 45*3007c728SYann Gautier } 46*3007c728SYann Gautier 47*3007c728SYann Gautier static inline uint32_t stm32_otp_write(uint32_t val, uint32_t otp) 48*3007c728SYann Gautier { 49*3007c728SYann Gautier return bsec_write_otp(val, otp); 50*3007c728SYann Gautier } 51*3007c728SYann Gautier 52*3007c728SYann Gautier static inline uint32_t stm32_otp_set_sr_lock(uint32_t otp) 53*3007c728SYann Gautier { 54*3007c728SYann Gautier return bsec_set_sr_lock(otp); 55*3007c728SYann Gautier } 56*3007c728SYann Gautier 57*3007c728SYann Gautier static inline uint32_t stm32_otp_read_sw_lock(uint32_t otp, bool *value) 58*3007c728SYann Gautier { 59*3007c728SYann Gautier return bsec_read_sw_lock(otp, value); 60*3007c728SYann Gautier } 61*3007c728SYann Gautier 62c3cf06f1SAntonio Nino Diaz #endif /* STM32MP1_PRIVATE_H */ 63