1 /* 2 * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <string.h> 9 10 #include <arch_helpers.h> 11 #include <common/debug.h> 12 #include <common/desc_image_load.h> 13 #include <drivers/fwu/fwu.h> 14 #include <drivers/fwu/fwu_metadata.h> 15 #include <drivers/io/io_block.h> 16 #include <drivers/io/io_driver.h> 17 #include <drivers/io/io_fip.h> 18 #include <drivers/io/io_memmap.h> 19 #include <drivers/io/io_mtd.h> 20 #include <drivers/io/io_storage.h> 21 #include <drivers/mmc.h> 22 #include <drivers/partition/efi.h> 23 #include <drivers/partition/partition.h> 24 #include <drivers/raw_nand.h> 25 #include <drivers/spi_nand.h> 26 #include <drivers/spi_nor.h> 27 #include <drivers/st/io_mmc.h> 28 #include <drivers/st/stm32_fmc2_nand.h> 29 #include <drivers/st/stm32_qspi.h> 30 #include <drivers/st/stm32_sdmmc2.h> 31 #include <drivers/usb_device.h> 32 #include <lib/fconf/fconf.h> 33 #include <lib/mmio.h> 34 #include <lib/utils.h> 35 #include <plat/common/platform.h> 36 #include <tools_share/firmware_image_package.h> 37 38 #include <platform_def.h> 39 #include <stm32cubeprogrammer.h> 40 #include <stm32mp_efi.h> 41 #include <stm32mp_fconf_getter.h> 42 #include <stm32mp_io_storage.h> 43 #include <usb_dfu.h> 44 45 /* IO devices */ 46 uintptr_t fip_dev_handle; 47 uintptr_t storage_dev_handle; 48 49 static const io_dev_connector_t *fip_dev_con; 50 51 #if STM32MP_SDMMC || STM32MP_EMMC 52 static struct mmc_device_info mmc_info; 53 54 static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE); 55 56 static io_block_dev_spec_t mmc_block_dev_spec = { 57 /* It's used as temp buffer in block driver */ 58 .buffer = { 59 .offset = (size_t)&block_buffer, 60 .length = MMC_BLOCK_SIZE, 61 }, 62 .ops = { 63 .read = mmc_read_blocks, 64 .write = NULL, 65 }, 66 .block_size = MMC_BLOCK_SIZE, 67 }; 68 69 static const io_dev_connector_t *mmc_dev_con; 70 #endif /* STM32MP_SDMMC || STM32MP_EMMC */ 71 72 #if STM32MP_SPI_NOR 73 static io_mtd_dev_spec_t spi_nor_dev_spec = { 74 .ops = { 75 .init = spi_nor_init, 76 .read = spi_nor_read, 77 }, 78 }; 79 #endif 80 81 #if STM32MP_RAW_NAND 82 static io_mtd_dev_spec_t nand_dev_spec = { 83 .ops = { 84 .init = nand_raw_init, 85 .read = nand_read, 86 .seek = nand_seek_bb 87 }, 88 }; 89 90 static const io_dev_connector_t *nand_dev_con; 91 #endif 92 93 #if STM32MP_SPI_NAND 94 static io_mtd_dev_spec_t spi_nand_dev_spec = { 95 .ops = { 96 .init = spi_nand_init, 97 .read = nand_read, 98 .seek = nand_seek_bb 99 }, 100 }; 101 #endif 102 103 #if STM32MP_SPI_NAND || STM32MP_SPI_NOR 104 static const io_dev_connector_t *spi_dev_con; 105 #endif 106 107 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 108 static const io_dev_connector_t *memmap_dev_con; 109 #endif 110 111 io_block_spec_t image_block_spec = { 112 .offset = 0U, 113 .length = 0U, 114 }; 115 116 int open_fip(const uintptr_t spec) 117 { 118 return io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID); 119 } 120 121 int open_storage(const uintptr_t spec) 122 { 123 return io_dev_init(storage_dev_handle, 0); 124 } 125 126 #if STM32MP_EMMC_BOOT 127 static uint32_t get_boot_part_fip_header(void) 128 { 129 io_block_spec_t emmc_boot_fip_block_spec = { 130 .offset = STM32MP_EMMC_BOOT_FIP_OFFSET, 131 .length = MMC_BLOCK_SIZE, /* We are interested only in first 4 bytes */ 132 }; 133 uint32_t magic = 0U; 134 int io_result; 135 size_t bytes_read; 136 uintptr_t fip_hdr_handle; 137 138 io_result = io_open(storage_dev_handle, (uintptr_t)&emmc_boot_fip_block_spec, 139 &fip_hdr_handle); 140 assert(io_result == 0); 141 142 io_result = io_read(fip_hdr_handle, (uintptr_t)&magic, sizeof(magic), 143 &bytes_read); 144 if ((io_result != 0) || (bytes_read != sizeof(magic))) { 145 panic(); 146 } 147 148 io_close(fip_hdr_handle); 149 150 VERBOSE("%s: eMMC boot magic at offset 256K: %08x\n", 151 __func__, magic); 152 153 return magic; 154 } 155 #endif 156 157 static void print_boot_device(boot_api_context_t *boot_context) 158 { 159 switch (boot_context->boot_interface_selected) { 160 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 161 INFO("Using SDMMC\n"); 162 break; 163 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 164 INFO("Using EMMC\n"); 165 break; 166 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 167 INFO("Using QSPI NOR\n"); 168 break; 169 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 170 INFO("Using FMC NAND\n"); 171 break; 172 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 173 INFO("Using SPI NAND\n"); 174 break; 175 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 176 INFO("Using UART\n"); 177 break; 178 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 179 INFO("Using USB\n"); 180 break; 181 default: 182 ERROR("Boot interface %u not found\n", 183 boot_context->boot_interface_selected); 184 panic(); 185 break; 186 } 187 188 if (boot_context->boot_interface_instance != 0U) { 189 INFO(" Instance %d\n", boot_context->boot_interface_instance); 190 } 191 } 192 193 #if STM32MP_SDMMC || STM32MP_EMMC 194 static void boot_mmc(enum mmc_device_type mmc_dev_type, 195 uint16_t boot_interface_instance) 196 { 197 int io_result __unused; 198 struct stm32_sdmmc2_params params; 199 200 zeromem(¶ms, sizeof(struct stm32_sdmmc2_params)); 201 202 mmc_info.mmc_dev_type = mmc_dev_type; 203 204 switch (boot_interface_instance) { 205 case 1: 206 params.reg_base = STM32MP_SDMMC1_BASE; 207 break; 208 case 2: 209 params.reg_base = STM32MP_SDMMC2_BASE; 210 break; 211 case 3: 212 params.reg_base = STM32MP_SDMMC3_BASE; 213 break; 214 default: 215 WARN("SDMMC instance not found, using default\n"); 216 if (mmc_dev_type == MMC_IS_SD) { 217 params.reg_base = STM32MP_SDMMC1_BASE; 218 } else { 219 params.reg_base = STM32MP_SDMMC2_BASE; 220 } 221 break; 222 } 223 224 if (mmc_dev_type != MMC_IS_EMMC) { 225 params.flags = MMC_FLAG_SD_CMD6; 226 } 227 228 params.device_info = &mmc_info; 229 if (stm32_sdmmc2_mmc_init(¶ms) != 0) { 230 ERROR("SDMMC%u init failed\n", boot_interface_instance); 231 panic(); 232 } 233 234 /* Open MMC as a block device to read FIP */ 235 io_result = register_io_dev_block(&mmc_dev_con); 236 if (io_result != 0) { 237 panic(); 238 } 239 240 io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec, 241 &storage_dev_handle); 242 assert(io_result == 0); 243 244 #if STM32MP_EMMC_BOOT 245 if (mmc_dev_type == MMC_IS_EMMC) { 246 io_result = mmc_part_switch_current_boot(); 247 assert(io_result == 0); 248 249 if (get_boot_part_fip_header() != TOC_HEADER_NAME) { 250 WARN("%s: Can't find FIP header on eMMC boot partition. Trying GPT\n", 251 __func__); 252 io_result = mmc_part_switch_user(); 253 assert(io_result == 0); 254 return; 255 } 256 257 VERBOSE("%s: FIP header found on eMMC boot partition\n", 258 __func__); 259 image_block_spec.offset = STM32MP_EMMC_BOOT_FIP_OFFSET; 260 } 261 #endif 262 } 263 #endif /* STM32MP_SDMMC || STM32MP_EMMC */ 264 265 #if STM32MP_SPI_NOR 266 static void boot_spi_nor(boot_api_context_t *boot_context) 267 { 268 int io_result __unused; 269 270 io_result = stm32_qspi_init(); 271 assert(io_result == 0); 272 273 io_result = register_io_dev_mtd(&spi_dev_con); 274 assert(io_result == 0); 275 276 /* Open connections to device */ 277 io_result = io_dev_open(spi_dev_con, 278 (uintptr_t)&spi_nor_dev_spec, 279 &storage_dev_handle); 280 assert(io_result == 0); 281 } 282 #endif /* STM32MP_SPI_NOR */ 283 284 #if STM32MP_RAW_NAND 285 static void boot_fmc2_nand(boot_api_context_t *boot_context) 286 { 287 int io_result __unused; 288 289 io_result = stm32_fmc2_init(); 290 assert(io_result == 0); 291 292 /* Register the IO device on this platform */ 293 io_result = register_io_dev_mtd(&nand_dev_con); 294 assert(io_result == 0); 295 296 /* Open connections to device */ 297 io_result = io_dev_open(nand_dev_con, (uintptr_t)&nand_dev_spec, 298 &storage_dev_handle); 299 assert(io_result == 0); 300 } 301 #endif /* STM32MP_RAW_NAND */ 302 303 #if STM32MP_SPI_NAND 304 static void boot_spi_nand(boot_api_context_t *boot_context) 305 { 306 int io_result __unused; 307 308 io_result = stm32_qspi_init(); 309 assert(io_result == 0); 310 311 io_result = register_io_dev_mtd(&spi_dev_con); 312 assert(io_result == 0); 313 314 /* Open connections to device */ 315 io_result = io_dev_open(spi_dev_con, 316 (uintptr_t)&spi_nand_dev_spec, 317 &storage_dev_handle); 318 assert(io_result == 0); 319 } 320 #endif /* STM32MP_SPI_NAND */ 321 322 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 323 static void mmap_io_setup(void) 324 { 325 int io_result __unused; 326 327 io_result = register_io_dev_memmap(&memmap_dev_con); 328 assert(io_result == 0); 329 330 io_result = io_dev_open(memmap_dev_con, (uintptr_t)NULL, 331 &storage_dev_handle); 332 assert(io_result == 0); 333 } 334 335 #if STM32MP_UART_PROGRAMMER 336 static void stm32cubeprogrammer_uart(void) 337 { 338 int ret __unused; 339 boot_api_context_t *boot_context = 340 (boot_api_context_t *)stm32mp_get_boot_ctx_address(); 341 uintptr_t uart_base; 342 343 uart_base = get_uart_address(boot_context->boot_interface_instance); 344 ret = stm32cubeprog_uart_load(uart_base, DWL_BUFFER_BASE, DWL_BUFFER_SIZE); 345 assert(ret == 0); 346 } 347 #endif 348 349 #if STM32MP_USB_PROGRAMMER 350 static void stm32cubeprogrammer_usb(void) 351 { 352 int ret __unused; 353 struct usb_handle *pdev; 354 355 /* Init USB on platform */ 356 pdev = usb_dfu_plat_init(); 357 358 ret = stm32cubeprog_usb_load(pdev, DWL_BUFFER_BASE, DWL_BUFFER_SIZE); 359 assert(ret == 0); 360 } 361 #endif 362 #endif /* STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER */ 363 364 365 void stm32mp_io_setup(void) 366 { 367 int io_result __unused; 368 boot_api_context_t *boot_context = 369 (boot_api_context_t *)stm32mp_get_boot_ctx_address(); 370 371 print_boot_device(boot_context); 372 373 if ((boot_context->boot_partition_used_toboot == 1U) || 374 (boot_context->boot_partition_used_toboot == 2U)) { 375 INFO("Boot used partition fsbl%u\n", 376 boot_context->boot_partition_used_toboot); 377 } 378 379 io_result = register_io_dev_fip(&fip_dev_con); 380 assert(io_result == 0); 381 382 io_result = io_dev_open(fip_dev_con, (uintptr_t)NULL, 383 &fip_dev_handle); 384 385 switch (boot_context->boot_interface_selected) { 386 #if STM32MP_SDMMC 387 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 388 dmbsy(); 389 boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance); 390 break; 391 #endif 392 #if STM32MP_EMMC 393 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 394 dmbsy(); 395 boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance); 396 break; 397 #endif 398 #if STM32MP_SPI_NOR 399 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 400 dmbsy(); 401 boot_spi_nor(boot_context); 402 break; 403 #endif 404 #if STM32MP_RAW_NAND 405 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 406 dmbsy(); 407 boot_fmc2_nand(boot_context); 408 break; 409 #endif 410 #if STM32MP_SPI_NAND 411 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 412 dmbsy(); 413 boot_spi_nand(boot_context); 414 break; 415 #endif 416 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 417 #if STM32MP_UART_PROGRAMMER 418 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 419 #endif 420 #if STM32MP_USB_PROGRAMMER 421 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 422 #endif 423 dmbsy(); 424 mmap_io_setup(); 425 break; 426 #endif 427 428 default: 429 ERROR("Boot interface %d not supported\n", 430 boot_context->boot_interface_selected); 431 panic(); 432 break; 433 } 434 } 435 436 int bl2_plat_handle_pre_image_load(unsigned int image_id) 437 { 438 static bool gpt_init_done __unused; 439 uint16_t boot_itf = stm32mp_get_boot_itf_selected(); 440 441 switch (boot_itf) { 442 #if STM32MP_SDMMC || STM32MP_EMMC 443 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 444 #if STM32MP_EMMC_BOOT 445 if (image_block_spec.offset == STM32MP_EMMC_BOOT_FIP_OFFSET) { 446 break; 447 } 448 #endif 449 /* fallthrough */ 450 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 451 if (!gpt_init_done) { 452 /* 453 * With FWU Multi Bank feature enabled, the selection of 454 * the image to boot will be done by fwu_init calling the 455 * platform hook, plat_fwu_set_images_source. 456 */ 457 #if !PSA_FWU_SUPPORT 458 const partition_entry_t *entry; 459 const struct efi_guid img_type_guid = STM32MP_FIP_GUID; 460 uuid_t img_type_uuid; 461 462 guidcpy(&img_type_uuid, &img_type_guid); 463 partition_init(GPT_IMAGE_ID); 464 entry = get_partition_entry_by_type(&img_type_uuid); 465 if (entry == NULL) { 466 entry = get_partition_entry(FIP_IMAGE_NAME); 467 if (entry == NULL) { 468 ERROR("Could NOT find the %s partition!\n", 469 FIP_IMAGE_NAME); 470 471 return -ENOENT; 472 } 473 } 474 475 image_block_spec.offset = entry->start; 476 image_block_spec.length = entry->length; 477 #endif 478 gpt_init_done = true; 479 } else { 480 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id); 481 assert(bl_mem_params != NULL); 482 483 mmc_block_dev_spec.buffer.offset = bl_mem_params->image_info.image_base; 484 mmc_block_dev_spec.buffer.length = bl_mem_params->image_info.image_max_size; 485 } 486 487 break; 488 #endif 489 490 #if STM32MP_RAW_NAND || STM32MP_SPI_NAND 491 #if STM32MP_RAW_NAND 492 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 493 #endif 494 #if STM32MP_SPI_NAND 495 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 496 #endif 497 image_block_spec.offset = STM32MP_NAND_FIP_OFFSET; 498 break; 499 #endif 500 501 #if STM32MP_SPI_NOR 502 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 503 image_block_spec.offset = STM32MP_NOR_FIP_OFFSET; 504 break; 505 #endif 506 507 #if STM32MP_UART_PROGRAMMER 508 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 509 if (image_id == FW_CONFIG_ID) { 510 stm32cubeprogrammer_uart(); 511 /* FIP loaded at DWL address */ 512 image_block_spec.offset = DWL_BUFFER_BASE; 513 image_block_spec.length = DWL_BUFFER_SIZE; 514 } 515 break; 516 #endif 517 #if STM32MP_USB_PROGRAMMER 518 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 519 if (image_id == FW_CONFIG_ID) { 520 stm32cubeprogrammer_usb(); 521 /* FIP loaded at DWL address */ 522 image_block_spec.offset = DWL_BUFFER_BASE; 523 image_block_spec.length = DWL_BUFFER_SIZE; 524 } 525 break; 526 #endif 527 528 default: 529 ERROR("FIP Not found\n"); 530 panic(); 531 } 532 533 return 0; 534 } 535 536 /* 537 * Return an IO device handle and specification which can be used to access 538 * an image. Use this to enforce platform load policy. 539 */ 540 int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle, 541 uintptr_t *image_spec) 542 { 543 int rc; 544 const struct plat_io_policy *policy; 545 546 policy = FCONF_GET_PROPERTY(stm32mp, io_policies, image_id); 547 rc = policy->check(policy->image_spec); 548 if (rc == 0) { 549 *image_spec = policy->image_spec; 550 *dev_handle = *(policy->dev_handle); 551 } 552 553 return rc; 554 } 555 556 #if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT 557 /* 558 * In each boot in non-trial mode, we set the BKP register to 559 * FWU_MAX_TRIAL_REBOOT, and return the active_index from metadata. 560 * 561 * As long as the update agent didn't update the "accepted" field in metadata 562 * (i.e. we are in trial mode), we select the new active_index. 563 * To avoid infinite boot loop at trial boot we decrement a BKP register. 564 * If this counter is 0: 565 * - an unexpected TAMPER event raised (that resets the BKP registers to 0) 566 * - a power-off occurs before the update agent was able to update the 567 * "accepted' field 568 * - we already boot FWU_MAX_TRIAL_REBOOT times in trial mode. 569 * we select the previous_active_index. 570 */ 571 #define INVALID_BOOT_IDX 0xFFFFFFFF 572 573 uint32_t plat_fwu_get_boot_idx(void) 574 { 575 /* 576 * Select boot index and update boot counter only once per boot 577 * even if this function is called several times. 578 */ 579 static uint32_t boot_idx = INVALID_BOOT_IDX; 580 const struct fwu_metadata *data; 581 582 data = fwu_get_metadata(); 583 584 if (boot_idx == INVALID_BOOT_IDX) { 585 boot_idx = data->active_index; 586 if (fwu_is_trial_run_state()) { 587 if (stm32_get_and_dec_fwu_trial_boot_cnt() == 0U) { 588 WARN("Trial FWU fails %u times\n", 589 FWU_MAX_TRIAL_REBOOT); 590 boot_idx = data->previous_active_index; 591 } 592 } else { 593 stm32_set_max_fwu_trial_boot_cnt(); 594 } 595 } 596 597 return boot_idx; 598 } 599 600 static void *stm32_get_image_spec(const uuid_t *img_type_uuid) 601 { 602 unsigned int i; 603 604 for (i = 0U; i < MAX_NUMBER_IDS; i++) { 605 if ((guidcmp(&policies[i].img_type_guid, img_type_uuid)) == 0) { 606 return (void *)policies[i].image_spec; 607 } 608 } 609 610 return NULL; 611 } 612 613 void plat_fwu_set_images_source(const struct fwu_metadata *metadata) 614 { 615 unsigned int i; 616 uint32_t boot_idx; 617 const partition_entry_t *entry; 618 const uuid_t *img_type_uuid, *img_uuid; 619 io_block_spec_t *image_spec; 620 621 boot_idx = plat_fwu_get_boot_idx(); 622 assert(boot_idx < NR_OF_FW_BANKS); 623 624 for (i = 0U; i < NR_OF_IMAGES_IN_FW_BANK; i++) { 625 img_type_uuid = &metadata->img_entry[i].img_type_uuid; 626 image_spec = stm32_get_image_spec(img_type_uuid); 627 if (image_spec == NULL) { 628 ERROR("Unable to get image spec for the image in the metadata\n"); 629 panic(); 630 } 631 632 img_uuid = 633 &metadata->img_entry[i].img_props[boot_idx].img_uuid; 634 635 entry = get_partition_entry_by_uuid(img_uuid); 636 if (entry == NULL) { 637 ERROR("Unable to find the partition with the uuid mentioned in metadata\n"); 638 panic(); 639 } 640 641 image_spec->offset = entry->start; 642 image_spec->length = entry->length; 643 } 644 } 645 646 static int plat_set_image_source(unsigned int image_id, 647 uintptr_t *handle, 648 uintptr_t *image_spec, 649 const char *part_name) 650 { 651 struct plat_io_policy *policy; 652 io_block_spec_t *spec; 653 const partition_entry_t *entry = get_partition_entry(part_name); 654 655 if (entry == NULL) { 656 ERROR("Unable to find the %s partition\n", part_name); 657 return -ENOENT; 658 } 659 660 policy = &policies[image_id]; 661 662 spec = (io_block_spec_t *)policy->image_spec; 663 spec->offset = entry->start; 664 spec->length = entry->length; 665 666 *image_spec = policy->image_spec; 667 *handle = *policy->dev_handle; 668 669 return 0; 670 } 671 672 int plat_fwu_set_metadata_image_source(unsigned int image_id, 673 uintptr_t *handle, 674 uintptr_t *image_spec) 675 { 676 char *part_name; 677 678 assert((image_id == FWU_METADATA_IMAGE_ID) || 679 (image_id == BKUP_FWU_METADATA_IMAGE_ID)); 680 681 partition_init(GPT_IMAGE_ID); 682 683 if (image_id == FWU_METADATA_IMAGE_ID) { 684 part_name = METADATA_PART_1; 685 } else { 686 part_name = METADATA_PART_2; 687 } 688 689 return plat_set_image_source(image_id, handle, image_spec, 690 part_name); 691 } 692 #endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */ 693