1 /* 2 * Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <string.h> 9 10 #include <arch_helpers.h> 11 #include <common/debug.h> 12 #include <common/desc_image_load.h> 13 #include <drivers/fwu/fwu.h> 14 #include <drivers/fwu/fwu_metadata.h> 15 #include <drivers/io/io_block.h> 16 #include <drivers/io/io_driver.h> 17 #include <drivers/io/io_fip.h> 18 #include <drivers/io/io_memmap.h> 19 #include <drivers/io/io_mtd.h> 20 #include <drivers/io/io_storage.h> 21 #include <drivers/mmc.h> 22 #include <drivers/partition/efi.h> 23 #include <drivers/partition/partition.h> 24 #include <drivers/raw_nand.h> 25 #include <drivers/spi_nand.h> 26 #include <drivers/spi_nor.h> 27 #include <drivers/st/io_mmc.h> 28 #include <drivers/st/stm32_fmc2_nand.h> 29 #include <drivers/st/stm32_qspi.h> 30 #include <drivers/st/stm32_sdmmc2.h> 31 #include <drivers/usb_device.h> 32 #include <lib/fconf/fconf.h> 33 #include <lib/mmio.h> 34 #include <lib/utils.h> 35 #include <plat/common/platform.h> 36 #include <tools_share/firmware_image_package.h> 37 38 #include <platform_def.h> 39 #include <stm32cubeprogrammer.h> 40 #include <stm32mp_fconf_getter.h> 41 #include <usb_dfu.h> 42 43 /* IO devices */ 44 uintptr_t fip_dev_handle; 45 uintptr_t storage_dev_handle; 46 47 static const io_dev_connector_t *fip_dev_con; 48 49 #if STM32MP_SDMMC || STM32MP_EMMC 50 static struct mmc_device_info mmc_info; 51 52 static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE); 53 54 static io_block_dev_spec_t mmc_block_dev_spec = { 55 /* It's used as temp buffer in block driver */ 56 .buffer = { 57 .offset = (size_t)&block_buffer, 58 .length = MMC_BLOCK_SIZE, 59 }, 60 .ops = { 61 .read = mmc_read_blocks, 62 .write = NULL, 63 }, 64 .block_size = MMC_BLOCK_SIZE, 65 }; 66 67 static const io_dev_connector_t *mmc_dev_con; 68 #endif /* STM32MP_SDMMC || STM32MP_EMMC */ 69 70 #if STM32MP_SPI_NOR 71 static io_mtd_dev_spec_t spi_nor_dev_spec = { 72 .ops = { 73 .init = spi_nor_init, 74 .read = spi_nor_read, 75 }, 76 }; 77 #endif 78 79 #if STM32MP_RAW_NAND 80 static io_mtd_dev_spec_t nand_dev_spec = { 81 .ops = { 82 .init = nand_raw_init, 83 .read = nand_read, 84 .seek = nand_seek_bb 85 }, 86 }; 87 88 static const io_dev_connector_t *nand_dev_con; 89 #endif 90 91 #if STM32MP_SPI_NAND 92 static io_mtd_dev_spec_t spi_nand_dev_spec = { 93 .ops = { 94 .init = spi_nand_init, 95 .read = nand_read, 96 .seek = nand_seek_bb 97 }, 98 }; 99 #endif 100 101 #if STM32MP_SPI_NAND || STM32MP_SPI_NOR 102 static const io_dev_connector_t *spi_dev_con; 103 #endif 104 105 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 106 static const io_dev_connector_t *memmap_dev_con; 107 #endif 108 109 io_block_spec_t image_block_spec = { 110 .offset = 0U, 111 .length = 0U, 112 }; 113 114 int open_fip(const uintptr_t spec) 115 { 116 return io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID); 117 } 118 119 int open_storage(const uintptr_t spec) 120 { 121 return io_dev_init(storage_dev_handle, 0); 122 } 123 124 static void print_boot_device(boot_api_context_t *boot_context) 125 { 126 switch (boot_context->boot_interface_selected) { 127 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 128 INFO("Using SDMMC\n"); 129 break; 130 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 131 INFO("Using EMMC\n"); 132 break; 133 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 134 INFO("Using QSPI NOR\n"); 135 break; 136 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 137 INFO("Using FMC NAND\n"); 138 break; 139 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 140 INFO("Using SPI NAND\n"); 141 break; 142 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 143 INFO("Using UART\n"); 144 break; 145 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 146 INFO("Using USB\n"); 147 break; 148 default: 149 ERROR("Boot interface %u not found\n", 150 boot_context->boot_interface_selected); 151 panic(); 152 break; 153 } 154 155 if (boot_context->boot_interface_instance != 0U) { 156 INFO(" Instance %d\n", boot_context->boot_interface_instance); 157 } 158 } 159 160 #if STM32MP_SDMMC || STM32MP_EMMC 161 static void boot_mmc(enum mmc_device_type mmc_dev_type, 162 uint16_t boot_interface_instance) 163 { 164 int io_result __unused; 165 struct stm32_sdmmc2_params params; 166 167 zeromem(¶ms, sizeof(struct stm32_sdmmc2_params)); 168 169 mmc_info.mmc_dev_type = mmc_dev_type; 170 171 switch (boot_interface_instance) { 172 case 1: 173 params.reg_base = STM32MP_SDMMC1_BASE; 174 break; 175 case 2: 176 params.reg_base = STM32MP_SDMMC2_BASE; 177 break; 178 case 3: 179 params.reg_base = STM32MP_SDMMC3_BASE; 180 break; 181 default: 182 WARN("SDMMC instance not found, using default\n"); 183 if (mmc_dev_type == MMC_IS_SD) { 184 params.reg_base = STM32MP_SDMMC1_BASE; 185 } else { 186 params.reg_base = STM32MP_SDMMC2_BASE; 187 } 188 break; 189 } 190 191 params.device_info = &mmc_info; 192 if (stm32_sdmmc2_mmc_init(¶ms) != 0) { 193 ERROR("SDMMC%u init failed\n", boot_interface_instance); 194 panic(); 195 } 196 197 /* Open MMC as a block device to read GPT table */ 198 io_result = register_io_dev_block(&mmc_dev_con); 199 if (io_result != 0) { 200 panic(); 201 } 202 203 io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec, 204 &storage_dev_handle); 205 assert(io_result == 0); 206 } 207 #endif /* STM32MP_SDMMC || STM32MP_EMMC */ 208 209 #if STM32MP_SPI_NOR 210 static void boot_spi_nor(boot_api_context_t *boot_context) 211 { 212 int io_result __unused; 213 214 io_result = stm32_qspi_init(); 215 assert(io_result == 0); 216 217 io_result = register_io_dev_mtd(&spi_dev_con); 218 assert(io_result == 0); 219 220 /* Open connections to device */ 221 io_result = io_dev_open(spi_dev_con, 222 (uintptr_t)&spi_nor_dev_spec, 223 &storage_dev_handle); 224 assert(io_result == 0); 225 } 226 #endif /* STM32MP_SPI_NOR */ 227 228 #if STM32MP_RAW_NAND 229 static void boot_fmc2_nand(boot_api_context_t *boot_context) 230 { 231 int io_result __unused; 232 233 io_result = stm32_fmc2_init(); 234 assert(io_result == 0); 235 236 /* Register the IO device on this platform */ 237 io_result = register_io_dev_mtd(&nand_dev_con); 238 assert(io_result == 0); 239 240 /* Open connections to device */ 241 io_result = io_dev_open(nand_dev_con, (uintptr_t)&nand_dev_spec, 242 &storage_dev_handle); 243 assert(io_result == 0); 244 } 245 #endif /* STM32MP_RAW_NAND */ 246 247 #if STM32MP_SPI_NAND 248 static void boot_spi_nand(boot_api_context_t *boot_context) 249 { 250 int io_result __unused; 251 252 io_result = stm32_qspi_init(); 253 assert(io_result == 0); 254 255 io_result = register_io_dev_mtd(&spi_dev_con); 256 assert(io_result == 0); 257 258 /* Open connections to device */ 259 io_result = io_dev_open(spi_dev_con, 260 (uintptr_t)&spi_nand_dev_spec, 261 &storage_dev_handle); 262 assert(io_result == 0); 263 } 264 #endif /* STM32MP_SPI_NAND */ 265 266 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 267 static void mmap_io_setup(void) 268 { 269 int io_result __unused; 270 271 io_result = register_io_dev_memmap(&memmap_dev_con); 272 assert(io_result == 0); 273 274 io_result = io_dev_open(memmap_dev_con, (uintptr_t)NULL, 275 &storage_dev_handle); 276 assert(io_result == 0); 277 } 278 279 #if STM32MP_UART_PROGRAMMER 280 static void stm32cubeprogrammer_uart(void) 281 { 282 int ret __unused; 283 boot_api_context_t *boot_context = 284 (boot_api_context_t *)stm32mp_get_boot_ctx_address(); 285 uintptr_t uart_base; 286 287 uart_base = get_uart_address(boot_context->boot_interface_instance); 288 ret = stm32cubeprog_uart_load(uart_base, DWL_BUFFER_BASE, DWL_BUFFER_SIZE); 289 assert(ret == 0); 290 } 291 #endif 292 293 #if STM32MP_USB_PROGRAMMER 294 static void stm32cubeprogrammer_usb(void) 295 { 296 int ret __unused; 297 struct usb_handle *pdev; 298 299 /* Init USB on platform */ 300 pdev = usb_dfu_plat_init(); 301 302 ret = stm32cubeprog_usb_load(pdev, DWL_BUFFER_BASE, DWL_BUFFER_SIZE); 303 assert(ret == 0); 304 } 305 #endif 306 #endif /* STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER */ 307 308 309 void stm32mp_io_setup(void) 310 { 311 int io_result __unused; 312 boot_api_context_t *boot_context = 313 (boot_api_context_t *)stm32mp_get_boot_ctx_address(); 314 315 print_boot_device(boot_context); 316 317 if ((boot_context->boot_partition_used_toboot == 1U) || 318 (boot_context->boot_partition_used_toboot == 2U)) { 319 INFO("Boot used partition fsbl%u\n", 320 boot_context->boot_partition_used_toboot); 321 } 322 323 io_result = register_io_dev_fip(&fip_dev_con); 324 assert(io_result == 0); 325 326 io_result = io_dev_open(fip_dev_con, (uintptr_t)NULL, 327 &fip_dev_handle); 328 329 switch (boot_context->boot_interface_selected) { 330 #if STM32MP_SDMMC 331 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 332 dmbsy(); 333 boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance); 334 break; 335 #endif 336 #if STM32MP_EMMC 337 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 338 dmbsy(); 339 boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance); 340 break; 341 #endif 342 #if STM32MP_SPI_NOR 343 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 344 dmbsy(); 345 boot_spi_nor(boot_context); 346 break; 347 #endif 348 #if STM32MP_RAW_NAND 349 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 350 dmbsy(); 351 boot_fmc2_nand(boot_context); 352 break; 353 #endif 354 #if STM32MP_SPI_NAND 355 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 356 dmbsy(); 357 boot_spi_nand(boot_context); 358 break; 359 #endif 360 #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER 361 #if STM32MP_UART_PROGRAMMER 362 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 363 #endif 364 #if STM32MP_USB_PROGRAMMER 365 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 366 #endif 367 dmbsy(); 368 mmap_io_setup(); 369 break; 370 #endif 371 372 default: 373 ERROR("Boot interface %d not supported\n", 374 boot_context->boot_interface_selected); 375 panic(); 376 break; 377 } 378 } 379 380 int bl2_plat_handle_pre_image_load(unsigned int image_id) 381 { 382 static bool gpt_init_done __unused; 383 uint16_t boot_itf = stm32mp_get_boot_itf_selected(); 384 385 switch (boot_itf) { 386 #if STM32MP_SDMMC || STM32MP_EMMC 387 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: 388 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: 389 if (!gpt_init_done) { 390 /* 391 * With FWU Multi Bank feature enabled, the selection of 392 * the image to boot will be done by fwu_init calling the 393 * platform hook, plat_fwu_set_images_source. 394 */ 395 #if !PSA_FWU_SUPPORT 396 const partition_entry_t *entry; 397 398 partition_init(GPT_IMAGE_ID); 399 entry = get_partition_entry(FIP_IMAGE_NAME); 400 if (entry == NULL) { 401 ERROR("Could NOT find the %s partition!\n", 402 FIP_IMAGE_NAME); 403 return -ENOENT; 404 } 405 406 image_block_spec.offset = entry->start; 407 image_block_spec.length = entry->length; 408 #endif 409 gpt_init_done = true; 410 } else { 411 bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id); 412 assert(bl_mem_params != NULL); 413 414 mmc_block_dev_spec.buffer.offset = bl_mem_params->image_info.image_base; 415 mmc_block_dev_spec.buffer.length = bl_mem_params->image_info.image_max_size; 416 } 417 418 break; 419 #endif 420 421 #if STM32MP_RAW_NAND || STM32MP_SPI_NAND 422 #if STM32MP_RAW_NAND 423 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC: 424 #endif 425 #if STM32MP_SPI_NAND 426 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI: 427 #endif 428 image_block_spec.offset = STM32MP_NAND_FIP_OFFSET; 429 break; 430 #endif 431 432 #if STM32MP_SPI_NOR 433 case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI: 434 image_block_spec.offset = STM32MP_NOR_FIP_OFFSET; 435 break; 436 #endif 437 438 #if STM32MP_UART_PROGRAMMER 439 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART: 440 if (image_id == FW_CONFIG_ID) { 441 stm32cubeprogrammer_uart(); 442 /* FIP loaded at DWL address */ 443 image_block_spec.offset = DWL_BUFFER_BASE; 444 image_block_spec.length = DWL_BUFFER_SIZE; 445 } 446 break; 447 #endif 448 #if STM32MP_USB_PROGRAMMER 449 case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB: 450 if (image_id == FW_CONFIG_ID) { 451 stm32cubeprogrammer_usb(); 452 /* FIP loaded at DWL address */ 453 image_block_spec.offset = DWL_BUFFER_BASE; 454 image_block_spec.length = DWL_BUFFER_SIZE; 455 } 456 break; 457 #endif 458 459 default: 460 ERROR("FIP Not found\n"); 461 panic(); 462 } 463 464 return 0; 465 } 466 467 /* 468 * Return an IO device handle and specification which can be used to access 469 * an image. Use this to enforce platform load policy. 470 */ 471 int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle, 472 uintptr_t *image_spec) 473 { 474 int rc; 475 const struct plat_io_policy *policy; 476 477 policy = FCONF_GET_PROPERTY(stm32mp, io_policies, image_id); 478 rc = policy->check(policy->image_spec); 479 if (rc == 0) { 480 *image_spec = policy->image_spec; 481 *dev_handle = *(policy->dev_handle); 482 } 483 484 return rc; 485 } 486 487 #if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT 488 /* 489 * In each boot in non-trial mode, we set the BKP register to 490 * FWU_MAX_TRIAL_REBOOT, and return the active_index from metadata. 491 * 492 * As long as the update agent didn't update the "accepted" field in metadata 493 * (i.e. we are in trial mode), we select the new active_index. 494 * To avoid infinite boot loop at trial boot we decrement a BKP register. 495 * If this counter is 0: 496 * - an unexpected TAMPER event raised (that resets the BKP registers to 0) 497 * - a power-off occurs before the update agent was able to update the 498 * "accepted' field 499 * - we already boot FWU_MAX_TRIAL_REBOOT times in trial mode. 500 * we select the previous_active_index. 501 */ 502 #define INVALID_BOOT_IDX 0xFFFFFFFF 503 504 uint32_t plat_fwu_get_boot_idx(void) 505 { 506 /* 507 * Select boot index and update boot counter only once per boot 508 * even if this function is called several times. 509 */ 510 static uint32_t boot_idx = INVALID_BOOT_IDX; 511 const struct fwu_metadata *data; 512 513 data = fwu_get_metadata(); 514 515 if (boot_idx == INVALID_BOOT_IDX) { 516 boot_idx = data->active_index; 517 if (fwu_is_trial_run_state()) { 518 if (stm32_get_and_dec_fwu_trial_boot_cnt() == 0U) { 519 WARN("Trial FWU fails %u times\n", 520 FWU_MAX_TRIAL_REBOOT); 521 boot_idx = data->previous_active_index; 522 } 523 } else { 524 stm32_set_max_fwu_trial_boot_cnt(); 525 } 526 } 527 528 return boot_idx; 529 } 530 531 static void *stm32_get_image_spec(const uuid_t *img_type_uuid) 532 { 533 unsigned int i; 534 535 for (i = 0U; i < MAX_NUMBER_IDS; i++) { 536 if ((guidcmp(&policies[i].img_type_guid, img_type_uuid)) == 0) { 537 return (void *)policies[i].image_spec; 538 } 539 } 540 541 return NULL; 542 } 543 544 void plat_fwu_set_images_source(const struct fwu_metadata *metadata) 545 { 546 unsigned int i; 547 uint32_t boot_idx; 548 const partition_entry_t *entry; 549 const uuid_t *img_type_uuid, *img_uuid; 550 io_block_spec_t *image_spec; 551 552 boot_idx = plat_fwu_get_boot_idx(); 553 assert(boot_idx < NR_OF_FW_BANKS); 554 555 for (i = 0U; i < NR_OF_IMAGES_IN_FW_BANK; i++) { 556 img_type_uuid = &metadata->img_entry[i].img_type_uuid; 557 image_spec = stm32_get_image_spec(img_type_uuid); 558 if (image_spec == NULL) { 559 ERROR("Unable to get image spec for the image in the metadata\n"); 560 panic(); 561 } 562 563 img_uuid = 564 &metadata->img_entry[i].img_props[boot_idx].img_uuid; 565 566 entry = get_partition_entry_by_uuid(img_uuid); 567 if (entry == NULL) { 568 ERROR("Unable to find the partition with the uuid mentioned in metadata\n"); 569 panic(); 570 } 571 572 image_spec->offset = entry->start; 573 image_spec->length = entry->length; 574 } 575 } 576 577 static int plat_set_image_source(unsigned int image_id, 578 uintptr_t *handle, 579 uintptr_t *image_spec, 580 const char *part_name) 581 { 582 struct plat_io_policy *policy; 583 io_block_spec_t *spec; 584 const partition_entry_t *entry = get_partition_entry(part_name); 585 586 if (entry == NULL) { 587 ERROR("Unable to find the %s partition\n", part_name); 588 return -ENOENT; 589 } 590 591 policy = &policies[image_id]; 592 593 spec = (io_block_spec_t *)policy->image_spec; 594 spec->offset = entry->start; 595 spec->length = entry->length; 596 597 *image_spec = policy->image_spec; 598 *handle = *policy->dev_handle; 599 600 return 0; 601 } 602 603 int plat_fwu_set_metadata_image_source(unsigned int image_id, 604 uintptr_t *handle, 605 uintptr_t *image_spec) 606 { 607 char *part_name; 608 609 assert((image_id == FWU_METADATA_IMAGE_ID) || 610 (image_id == BKUP_FWU_METADATA_IMAGE_ID)); 611 612 partition_init(GPT_IMAGE_ID); 613 614 if (image_id == FWU_METADATA_IMAGE_ID) { 615 part_name = METADATA_PART_1; 616 } else { 617 part_name = METADATA_PART_2; 618 } 619 620 return plat_set_image_source(image_id, handle, image_spec, 621 part_name); 622 } 623 #endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */ 624