xref: /rk3399_ARM-atf/plat/st/common/bl2_io_storage.c (revision 0581a8877845d472f9bf6a2171e79050b8363fa7)
1 /*
2  * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  */
6 
7 #include <assert.h>
8 #include <string.h>
9 
10 #include <platform_def.h>
11 
12 #include <arch_helpers.h>
13 #include <common/debug.h>
14 #include <drivers/io/io_block.h>
15 #include <drivers/io/io_driver.h>
16 #include <drivers/io/io_dummy.h>
17 #include <drivers/io/io_mtd.h>
18 #include <drivers/io/io_storage.h>
19 #include <drivers/mmc.h>
20 #include <drivers/partition/partition.h>
21 #include <drivers/raw_nand.h>
22 #include <drivers/st/io_mmc.h>
23 #include <drivers/st/io_stm32image.h>
24 #include <drivers/st/stm32_fmc2_nand.h>
25 #include <drivers/st/stm32_sdmmc2.h>
26 #include <lib/mmio.h>
27 #include <lib/utils.h>
28 #include <plat/common/platform.h>
29 
30 /* IO devices */
31 static const io_dev_connector_t *dummy_dev_con;
32 static uintptr_t dummy_dev_handle;
33 static uintptr_t dummy_dev_spec;
34 
35 static uintptr_t image_dev_handle;
36 static uintptr_t storage_dev_handle;
37 
38 #if STM32MP_SDMMC || STM32MP_EMMC
39 static io_block_spec_t gpt_block_spec = {
40 	.offset = 0,
41 	.length = 34 * MMC_BLOCK_SIZE, /* Size of GPT table */
42 };
43 
44 static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE);
45 
46 static const io_block_dev_spec_t mmc_block_dev_spec = {
47 	/* It's used as temp buffer in block driver */
48 	.buffer = {
49 		.offset = (size_t)&block_buffer,
50 		.length = MMC_BLOCK_SIZE,
51 	},
52 	.ops = {
53 		.read = mmc_read_blocks,
54 		.write = NULL,
55 	},
56 	.block_size = MMC_BLOCK_SIZE,
57 };
58 
59 static const io_dev_connector_t *mmc_dev_con;
60 #endif /* STM32MP_SDMMC || STM32MP_EMMC */
61 
62 #if STM32MP_RAW_NAND
63 static io_mtd_dev_spec_t nand_dev_spec = {
64 	.ops = {
65 		.init = nand_raw_init,
66 		.read = nand_read,
67 	},
68 };
69 
70 static const io_dev_connector_t *nand_dev_con;
71 #endif
72 
73 #ifdef AARCH32_SP_OPTEE
74 static const struct stm32image_part_info optee_header_partition_spec = {
75 	.name = OPTEE_HEADER_IMAGE_NAME,
76 	.binary_type = OPTEE_HEADER_BINARY_TYPE,
77 };
78 
79 static const struct stm32image_part_info optee_pager_partition_spec = {
80 	.name = OPTEE_PAGER_IMAGE_NAME,
81 	.binary_type = OPTEE_PAGER_BINARY_TYPE,
82 };
83 
84 static const struct stm32image_part_info optee_paged_partition_spec = {
85 	.name = OPTEE_PAGED_IMAGE_NAME,
86 	.binary_type = OPTEE_PAGED_BINARY_TYPE,
87 };
88 #else
89 static const io_block_spec_t bl32_block_spec = {
90 	.offset = BL32_BASE,
91 	.length = STM32MP_BL32_SIZE
92 };
93 #endif
94 
95 static const io_block_spec_t bl2_block_spec = {
96 	.offset = BL2_BASE,
97 	.length = STM32MP_BL2_SIZE,
98 };
99 
100 static const struct stm32image_part_info bl33_partition_spec = {
101 	.name = BL33_IMAGE_NAME,
102 	.binary_type = BL33_BINARY_TYPE,
103 };
104 
105 enum {
106 	IMG_IDX_BL33,
107 #ifdef AARCH32_SP_OPTEE
108 	IMG_IDX_OPTEE_HEADER,
109 	IMG_IDX_OPTEE_PAGER,
110 	IMG_IDX_OPTEE_PAGED,
111 #endif
112 	IMG_IDX_NUM
113 };
114 
115 static struct stm32image_device_info stm32image_dev_info_spec __unused = {
116 	.lba_size = MMC_BLOCK_SIZE,
117 	.part_info[IMG_IDX_BL33] = {
118 		.name = BL33_IMAGE_NAME,
119 		.binary_type = BL33_BINARY_TYPE,
120 	},
121 #ifdef AARCH32_SP_OPTEE
122 	.part_info[IMG_IDX_OPTEE_HEADER] = {
123 		.name = OPTEE_HEADER_IMAGE_NAME,
124 		.binary_type = OPTEE_HEADER_BINARY_TYPE,
125 	},
126 	.part_info[IMG_IDX_OPTEE_PAGER] = {
127 		.name = OPTEE_PAGER_IMAGE_NAME,
128 		.binary_type = OPTEE_PAGER_BINARY_TYPE,
129 	},
130 	.part_info[IMG_IDX_OPTEE_PAGED] = {
131 		.name = OPTEE_PAGED_IMAGE_NAME,
132 		.binary_type = OPTEE_PAGED_BINARY_TYPE,
133 	},
134 #endif
135 };
136 
137 static io_block_spec_t stm32image_block_spec = {
138 	.offset = 0,
139 	.length = 0,
140 };
141 
142 static const io_dev_connector_t *stm32image_dev_con __unused;
143 
144 static int open_dummy(const uintptr_t spec);
145 static int open_image(const uintptr_t spec);
146 static int open_storage(const uintptr_t spec);
147 
148 struct plat_io_policy {
149 	uintptr_t *dev_handle;
150 	uintptr_t image_spec;
151 	int (*check)(const uintptr_t spec);
152 };
153 
154 static const struct plat_io_policy policies[] = {
155 	[BL2_IMAGE_ID] = {
156 		.dev_handle = &dummy_dev_handle,
157 		.image_spec = (uintptr_t)&bl2_block_spec,
158 		.check = open_dummy
159 	},
160 #ifdef AARCH32_SP_OPTEE
161 	[BL32_IMAGE_ID] = {
162 		.dev_handle = &image_dev_handle,
163 		.image_spec = (uintptr_t)&optee_header_partition_spec,
164 		.check = open_image
165 	},
166 	[BL32_EXTRA1_IMAGE_ID] = {
167 		.dev_handle = &image_dev_handle,
168 		.image_spec = (uintptr_t)&optee_pager_partition_spec,
169 		.check = open_image
170 	},
171 	[BL32_EXTRA2_IMAGE_ID] = {
172 		.dev_handle = &image_dev_handle,
173 		.image_spec = (uintptr_t)&optee_paged_partition_spec,
174 		.check = open_image
175 	},
176 #else
177 	[BL32_IMAGE_ID] = {
178 		.dev_handle = &dummy_dev_handle,
179 		.image_spec = (uintptr_t)&bl32_block_spec,
180 		.check = open_dummy
181 	},
182 #endif
183 	[BL33_IMAGE_ID] = {
184 		.dev_handle = &image_dev_handle,
185 		.image_spec = (uintptr_t)&bl33_partition_spec,
186 		.check = open_image
187 	},
188 #if STM32MP_SDMMC || STM32MP_EMMC
189 	[GPT_IMAGE_ID] = {
190 		.dev_handle = &storage_dev_handle,
191 		.image_spec = (uintptr_t)&gpt_block_spec,
192 		.check = open_storage
193 	},
194 #endif
195 	[STM32_IMAGE_ID] = {
196 		.dev_handle = &storage_dev_handle,
197 		.image_spec = (uintptr_t)&stm32image_block_spec,
198 		.check = open_storage
199 	}
200 };
201 
202 static int open_dummy(const uintptr_t spec)
203 {
204 	return io_dev_init(dummy_dev_handle, 0);
205 }
206 
207 static int open_image(const uintptr_t spec)
208 {
209 	return io_dev_init(image_dev_handle, 0);
210 }
211 
212 static int open_storage(const uintptr_t spec)
213 {
214 	return io_dev_init(storage_dev_handle, 0);
215 }
216 
217 static void print_boot_device(boot_api_context_t *boot_context)
218 {
219 	switch (boot_context->boot_interface_selected) {
220 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
221 		INFO("Using SDMMC\n");
222 		break;
223 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
224 		INFO("Using EMMC\n");
225 		break;
226 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
227 		INFO("Using FMC NAND\n");
228 		break;
229 	default:
230 		ERROR("Boot interface not found\n");
231 		panic();
232 		break;
233 	}
234 
235 	if (boot_context->boot_interface_instance != 0U) {
236 		INFO("  Instance %d\n", boot_context->boot_interface_instance);
237 	}
238 }
239 
240 #if STM32MP_SDMMC || STM32MP_EMMC
241 static void boot_mmc(enum mmc_device_type mmc_dev_type,
242 		     uint16_t boot_interface_instance)
243 {
244 	int io_result __unused;
245 	uint8_t idx;
246 	struct stm32image_part_info *part;
247 	struct stm32_sdmmc2_params params;
248 	struct mmc_device_info device_info;
249 	const partition_entry_t *entry;
250 
251 	zeromem(&device_info, sizeof(struct mmc_device_info));
252 	zeromem(&params, sizeof(struct stm32_sdmmc2_params));
253 
254 	device_info.mmc_dev_type = mmc_dev_type;
255 
256 	switch (boot_interface_instance) {
257 	case 1:
258 		params.reg_base = STM32MP_SDMMC1_BASE;
259 		break;
260 	case 2:
261 		params.reg_base = STM32MP_SDMMC2_BASE;
262 		break;
263 	case 3:
264 		params.reg_base = STM32MP_SDMMC3_BASE;
265 		break;
266 	default:
267 		WARN("SDMMC instance not found, using default\n");
268 		if (mmc_dev_type == MMC_IS_SD) {
269 			params.reg_base = STM32MP_SDMMC1_BASE;
270 		} else {
271 			params.reg_base = STM32MP_SDMMC2_BASE;
272 		}
273 		break;
274 	}
275 
276 	params.device_info = &device_info;
277 	if (stm32_sdmmc2_mmc_init(&params) != 0) {
278 		ERROR("SDMMC%u init failed\n", boot_interface_instance);
279 		panic();
280 	}
281 
282 	/* Open MMC as a block device to read GPT table */
283 	io_result = register_io_dev_block(&mmc_dev_con);
284 	if (io_result != 0) {
285 		panic();
286 	}
287 
288 	io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec,
289 				&storage_dev_handle);
290 	assert(io_result == 0);
291 
292 	partition_init(GPT_IMAGE_ID);
293 
294 	io_result = io_dev_close(storage_dev_handle);
295 	assert(io_result == 0);
296 
297 	stm32image_dev_info_spec.device_size =
298 		stm32_sdmmc2_mmc_get_device_size();
299 
300 	for (idx = 0U; idx < IMG_IDX_NUM; idx++) {
301 		part = &stm32image_dev_info_spec.part_info[idx];
302 		entry = get_partition_entry(part->name);
303 		if (entry == NULL) {
304 			ERROR("Partition %s not found\n", part->name);
305 			panic();
306 		}
307 
308 		part->part_offset = entry->start;
309 		part->bkp_offset = 0U;
310 	}
311 
312 	/*
313 	 * Re-open MMC with io_mmc, for better perfs compared to
314 	 * io_block.
315 	 */
316 	io_result = register_io_dev_mmc(&mmc_dev_con);
317 	assert(io_result == 0);
318 
319 	io_result = io_dev_open(mmc_dev_con, 0, &storage_dev_handle);
320 	assert(io_result == 0);
321 
322 	io_result = register_io_dev_stm32image(&stm32image_dev_con);
323 	assert(io_result == 0);
324 
325 	io_result = io_dev_open(stm32image_dev_con,
326 				(uintptr_t)&stm32image_dev_info_spec,
327 				&image_dev_handle);
328 	assert(io_result == 0);
329 }
330 #endif /* STM32MP_SDMMC || STM32MP_EMMC */
331 
332 #if STM32MP_RAW_NAND
333 static void boot_fmc2_nand(boot_api_context_t *boot_context)
334 {
335 	int io_result __unused;
336 	uint8_t idx;
337 	struct stm32image_part_info *part;
338 
339 	io_result = stm32_fmc2_init();
340 	assert(io_result == 0);
341 
342 	/* Register the IO device on this platform */
343 	io_result = register_io_dev_mtd(&nand_dev_con);
344 	assert(io_result == 0);
345 
346 	/* Open connections to device */
347 	io_result = io_dev_open(nand_dev_con, (uintptr_t)&nand_dev_spec,
348 				&storage_dev_handle);
349 	assert(io_result == 0);
350 
351 	stm32image_dev_info_spec.device_size = nand_dev_spec.device_size;
352 
353 	idx = IMG_IDX_BL33;
354 	part = &stm32image_dev_info_spec.part_info[idx];
355 	part->part_offset = STM32MP_NAND_BL33_OFFSET;
356 	part->bkp_offset = nand_dev_spec.erase_size;
357 
358 #ifdef AARCH32_SP_OPTEE
359 	idx = IMG_IDX_OPTEE_HEADER;
360 	part = &stm32image_dev_info_spec.part_info[idx];
361 	part->part_offset = STM32MP_NAND_TEEH_OFFSET;
362 	part->bkp_offset = nand_dev_spec.erase_size;
363 
364 	idx = IMG_IDX_OPTEE_PAGED;
365 	part = &stm32image_dev_info_spec.part_info[idx];
366 	part->part_offset = STM32MP_NAND_TEED_OFFSET;
367 	part->bkp_offset = nand_dev_spec.erase_size;
368 
369 	idx = IMG_IDX_OPTEE_PAGER;
370 	part = &stm32image_dev_info_spec.part_info[idx];
371 	part->part_offset = STM32MP_NAND_TEEX_OFFSET;
372 	part->bkp_offset = nand_dev_spec.erase_size;
373 #endif
374 
375 	io_result = register_io_dev_stm32image(&stm32image_dev_con);
376 	assert(io_result == 0);
377 
378 	io_result = io_dev_open(stm32image_dev_con,
379 				(uintptr_t)&stm32image_dev_info_spec,
380 				&image_dev_handle);
381 	assert(io_result == 0);
382 }
383 #endif /* STM32MP_RAW_NAND */
384 
385 void stm32mp_io_setup(void)
386 {
387 	int io_result __unused;
388 	boot_api_context_t *boot_context =
389 		(boot_api_context_t *)stm32mp_get_boot_ctx_address();
390 
391 	print_boot_device(boot_context);
392 
393 	if ((boot_context->boot_partition_used_toboot == 1U) ||
394 	    (boot_context->boot_partition_used_toboot == 2U)) {
395 		INFO("Boot used partition fsbl%d\n",
396 		     boot_context->boot_partition_used_toboot);
397 	}
398 
399 	io_result = register_io_dev_dummy(&dummy_dev_con);
400 	assert(io_result == 0);
401 
402 	io_result = io_dev_open(dummy_dev_con, dummy_dev_spec,
403 				&dummy_dev_handle);
404 	assert(io_result == 0);
405 
406 	switch (boot_context->boot_interface_selected) {
407 #if STM32MP_SDMMC
408 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
409 		dmbsy();
410 		boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance);
411 		break;
412 #endif
413 #if STM32MP_EMMC
414 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
415 		dmbsy();
416 		boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance);
417 		break;
418 #endif
419 #if STM32MP_RAW_NAND
420 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
421 		dmbsy();
422 		boot_fmc2_nand(boot_context);
423 		break;
424 #endif
425 
426 	default:
427 		ERROR("Boot interface %d not supported\n",
428 		      boot_context->boot_interface_selected);
429 		break;
430 	}
431 }
432 
433 /*
434  * Return an IO device handle and specification which can be used to access
435  * an image. Use this to enforce platform load policy.
436  */
437 int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
438 			  uintptr_t *image_spec)
439 {
440 	int rc;
441 	const struct plat_io_policy *policy;
442 
443 	assert(image_id < ARRAY_SIZE(policies));
444 
445 	policy = &policies[image_id];
446 	rc = policy->check(policy->image_spec);
447 	if (rc == 0) {
448 		*image_spec = policy->image_spec;
449 		*dev_handle = *(policy->dev_handle);
450 	}
451 
452 	return rc;
453 }
454