xref: /rk3399_ARM-atf/plat/st/common/bl2_io_storage.c (revision 0ca180f6416160a523ff442f1ad0b768a9a3a948)
1c9d75b3cSYann Gautier /*
2cddf1bd7SYann Gautier  * Copyright (c) 2015-2021, ARM Limited and Contributors. All rights reserved.
3c9d75b3cSYann Gautier  *
4c9d75b3cSYann Gautier  * SPDX-License-Identifier: BSD-3-Clause
5c9d75b3cSYann Gautier  */
6c9d75b3cSYann Gautier 
7c9d75b3cSYann Gautier #include <assert.h>
8c9d75b3cSYann Gautier #include <string.h>
9c9d75b3cSYann Gautier 
10c9d75b3cSYann Gautier #include <arch_helpers.h>
11c9d75b3cSYann Gautier #include <common/debug.h>
1218b415beSYann Gautier #include <common/desc_image_load.h>
138dd75531SSughosh Ganu #include <drivers/fwu/fwu.h>
148dd75531SSughosh Ganu #include <drivers/fwu/fwu_metadata.h>
15c9d75b3cSYann Gautier #include <drivers/io/io_block.h>
16c9d75b3cSYann Gautier #include <drivers/io/io_driver.h>
171d204ee4SYann Gautier #include <drivers/io/io_fip.h>
18fa92fef0SPatrick Delaunay #include <drivers/io/io_memmap.h>
1912e21dfdSLionel Debieve #include <drivers/io/io_mtd.h>
20c9d75b3cSYann Gautier #include <drivers/io/io_storage.h>
21c9d75b3cSYann Gautier #include <drivers/mmc.h>
228dd75531SSughosh Ganu #include <drivers/partition/efi.h>
23c9d75b3cSYann Gautier #include <drivers/partition/partition.h>
2412e21dfdSLionel Debieve #include <drivers/raw_nand.h>
2557044228SLionel Debieve #include <drivers/spi_nand.h>
26b1b218fbSLionel Debieve #include <drivers/spi_nor.h>
27c9d75b3cSYann Gautier #include <drivers/st/io_mmc.h>
2812e21dfdSLionel Debieve #include <drivers/st/stm32_fmc2_nand.h>
2957044228SLionel Debieve #include <drivers/st/stm32_qspi.h>
30c9d75b3cSYann Gautier #include <drivers/st/stm32_sdmmc2.h>
31fa92fef0SPatrick Delaunay #include <drivers/usb_device.h>
32d5a84eeaSYann Gautier #include <lib/fconf/fconf.h>
33c9d75b3cSYann Gautier #include <lib/mmio.h>
34c9d75b3cSYann Gautier #include <lib/utils.h>
35c9d75b3cSYann Gautier #include <plat/common/platform.h>
361d204ee4SYann Gautier #include <tools_share/firmware_image_package.h>
371d204ee4SYann Gautier 
381d204ee4SYann Gautier #include <platform_def.h>
39fa92fef0SPatrick Delaunay #include <stm32cubeprogrammer.h>
40d5a84eeaSYann Gautier #include <stm32mp_fconf_getter.h>
41fa92fef0SPatrick Delaunay #include <usb_dfu.h>
42c9d75b3cSYann Gautier 
43c9d75b3cSYann Gautier /* IO devices */
441d204ee4SYann Gautier uintptr_t fip_dev_handle;
451d204ee4SYann Gautier uintptr_t storage_dev_handle;
46c9d75b3cSYann Gautier 
471d204ee4SYann Gautier static const io_dev_connector_t *fip_dev_con;
48c9d75b3cSYann Gautier 
4946554b64SNicolas Le Bayon #if STM32MP_SDMMC || STM32MP_EMMC
50cddf1bd7SYann Gautier static struct mmc_device_info mmc_info;
51c9d75b3cSYann Gautier 
52c9d75b3cSYann Gautier static uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE);
53c9d75b3cSYann Gautier 
5418b415beSYann Gautier static io_block_dev_spec_t mmc_block_dev_spec = {
55c9d75b3cSYann Gautier 	/* It's used as temp buffer in block driver */
56c9d75b3cSYann Gautier 	.buffer = {
57c9d75b3cSYann Gautier 		.offset = (size_t)&block_buffer,
58c9d75b3cSYann Gautier 		.length = MMC_BLOCK_SIZE,
59c9d75b3cSYann Gautier 	},
60c9d75b3cSYann Gautier 	.ops = {
61c9d75b3cSYann Gautier 		.read = mmc_read_blocks,
62c9d75b3cSYann Gautier 		.write = NULL,
63c9d75b3cSYann Gautier 	},
64c9d75b3cSYann Gautier 	.block_size = MMC_BLOCK_SIZE,
65c9d75b3cSYann Gautier };
66c9d75b3cSYann Gautier 
67c9d75b3cSYann Gautier static const io_dev_connector_t *mmc_dev_con;
6846554b64SNicolas Le Bayon #endif /* STM32MP_SDMMC || STM32MP_EMMC */
69c9d75b3cSYann Gautier 
70b1b218fbSLionel Debieve #if STM32MP_SPI_NOR
71b1b218fbSLionel Debieve static io_mtd_dev_spec_t spi_nor_dev_spec = {
72b1b218fbSLionel Debieve 	.ops = {
73b1b218fbSLionel Debieve 		.init = spi_nor_init,
74b1b218fbSLionel Debieve 		.read = spi_nor_read,
75b1b218fbSLionel Debieve 	},
76b1b218fbSLionel Debieve };
77b1b218fbSLionel Debieve #endif
78b1b218fbSLionel Debieve 
7912e21dfdSLionel Debieve #if STM32MP_RAW_NAND
8012e21dfdSLionel Debieve static io_mtd_dev_spec_t nand_dev_spec = {
8112e21dfdSLionel Debieve 	.ops = {
8212e21dfdSLionel Debieve 		.init = nand_raw_init,
8312e21dfdSLionel Debieve 		.read = nand_read,
841d204ee4SYann Gautier 		.seek = nand_seek_bb
8512e21dfdSLionel Debieve 	},
8612e21dfdSLionel Debieve };
8712e21dfdSLionel Debieve 
8812e21dfdSLionel Debieve static const io_dev_connector_t *nand_dev_con;
8912e21dfdSLionel Debieve #endif
9012e21dfdSLionel Debieve 
9157044228SLionel Debieve #if STM32MP_SPI_NAND
9257044228SLionel Debieve static io_mtd_dev_spec_t spi_nand_dev_spec = {
9357044228SLionel Debieve 	.ops = {
9457044228SLionel Debieve 		.init = spi_nand_init,
9557044228SLionel Debieve 		.read = nand_read,
961d204ee4SYann Gautier 		.seek = nand_seek_bb
9757044228SLionel Debieve 	},
9857044228SLionel Debieve };
99b1b218fbSLionel Debieve #endif
10057044228SLionel Debieve 
101b1b218fbSLionel Debieve #if STM32MP_SPI_NAND || STM32MP_SPI_NOR
10257044228SLionel Debieve static const io_dev_connector_t *spi_dev_con;
10357044228SLionel Debieve #endif
10457044228SLionel Debieve 
1059083fa11SPatrick Delaunay #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER
106fa92fef0SPatrick Delaunay static const io_dev_connector_t *memmap_dev_con;
107fa92fef0SPatrick Delaunay #endif
108fa92fef0SPatrick Delaunay 
109d5a84eeaSYann Gautier io_block_spec_t image_block_spec = {
1101d204ee4SYann Gautier 	.offset = 0U,
1111d204ee4SYann Gautier 	.length = 0U,
112c9d75b3cSYann Gautier };
113c9d75b3cSYann Gautier 
114d5a84eeaSYann Gautier int open_fip(const uintptr_t spec)
115c9d75b3cSYann Gautier {
1161d204ee4SYann Gautier 	return io_dev_init(fip_dev_handle, (uintptr_t)FIP_IMAGE_ID);
117c9d75b3cSYann Gautier }
118c9d75b3cSYann Gautier 
119d5a84eeaSYann Gautier int open_storage(const uintptr_t spec)
120c9d75b3cSYann Gautier {
121c9d75b3cSYann Gautier 	return io_dev_init(storage_dev_handle, 0);
122c9d75b3cSYann Gautier }
123c9d75b3cSYann Gautier 
124c9d75b3cSYann Gautier static void print_boot_device(boot_api_context_t *boot_context)
125c9d75b3cSYann Gautier {
126c9d75b3cSYann Gautier 	switch (boot_context->boot_interface_selected) {
127c9d75b3cSYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
128c9d75b3cSYann Gautier 		INFO("Using SDMMC\n");
129c9d75b3cSYann Gautier 		break;
130c9d75b3cSYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
131c9d75b3cSYann Gautier 		INFO("Using EMMC\n");
132c9d75b3cSYann Gautier 		break;
133b1b218fbSLionel Debieve 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
134b1b218fbSLionel Debieve 		INFO("Using QSPI NOR\n");
135b1b218fbSLionel Debieve 		break;
13612e21dfdSLionel Debieve 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
13712e21dfdSLionel Debieve 		INFO("Using FMC NAND\n");
13812e21dfdSLionel Debieve 		break;
13957044228SLionel Debieve 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
14057044228SLionel Debieve 		INFO("Using SPI NAND\n");
14157044228SLionel Debieve 		break;
1429083fa11SPatrick Delaunay 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART:
1439083fa11SPatrick Delaunay 		INFO("Using UART\n");
1449083fa11SPatrick Delaunay 		break;
145fa92fef0SPatrick Delaunay 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
146fa92fef0SPatrick Delaunay 		INFO("Using USB\n");
147fa92fef0SPatrick Delaunay 		break;
148c9d75b3cSYann Gautier 	default:
1491d204ee4SYann Gautier 		ERROR("Boot interface %u not found\n",
1501d204ee4SYann Gautier 		      boot_context->boot_interface_selected);
151c9d75b3cSYann Gautier 		panic();
152c9d75b3cSYann Gautier 		break;
153c9d75b3cSYann Gautier 	}
154c9d75b3cSYann Gautier 
155c9d75b3cSYann Gautier 	if (boot_context->boot_interface_instance != 0U) {
156c9d75b3cSYann Gautier 		INFO("  Instance %d\n", boot_context->boot_interface_instance);
157c9d75b3cSYann Gautier 	}
158c9d75b3cSYann Gautier }
159c9d75b3cSYann Gautier 
16046554b64SNicolas Le Bayon #if STM32MP_SDMMC || STM32MP_EMMC
1610b1aa772SYann Gautier static void boot_mmc(enum mmc_device_type mmc_dev_type,
1620b1aa772SYann Gautier 		     uint16_t boot_interface_instance)
163c9d75b3cSYann Gautier {
164c9d75b3cSYann Gautier 	int io_result __unused;
165c9d75b3cSYann Gautier 	struct stm32_sdmmc2_params params;
166c9d75b3cSYann Gautier 
16742beea8dSYann Gautier 	zeromem(&params, sizeof(struct stm32_sdmmc2_params));
168c9d75b3cSYann Gautier 
169cddf1bd7SYann Gautier 	mmc_info.mmc_dev_type = mmc_dev_type;
170c9d75b3cSYann Gautier 
1710b1aa772SYann Gautier 	switch (boot_interface_instance) {
172c9d75b3cSYann Gautier 	case 1:
1733f9c9784SYann Gautier 		params.reg_base = STM32MP_SDMMC1_BASE;
174c9d75b3cSYann Gautier 		break;
175c9d75b3cSYann Gautier 	case 2:
1763f9c9784SYann Gautier 		params.reg_base = STM32MP_SDMMC2_BASE;
177c9d75b3cSYann Gautier 		break;
178c9d75b3cSYann Gautier 	case 3:
1793f9c9784SYann Gautier 		params.reg_base = STM32MP_SDMMC3_BASE;
180c9d75b3cSYann Gautier 		break;
181c9d75b3cSYann Gautier 	default:
182c9d75b3cSYann Gautier 		WARN("SDMMC instance not found, using default\n");
1830b1aa772SYann Gautier 		if (mmc_dev_type == MMC_IS_SD) {
1840b1aa772SYann Gautier 			params.reg_base = STM32MP_SDMMC1_BASE;
1850b1aa772SYann Gautier 		} else {
1860b1aa772SYann Gautier 			params.reg_base = STM32MP_SDMMC2_BASE;
1870b1aa772SYann Gautier 		}
188c9d75b3cSYann Gautier 		break;
189c9d75b3cSYann Gautier 	}
190c9d75b3cSYann Gautier 
191cddf1bd7SYann Gautier 	params.device_info = &mmc_info;
192c9d75b3cSYann Gautier 	if (stm32_sdmmc2_mmc_init(&params) != 0) {
1930b1aa772SYann Gautier 		ERROR("SDMMC%u init failed\n", boot_interface_instance);
194c9d75b3cSYann Gautier 		panic();
195c9d75b3cSYann Gautier 	}
196c9d75b3cSYann Gautier 
197c9d75b3cSYann Gautier 	/* Open MMC as a block device to read GPT table */
198c9d75b3cSYann Gautier 	io_result = register_io_dev_block(&mmc_dev_con);
199c9d75b3cSYann Gautier 	if (io_result != 0) {
200c9d75b3cSYann Gautier 		panic();
201c9d75b3cSYann Gautier 	}
202c9d75b3cSYann Gautier 
2030b1aa772SYann Gautier 	io_result = io_dev_open(mmc_dev_con, (uintptr_t)&mmc_block_dev_spec,
204c9d75b3cSYann Gautier 				&storage_dev_handle);
205c9d75b3cSYann Gautier 	assert(io_result == 0);
2060b1aa772SYann Gautier }
20746554b64SNicolas Le Bayon #endif /* STM32MP_SDMMC || STM32MP_EMMC */
2080b1aa772SYann Gautier 
209b1b218fbSLionel Debieve #if STM32MP_SPI_NOR
210b1b218fbSLionel Debieve static void boot_spi_nor(boot_api_context_t *boot_context)
211b1b218fbSLionel Debieve {
212b1b218fbSLionel Debieve 	int io_result __unused;
213b1b218fbSLionel Debieve 
214b1b218fbSLionel Debieve 	io_result = stm32_qspi_init();
215b1b218fbSLionel Debieve 	assert(io_result == 0);
216b1b218fbSLionel Debieve 
217b1b218fbSLionel Debieve 	io_result = register_io_dev_mtd(&spi_dev_con);
218b1b218fbSLionel Debieve 	assert(io_result == 0);
219b1b218fbSLionel Debieve 
220b1b218fbSLionel Debieve 	/* Open connections to device */
221b1b218fbSLionel Debieve 	io_result = io_dev_open(spi_dev_con,
222b1b218fbSLionel Debieve 				(uintptr_t)&spi_nor_dev_spec,
223b1b218fbSLionel Debieve 				&storage_dev_handle);
224b1b218fbSLionel Debieve 	assert(io_result == 0);
225b1b218fbSLionel Debieve }
226b1b218fbSLionel Debieve #endif /* STM32MP_SPI_NOR */
227b1b218fbSLionel Debieve 
22812e21dfdSLionel Debieve #if STM32MP_RAW_NAND
22912e21dfdSLionel Debieve static void boot_fmc2_nand(boot_api_context_t *boot_context)
23012e21dfdSLionel Debieve {
23112e21dfdSLionel Debieve 	int io_result __unused;
23212e21dfdSLionel Debieve 
23312e21dfdSLionel Debieve 	io_result = stm32_fmc2_init();
23412e21dfdSLionel Debieve 	assert(io_result == 0);
23512e21dfdSLionel Debieve 
23612e21dfdSLionel Debieve 	/* Register the IO device on this platform */
23712e21dfdSLionel Debieve 	io_result = register_io_dev_mtd(&nand_dev_con);
23812e21dfdSLionel Debieve 	assert(io_result == 0);
23912e21dfdSLionel Debieve 
24012e21dfdSLionel Debieve 	/* Open connections to device */
24112e21dfdSLionel Debieve 	io_result = io_dev_open(nand_dev_con, (uintptr_t)&nand_dev_spec,
24212e21dfdSLionel Debieve 				&storage_dev_handle);
24312e21dfdSLionel Debieve 	assert(io_result == 0);
24412e21dfdSLionel Debieve }
24512e21dfdSLionel Debieve #endif /* STM32MP_RAW_NAND */
24612e21dfdSLionel Debieve 
24757044228SLionel Debieve #if STM32MP_SPI_NAND
24857044228SLionel Debieve static void boot_spi_nand(boot_api_context_t *boot_context)
24957044228SLionel Debieve {
25057044228SLionel Debieve 	int io_result __unused;
25157044228SLionel Debieve 
25257044228SLionel Debieve 	io_result = stm32_qspi_init();
25357044228SLionel Debieve 	assert(io_result == 0);
25457044228SLionel Debieve 
25557044228SLionel Debieve 	io_result = register_io_dev_mtd(&spi_dev_con);
25657044228SLionel Debieve 	assert(io_result == 0);
25757044228SLionel Debieve 
25857044228SLionel Debieve 	/* Open connections to device */
25957044228SLionel Debieve 	io_result = io_dev_open(spi_dev_con,
26057044228SLionel Debieve 				(uintptr_t)&spi_nand_dev_spec,
26157044228SLionel Debieve 				&storage_dev_handle);
26257044228SLionel Debieve 	assert(io_result == 0);
26357044228SLionel Debieve }
26457044228SLionel Debieve #endif /* STM32MP_SPI_NAND */
26557044228SLionel Debieve 
2669083fa11SPatrick Delaunay #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER
267fa92fef0SPatrick Delaunay static void mmap_io_setup(void)
268fa92fef0SPatrick Delaunay {
269fa92fef0SPatrick Delaunay 	int io_result __unused;
270fa92fef0SPatrick Delaunay 
271fa92fef0SPatrick Delaunay 	io_result = register_io_dev_memmap(&memmap_dev_con);
272fa92fef0SPatrick Delaunay 	assert(io_result == 0);
273fa92fef0SPatrick Delaunay 
274fa92fef0SPatrick Delaunay 	io_result = io_dev_open(memmap_dev_con, (uintptr_t)NULL,
275fa92fef0SPatrick Delaunay 				&storage_dev_handle);
276fa92fef0SPatrick Delaunay 	assert(io_result == 0);
277fa92fef0SPatrick Delaunay }
278fa92fef0SPatrick Delaunay 
2799083fa11SPatrick Delaunay #if STM32MP_UART_PROGRAMMER
2809083fa11SPatrick Delaunay static void stm32cubeprogrammer_uart(void)
2819083fa11SPatrick Delaunay {
2829083fa11SPatrick Delaunay 	int ret __unused;
2839083fa11SPatrick Delaunay 	boot_api_context_t *boot_context =
2849083fa11SPatrick Delaunay 		(boot_api_context_t *)stm32mp_get_boot_ctx_address();
2859083fa11SPatrick Delaunay 	uintptr_t uart_base;
2869083fa11SPatrick Delaunay 
2879083fa11SPatrick Delaunay 	uart_base = get_uart_address(boot_context->boot_interface_instance);
2889083fa11SPatrick Delaunay 	ret = stm32cubeprog_uart_load(uart_base, DWL_BUFFER_BASE, DWL_BUFFER_SIZE);
2899083fa11SPatrick Delaunay 	assert(ret == 0);
2909083fa11SPatrick Delaunay }
2919083fa11SPatrick Delaunay #endif
2929083fa11SPatrick Delaunay 
2939083fa11SPatrick Delaunay #if STM32MP_USB_PROGRAMMER
294fa92fef0SPatrick Delaunay static void stm32cubeprogrammer_usb(void)
295fa92fef0SPatrick Delaunay {
296fa92fef0SPatrick Delaunay 	int ret __unused;
297fa92fef0SPatrick Delaunay 	struct usb_handle *pdev;
298fa92fef0SPatrick Delaunay 
299fa92fef0SPatrick Delaunay 	/* Init USB on platform */
300fa92fef0SPatrick Delaunay 	pdev = usb_dfu_plat_init();
301fa92fef0SPatrick Delaunay 
302fa92fef0SPatrick Delaunay 	ret = stm32cubeprog_usb_load(pdev, DWL_BUFFER_BASE, DWL_BUFFER_SIZE);
303fa92fef0SPatrick Delaunay 	assert(ret == 0);
304fa92fef0SPatrick Delaunay }
305fa92fef0SPatrick Delaunay #endif
3069083fa11SPatrick Delaunay #endif /* STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER */
3079083fa11SPatrick Delaunay 
308fa92fef0SPatrick Delaunay 
3090b1aa772SYann Gautier void stm32mp_io_setup(void)
3100b1aa772SYann Gautier {
3110b1aa772SYann Gautier 	int io_result __unused;
3120b1aa772SYann Gautier 	boot_api_context_t *boot_context =
3130b1aa772SYann Gautier 		(boot_api_context_t *)stm32mp_get_boot_ctx_address();
3140b1aa772SYann Gautier 
3150b1aa772SYann Gautier 	print_boot_device(boot_context);
3160b1aa772SYann Gautier 
3170b1aa772SYann Gautier 	if ((boot_context->boot_partition_used_toboot == 1U) ||
3180b1aa772SYann Gautier 	    (boot_context->boot_partition_used_toboot == 2U)) {
3191d204ee4SYann Gautier 		INFO("Boot used partition fsbl%u\n",
3200b1aa772SYann Gautier 		     boot_context->boot_partition_used_toboot);
3210b1aa772SYann Gautier 	}
3220b1aa772SYann Gautier 
3231d204ee4SYann Gautier 	io_result = register_io_dev_fip(&fip_dev_con);
3240b1aa772SYann Gautier 	assert(io_result == 0);
3250b1aa772SYann Gautier 
3261d204ee4SYann Gautier 	io_result = io_dev_open(fip_dev_con, (uintptr_t)NULL,
3271d204ee4SYann Gautier 				&fip_dev_handle);
3280b1aa772SYann Gautier 
3290b1aa772SYann Gautier 	switch (boot_context->boot_interface_selected) {
33046554b64SNicolas Le Bayon #if STM32MP_SDMMC
3310b1aa772SYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
3320b1aa772SYann Gautier 		dmbsy();
3330b1aa772SYann Gautier 		boot_mmc(MMC_IS_SD, boot_context->boot_interface_instance);
3340b1aa772SYann Gautier 		break;
33546554b64SNicolas Le Bayon #endif
33646554b64SNicolas Le Bayon #if STM32MP_EMMC
3370b1aa772SYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
3380b1aa772SYann Gautier 		dmbsy();
3390b1aa772SYann Gautier 		boot_mmc(MMC_IS_EMMC, boot_context->boot_interface_instance);
340c9d75b3cSYann Gautier 		break;
34146554b64SNicolas Le Bayon #endif
342b1b218fbSLionel Debieve #if STM32MP_SPI_NOR
343b1b218fbSLionel Debieve 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
344b1b218fbSLionel Debieve 		dmbsy();
345b1b218fbSLionel Debieve 		boot_spi_nor(boot_context);
346b1b218fbSLionel Debieve 		break;
347b1b218fbSLionel Debieve #endif
34812e21dfdSLionel Debieve #if STM32MP_RAW_NAND
34912e21dfdSLionel Debieve 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
35012e21dfdSLionel Debieve 		dmbsy();
35112e21dfdSLionel Debieve 		boot_fmc2_nand(boot_context);
35212e21dfdSLionel Debieve 		break;
35312e21dfdSLionel Debieve #endif
35457044228SLionel Debieve #if STM32MP_SPI_NAND
35557044228SLionel Debieve 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
35657044228SLionel Debieve 		dmbsy();
35757044228SLionel Debieve 		boot_spi_nand(boot_context);
35857044228SLionel Debieve 		break;
35957044228SLionel Debieve #endif
3609083fa11SPatrick Delaunay #if STM32MP_UART_PROGRAMMER || STM32MP_USB_PROGRAMMER
3619083fa11SPatrick Delaunay #if STM32MP_UART_PROGRAMMER
3629083fa11SPatrick Delaunay 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART:
3639083fa11SPatrick Delaunay #endif
364fa92fef0SPatrick Delaunay #if STM32MP_USB_PROGRAMMER
365fa92fef0SPatrick Delaunay 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
3669083fa11SPatrick Delaunay #endif
367fa92fef0SPatrick Delaunay 		dmbsy();
368fa92fef0SPatrick Delaunay 		mmap_io_setup();
369fa92fef0SPatrick Delaunay 		break;
370fa92fef0SPatrick Delaunay #endif
371c9d75b3cSYann Gautier 
372c9d75b3cSYann Gautier 	default:
373c9d75b3cSYann Gautier 		ERROR("Boot interface %d not supported\n",
374c9d75b3cSYann Gautier 		      boot_context->boot_interface_selected);
37571693a66SYann Gautier 		panic();
376c9d75b3cSYann Gautier 		break;
377c9d75b3cSYann Gautier 	}
378c9d75b3cSYann Gautier }
379c9d75b3cSYann Gautier 
3801d204ee4SYann Gautier int bl2_plat_handle_pre_image_load(unsigned int image_id)
3811d204ee4SYann Gautier {
3821d204ee4SYann Gautier 	static bool gpt_init_done __unused;
3831d204ee4SYann Gautier 	uint16_t boot_itf = stm32mp_get_boot_itf_selected();
3841d204ee4SYann Gautier 
3851d204ee4SYann Gautier 	switch (boot_itf) {
3861d204ee4SYann Gautier #if STM32MP_SDMMC || STM32MP_EMMC
3871d204ee4SYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD:
3881d204ee4SYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC:
3891d204ee4SYann Gautier 		if (!gpt_init_done) {
3908dd75531SSughosh Ganu /*
3918dd75531SSughosh Ganu  * With FWU Multi Bank feature enabled, the selection of
3928dd75531SSughosh Ganu  * the image to boot will be done by fwu_init calling the
3938dd75531SSughosh Ganu  * platform hook, plat_fwu_set_images_source.
3948dd75531SSughosh Ganu  */
3958dd75531SSughosh Ganu #if !PSA_FWU_SUPPORT
3961d204ee4SYann Gautier 			const partition_entry_t *entry;
3971d204ee4SYann Gautier 
3981d204ee4SYann Gautier 			partition_init(GPT_IMAGE_ID);
3991d204ee4SYann Gautier 			entry = get_partition_entry(FIP_IMAGE_NAME);
4001d204ee4SYann Gautier 			if (entry == NULL) {
4011d204ee4SYann Gautier 				ERROR("Could NOT find the %s partition!\n",
4021d204ee4SYann Gautier 				      FIP_IMAGE_NAME);
4031d204ee4SYann Gautier 				return -ENOENT;
4041d204ee4SYann Gautier 			}
4051d204ee4SYann Gautier 
4061d204ee4SYann Gautier 			image_block_spec.offset = entry->start;
4071d204ee4SYann Gautier 			image_block_spec.length = entry->length;
4088dd75531SSughosh Ganu #endif
4091d204ee4SYann Gautier 			gpt_init_done = true;
41018b415beSYann Gautier 		} else {
41118b415beSYann Gautier 			bl_mem_params_node_t *bl_mem_params = get_bl_mem_params_node(image_id);
41218b415beSYann Gautier 
41318b415beSYann Gautier 			mmc_block_dev_spec.buffer.offset = bl_mem_params->image_info.image_base;
41418b415beSYann Gautier 			mmc_block_dev_spec.buffer.length = bl_mem_params->image_info.image_max_size;
4151d204ee4SYann Gautier 		}
4161d204ee4SYann Gautier 
4171d204ee4SYann Gautier 		break;
4181d204ee4SYann Gautier #endif
4191d204ee4SYann Gautier 
4201d204ee4SYann Gautier #if STM32MP_RAW_NAND || STM32MP_SPI_NAND
4211d204ee4SYann Gautier #if STM32MP_RAW_NAND
4221d204ee4SYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_FMC:
4231d204ee4SYann Gautier #endif
4241d204ee4SYann Gautier #if STM32MP_SPI_NAND
4251d204ee4SYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NAND_QSPI:
4261d204ee4SYann Gautier #endif
4271d204ee4SYann Gautier 		image_block_spec.offset = STM32MP_NAND_FIP_OFFSET;
4281d204ee4SYann Gautier 		break;
4291d204ee4SYann Gautier #endif
4301d204ee4SYann Gautier 
4311d204ee4SYann Gautier #if STM32MP_SPI_NOR
4321d204ee4SYann Gautier 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_NOR_QSPI:
4331d204ee4SYann Gautier 		image_block_spec.offset = STM32MP_NOR_FIP_OFFSET;
4341d204ee4SYann Gautier 		break;
4351d204ee4SYann Gautier #endif
4361d204ee4SYann Gautier 
4379083fa11SPatrick Delaunay #if STM32MP_UART_PROGRAMMER
4389083fa11SPatrick Delaunay 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_UART:
4399083fa11SPatrick Delaunay 		if (image_id == FW_CONFIG_ID) {
4409083fa11SPatrick Delaunay 			stm32cubeprogrammer_uart();
4419083fa11SPatrick Delaunay 			/* FIP loaded at DWL address */
4429083fa11SPatrick Delaunay 			image_block_spec.offset = DWL_BUFFER_BASE;
4439083fa11SPatrick Delaunay 			image_block_spec.length = DWL_BUFFER_SIZE;
4449083fa11SPatrick Delaunay 		}
4459083fa11SPatrick Delaunay 		break;
4469083fa11SPatrick Delaunay #endif
447fa92fef0SPatrick Delaunay #if STM32MP_USB_PROGRAMMER
448fa92fef0SPatrick Delaunay 	case BOOT_API_CTX_BOOT_INTERFACE_SEL_SERIAL_USB:
449fa92fef0SPatrick Delaunay 		if (image_id == FW_CONFIG_ID) {
450fa92fef0SPatrick Delaunay 			stm32cubeprogrammer_usb();
451fa92fef0SPatrick Delaunay 			/* FIP loaded at DWL address */
452fa92fef0SPatrick Delaunay 			image_block_spec.offset = DWL_BUFFER_BASE;
453fa92fef0SPatrick Delaunay 			image_block_spec.length = DWL_BUFFER_SIZE;
454fa92fef0SPatrick Delaunay 		}
455fa92fef0SPatrick Delaunay 		break;
456fa92fef0SPatrick Delaunay #endif
457fa92fef0SPatrick Delaunay 
4581d204ee4SYann Gautier 	default:
4591d204ee4SYann Gautier 		ERROR("FIP Not found\n");
4601d204ee4SYann Gautier 		panic();
4611d204ee4SYann Gautier 	}
4621d204ee4SYann Gautier 
4631d204ee4SYann Gautier 	return 0;
4641d204ee4SYann Gautier }
4651d204ee4SYann Gautier 
466c9d75b3cSYann Gautier /*
467c9d75b3cSYann Gautier  * Return an IO device handle and specification which can be used to access
468c9d75b3cSYann Gautier  * an image. Use this to enforce platform load policy.
469c9d75b3cSYann Gautier  */
470c9d75b3cSYann Gautier int plat_get_image_source(unsigned int image_id, uintptr_t *dev_handle,
471c9d75b3cSYann Gautier 			  uintptr_t *image_spec)
472c9d75b3cSYann Gautier {
473c9d75b3cSYann Gautier 	int rc;
474c9d75b3cSYann Gautier 	const struct plat_io_policy *policy;
475c9d75b3cSYann Gautier 
476d5a84eeaSYann Gautier 	policy = FCONF_GET_PROPERTY(stm32mp, io_policies, image_id);
477c9d75b3cSYann Gautier 	rc = policy->check(policy->image_spec);
478c9d75b3cSYann Gautier 	if (rc == 0) {
479c9d75b3cSYann Gautier 		*image_spec = policy->image_spec;
480c9d75b3cSYann Gautier 		*dev_handle = *(policy->dev_handle);
481c9d75b3cSYann Gautier 	}
482c9d75b3cSYann Gautier 
483c9d75b3cSYann Gautier 	return rc;
484c9d75b3cSYann Gautier }
4858dd75531SSughosh Ganu 
4868dd75531SSughosh Ganu #if (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT
4878dd75531SSughosh Ganu /*
4888dd75531SSughosh Ganu  * Eventually, this function will return the
4898dd75531SSughosh Ganu  * boot index to be passed on to the Update
4908dd75531SSughosh Ganu  * Agent after performing certain checks like
4918dd75531SSughosh Ganu  * a watchdog timeout, or Auth failure while
4928dd75531SSughosh Ganu  * trying to load from a certain bank.
4938dd75531SSughosh Ganu  * For now, since we do not have that logic
4948dd75531SSughosh Ganu  * implemented, just pass the active_index
4958dd75531SSughosh Ganu  * read from the metadata.
4968dd75531SSughosh Ganu  */
4978dd75531SSughosh Ganu uint32_t plat_fwu_get_boot_idx(void)
4988dd75531SSughosh Ganu {
4998dd75531SSughosh Ganu 	const struct fwu_metadata *metadata;
5008dd75531SSughosh Ganu 
5018dd75531SSughosh Ganu 	metadata = fwu_get_metadata();
5028dd75531SSughosh Ganu 
5038dd75531SSughosh Ganu 	return metadata->active_index;
5048dd75531SSughosh Ganu }
5058dd75531SSughosh Ganu 
5068dd75531SSughosh Ganu static void *stm32_get_image_spec(const uuid_t *img_type_uuid)
5078dd75531SSughosh Ganu {
5088dd75531SSughosh Ganu 	unsigned int i;
5098dd75531SSughosh Ganu 
5108dd75531SSughosh Ganu 	for (i = 0U; i < MAX_NUMBER_IDS; i++) {
5118dd75531SSughosh Ganu 		if ((guidcmp(&policies[i].img_type_guid, img_type_uuid)) == 0) {
5128dd75531SSughosh Ganu 			return (void *)policies[i].image_spec;
5138dd75531SSughosh Ganu 		}
5148dd75531SSughosh Ganu 	}
5158dd75531SSughosh Ganu 
5168dd75531SSughosh Ganu 	return NULL;
5178dd75531SSughosh Ganu }
5188dd75531SSughosh Ganu 
5198dd75531SSughosh Ganu void plat_fwu_set_images_source(const struct fwu_metadata *metadata)
5208dd75531SSughosh Ganu {
5218dd75531SSughosh Ganu 	unsigned int i;
5228dd75531SSughosh Ganu 	uint32_t boot_idx;
5238dd75531SSughosh Ganu 	const partition_entry_t *entry;
5248dd75531SSughosh Ganu 	const uuid_t *img_type_uuid, *img_uuid;
5258dd75531SSughosh Ganu 	io_block_spec_t *image_spec;
5268dd75531SSughosh Ganu 
5278dd75531SSughosh Ganu 	boot_idx = plat_fwu_get_boot_idx();
5288dd75531SSughosh Ganu 	assert(boot_idx < NR_OF_FW_BANKS);
5298dd75531SSughosh Ganu 
5308dd75531SSughosh Ganu 	for (i = 0U; i < NR_OF_IMAGES_IN_FW_BANK; i++) {
5318dd75531SSughosh Ganu 		img_type_uuid = &metadata->img_entry[i].img_type_uuid;
5328dd75531SSughosh Ganu 		image_spec = stm32_get_image_spec(img_type_uuid);
5338dd75531SSughosh Ganu 		if (image_spec == NULL) {
5348dd75531SSughosh Ganu 			ERROR("Unable to get image spec for the image in the metadata\n");
5358dd75531SSughosh Ganu 			panic();
5368dd75531SSughosh Ganu 		}
5378dd75531SSughosh Ganu 
5388dd75531SSughosh Ganu 		img_uuid =
5398dd75531SSughosh Ganu 			&metadata->img_entry[i].img_props[boot_idx].img_uuid;
5408dd75531SSughosh Ganu 
5418dd75531SSughosh Ganu 		entry = get_partition_entry_by_uuid(img_uuid);
5428dd75531SSughosh Ganu 		if (entry == NULL) {
5438dd75531SSughosh Ganu 			ERROR("Unable to find the partition with the uuid mentioned in metadata\n");
5448dd75531SSughosh Ganu 			panic();
5458dd75531SSughosh Ganu 		}
5468dd75531SSughosh Ganu 
5478dd75531SSughosh Ganu 		image_spec->offset = entry->start;
5488dd75531SSughosh Ganu 		image_spec->length = entry->length;
5498dd75531SSughosh Ganu 	}
5508dd75531SSughosh Ganu }
551*0ca180f6SSughosh Ganu 
552*0ca180f6SSughosh Ganu static int plat_set_image_source(unsigned int image_id,
553*0ca180f6SSughosh Ganu 				 uintptr_t *handle,
554*0ca180f6SSughosh Ganu 				 uintptr_t *image_spec,
555*0ca180f6SSughosh Ganu 				 const char *part_name)
556*0ca180f6SSughosh Ganu {
557*0ca180f6SSughosh Ganu 	struct plat_io_policy *policy;
558*0ca180f6SSughosh Ganu 	io_block_spec_t *spec;
559*0ca180f6SSughosh Ganu 	const partition_entry_t *entry = get_partition_entry(part_name);
560*0ca180f6SSughosh Ganu 
561*0ca180f6SSughosh Ganu 	if (entry == NULL) {
562*0ca180f6SSughosh Ganu 		ERROR("Unable to find the %s partition\n", part_name);
563*0ca180f6SSughosh Ganu 		return -ENOENT;
564*0ca180f6SSughosh Ganu 	}
565*0ca180f6SSughosh Ganu 
566*0ca180f6SSughosh Ganu 	policy = &policies[image_id];
567*0ca180f6SSughosh Ganu 
568*0ca180f6SSughosh Ganu 	spec = (io_block_spec_t *)policy->image_spec;
569*0ca180f6SSughosh Ganu 	spec->offset = entry->start;
570*0ca180f6SSughosh Ganu 	spec->length = entry->length;
571*0ca180f6SSughosh Ganu 
572*0ca180f6SSughosh Ganu 	*image_spec = policy->image_spec;
573*0ca180f6SSughosh Ganu 	*handle = *policy->dev_handle;
574*0ca180f6SSughosh Ganu 
575*0ca180f6SSughosh Ganu 	return 0;
576*0ca180f6SSughosh Ganu }
577*0ca180f6SSughosh Ganu 
578*0ca180f6SSughosh Ganu int plat_fwu_set_metadata_image_source(unsigned int image_id,
579*0ca180f6SSughosh Ganu 				       uintptr_t *handle,
580*0ca180f6SSughosh Ganu 				       uintptr_t *image_spec)
581*0ca180f6SSughosh Ganu {
582*0ca180f6SSughosh Ganu 	char *part_name;
583*0ca180f6SSughosh Ganu 
584*0ca180f6SSughosh Ganu 	assert((image_id == FWU_METADATA_IMAGE_ID) ||
585*0ca180f6SSughosh Ganu 	       (image_id == BKUP_FWU_METADATA_IMAGE_ID));
586*0ca180f6SSughosh Ganu 
587*0ca180f6SSughosh Ganu 	partition_init(GPT_IMAGE_ID);
588*0ca180f6SSughosh Ganu 
589*0ca180f6SSughosh Ganu 	if (image_id == FWU_METADATA_IMAGE_ID) {
590*0ca180f6SSughosh Ganu 		part_name = METADATA_PART_1;
591*0ca180f6SSughosh Ganu 	} else {
592*0ca180f6SSughosh Ganu 		part_name = METADATA_PART_2;
593*0ca180f6SSughosh Ganu 	}
594*0ca180f6SSughosh Ganu 
595*0ca180f6SSughosh Ganu 	return plat_set_image_source(image_id, handle, image_spec,
596*0ca180f6SSughosh Ganu 				     part_name);
597*0ca180f6SSughosh Ganu }
5988dd75531SSughosh Ganu #endif /* (STM32MP_SDMMC || STM32MP_EMMC) && PSA_FWU_SUPPORT */
599