xref: /rk3399_ARM-atf/plat/socionext/synquacer/include/sq_common.h (revision b529799ff1848c6ad748ec7c8156972f9a7d9673)
1007a7a33SSumit Garg /*
2007a7a33SSumit Garg  * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3007a7a33SSumit Garg  *
4007a7a33SSumit Garg  * SPDX-License-Identifier: BSD-3-Clause
5007a7a33SSumit Garg  */
6007a7a33SSumit Garg 
7007a7a33SSumit Garg #ifndef __SQ_COMMON_H__
8007a7a33SSumit Garg #define __SQ_COMMON_H__
9007a7a33SSumit Garg 
10007a7a33SSumit Garg #include <sys/types.h>
11007a7a33SSumit Garg 
120eb275c9SSumit Garg void plat_sq_interconnect_init(void);
130eb275c9SSumit Garg void plat_sq_interconnect_enter_coherency(void);
140eb275c9SSumit Garg void plat_sq_interconnect_exit_coherency(void);
150eb275c9SSumit Garg 
16007a7a33SSumit Garg unsigned int sq_calc_core_pos(u_register_t mpidr);
17007a7a33SSumit Garg 
18*b529799fSSumit Garg void sq_gic_driver_init(void);
19*b529799fSSumit Garg void sq_gic_init(void);
20*b529799fSSumit Garg void sq_gic_cpuif_enable(void);
21*b529799fSSumit Garg void sq_gic_cpuif_disable(void);
22*b529799fSSumit Garg void sq_gic_pcpu_init(void);
23*b529799fSSumit Garg 
24007a7a33SSumit Garg #endif /* __SQ_COMMON_H__ */
25