xref: /rk3399_ARM-atf/plat/socionext/synquacer/include/sq_common.h (revision 8cd37d7ba1988e7f86bd92ba75e388c3f04dc172)
1007a7a33SSumit Garg /*
2007a7a33SSumit Garg  * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3007a7a33SSumit Garg  *
4007a7a33SSumit Garg  * SPDX-License-Identifier: BSD-3-Clause
5007a7a33SSumit Garg  */
6007a7a33SSumit Garg 
7007a7a33SSumit Garg #ifndef __SQ_COMMON_H__
8007a7a33SSumit Garg #define __SQ_COMMON_H__
9007a7a33SSumit Garg 
10007a7a33SSumit Garg #include <sys/types.h>
11*8cd37d7bSSumit Garg #include <xlat_tables_v2.h>
12007a7a33SSumit Garg 
130eb275c9SSumit Garg void plat_sq_interconnect_init(void);
140eb275c9SSumit Garg void plat_sq_interconnect_enter_coherency(void);
150eb275c9SSumit Garg void plat_sq_interconnect_exit_coherency(void);
160eb275c9SSumit Garg 
17007a7a33SSumit Garg unsigned int sq_calc_core_pos(u_register_t mpidr);
18007a7a33SSumit Garg 
19b529799fSSumit Garg void sq_gic_driver_init(void);
20b529799fSSumit Garg void sq_gic_init(void);
21b529799fSSumit Garg void sq_gic_cpuif_enable(void);
22b529799fSSumit Garg void sq_gic_cpuif_disable(void);
23b529799fSSumit Garg void sq_gic_pcpu_init(void);
24b529799fSSumit Garg 
25*8cd37d7bSSumit Garg void sq_mmap_setup(uintptr_t total_base, size_t total_size,
26*8cd37d7bSSumit Garg 		   const struct mmap_region *mmap);
27*8cd37d7bSSumit Garg 
28007a7a33SSumit Garg #endif /* __SQ_COMMON_H__ */
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