1007a7a33SSumit Garg /* 2*48ab3904SJassi Brar * Copyright (c) 2018-2022, ARM Limited and Contributors. All rights reserved. 3007a7a33SSumit Garg * 4007a7a33SSumit Garg * SPDX-License-Identifier: BSD-3-Clause 5007a7a33SSumit Garg */ 6007a7a33SSumit Garg 7c3cf06f1SAntonio Nino Diaz #ifndef SQ_COMMON_H 8c3cf06f1SAntonio Nino Diaz #define SQ_COMMON_H 9007a7a33SSumit Garg 1093c78ed2SAntonio Nino Diaz #include <stdint.h> 1109d40e0eSAntonio Nino Diaz 12b67d2029SMasahisa Kojima #include <lib/psci/psci.h> 1309d40e0eSAntonio Nino Diaz #include <lib/xlat_tables/xlat_tables_v2.h> 14007a7a33SSumit Garg 15cfe19f85SArd Biesheuvel struct draminfo { 16cfe19f85SArd Biesheuvel uint32_t num_regions; 17cfe19f85SArd Biesheuvel uint32_t reserved; 18cfe19f85SArd Biesheuvel uint64_t base1; 19cfe19f85SArd Biesheuvel uint64_t size1; 20cfe19f85SArd Biesheuvel uint64_t base2; 21cfe19f85SArd Biesheuvel uint64_t size2; 22cfe19f85SArd Biesheuvel uint64_t base3; 23cfe19f85SArd Biesheuvel uint64_t size3; 24cfe19f85SArd Biesheuvel }; 25cfe19f85SArd Biesheuvel 26b67d2029SMasahisa Kojima uint32_t sq_scp_get_draminfo(struct draminfo *info); 27cfe19f85SArd Biesheuvel 2805377100SSumit Garg void plat_sq_pwrc_setup(void); 2905377100SSumit Garg 300eb275c9SSumit Garg void plat_sq_interconnect_init(void); 310eb275c9SSumit Garg void plat_sq_interconnect_enter_coherency(void); 320eb275c9SSumit Garg void plat_sq_interconnect_exit_coherency(void); 330eb275c9SSumit Garg 34007a7a33SSumit Garg unsigned int sq_calc_core_pos(u_register_t mpidr); 35007a7a33SSumit Garg 36b529799fSSumit Garg void sq_gic_driver_init(void); 37b529799fSSumit Garg void sq_gic_init(void); 38b529799fSSumit Garg void sq_gic_cpuif_enable(void); 39b529799fSSumit Garg void sq_gic_cpuif_disable(void); 40b529799fSSumit Garg void sq_gic_pcpu_init(void); 41b529799fSSumit Garg 42*48ab3904SJassi Brar int sq_io_setup(void); 43*48ab3904SJassi Brar struct image_info *sq_get_image_info(unsigned int image_id); 448cd37d7bSSumit Garg void sq_mmap_setup(uintptr_t total_base, size_t total_size, 458cd37d7bSSumit Garg const struct mmap_region *mmap); 468cd37d7bSSumit Garg 47b67d2029SMasahisa Kojima /* SCMI API for power management by SCP */ 48b67d2029SMasahisa Kojima void sq_scmi_off(const struct psci_power_state *target_state); 49b67d2029SMasahisa Kojima void sq_scmi_on(u_register_t mpidr); 50e01acbe9SMasahisa Kojima void __dead2 sq_scmi_sys_shutdown(void); 51b67d2029SMasahisa Kojima void __dead2 sq_scmi_sys_reboot(void); 52b67d2029SMasahisa Kojima void __dead2 sq_scmi_system_off(int state); 53b67d2029SMasahisa Kojima /* SCMI API for vendor specific protocol */ 54b67d2029SMasahisa Kojima uint32_t sq_scmi_get_draminfo(struct draminfo *info); 55b67d2029SMasahisa Kojima 56c3cf06f1SAntonio Nino Diaz #endif /* SQ_COMMON_H */ 57