xref: /rk3399_ARM-atf/plat/socionext/synquacer/include/sq_common.h (revision 053771004039479d563deb24d9aa4ca0411bbef7)
1007a7a33SSumit Garg /*
2007a7a33SSumit Garg  * Copyright (c) 2018, ARM Limited and Contributors. All rights reserved.
3007a7a33SSumit Garg  *
4007a7a33SSumit Garg  * SPDX-License-Identifier: BSD-3-Clause
5007a7a33SSumit Garg  */
6007a7a33SSumit Garg 
7007a7a33SSumit Garg #ifndef __SQ_COMMON_H__
8007a7a33SSumit Garg #define __SQ_COMMON_H__
9007a7a33SSumit Garg 
10007a7a33SSumit Garg #include <sys/types.h>
118cd37d7bSSumit Garg #include <xlat_tables_v2.h>
12007a7a33SSumit Garg 
13*05377100SSumit Garg void plat_sq_pwrc_setup(void);
14*05377100SSumit Garg 
150eb275c9SSumit Garg void plat_sq_interconnect_init(void);
160eb275c9SSumit Garg void plat_sq_interconnect_enter_coherency(void);
170eb275c9SSumit Garg void plat_sq_interconnect_exit_coherency(void);
180eb275c9SSumit Garg 
19007a7a33SSumit Garg unsigned int sq_calc_core_pos(u_register_t mpidr);
20007a7a33SSumit Garg 
21b529799fSSumit Garg void sq_gic_driver_init(void);
22b529799fSSumit Garg void sq_gic_init(void);
23b529799fSSumit Garg void sq_gic_cpuif_enable(void);
24b529799fSSumit Garg void sq_gic_cpuif_disable(void);
25b529799fSSumit Garg void sq_gic_pcpu_init(void);
26b529799fSSumit Garg 
278cd37d7bSSumit Garg void sq_mmap_setup(uintptr_t total_base, size_t total_size,
288cd37d7bSSumit Garg 		   const struct mmap_region *mmap);
298cd37d7bSSumit Garg 
30007a7a33SSumit Garg #endif /* __SQ_COMMON_H__ */
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