1 /* 2 * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions are met: 6 * 7 * Redistributions of source code must retain the above copyright notice, this 8 * list of conditions and the following disclaimer. 9 * 10 * Redistributions in binary form must reproduce the above copyright notice, 11 * this list of conditions and the following disclaimer in the documentation 12 * and/or other materials provided with the distribution. 13 * 14 * Neither the name of ARM nor the names of its contributors may be used 15 * to endorse or promote products derived from this software without specific 16 * prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 21 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 #include <arm_gic.h> 32 #include <assert.h> 33 #include <bl_common.h> 34 #include <console.h> 35 #include <debug.h> 36 #include <generic_delay_timer.h> 37 #include <mmio.h> 38 #include <platform.h> 39 #include <plat_private.h> 40 #include <platform_def.h> 41 42 /******************************************************************************* 43 * Declarations of linker defined symbols which will help us find the layout 44 * of trusted SRAM 45 ******************************************************************************/ 46 unsigned long __RO_START__; 47 unsigned long __RO_END__; 48 49 /* 50 * The next 2 constants identify the extents of the code & RO data region. 51 * These addresses are used by the MMU setup code and therefore they must be 52 * page-aligned. It is the responsibility of the linker script to ensure that 53 * __RO_START__ and __RO_END__ linker symbols refer to page-aligned addresses. 54 */ 55 #define BL31_RO_BASE (unsigned long)(&__RO_START__) 56 #define BL31_RO_LIMIT (unsigned long)(&__RO_END__) 57 58 static entry_point_info_t bl32_ep_info; 59 static entry_point_info_t bl33_ep_info; 60 61 /******************************************************************************* 62 * Return a pointer to the 'entry_point_info' structure of the next image for 63 * the security state specified. BL33 corresponds to the non-secure image type 64 * while BL32 corresponds to the secure image type. A NULL pointer is returned 65 * if the image does not exist. 66 ******************************************************************************/ 67 entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 68 { 69 entry_point_info_t *next_image_info; 70 71 next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; 72 73 /* None of the images on this platform can have 0x0 as the entrypoint */ 74 if (next_image_info->pc) 75 return next_image_info; 76 else 77 return NULL; 78 } 79 80 /******************************************************************************* 81 * Perform any BL3-1 early platform setup. Here is an opportunity to copy 82 * parameters passed by the calling EL (S-EL1 in BL2 & S-EL3 in BL1) before they 83 * are lost (potentially). This needs to be done before the MMU is initialized 84 * so that the memory layout can be used while creating page tables. 85 * BL2 has flushed this information to memory, so we are guaranteed to pick up 86 * good data. 87 ******************************************************************************/ 88 void bl31_early_platform_setup(bl31_params_t *from_bl2, 89 void *plat_params_from_bl2) 90 { 91 console_init(PLAT_RK_UART_BASE, PLAT_RK_UART_CLOCK, 92 PLAT_RK_UART_BAUDRATE); 93 94 VERBOSE("bl31_setup\n"); 95 96 /* Passing a NULL context is a critical programming error */ 97 assert(from_bl2); 98 99 assert(from_bl2->h.type == PARAM_BL31); 100 assert(from_bl2->h.version >= VERSION_1); 101 102 bl32_ep_info = *from_bl2->bl32_ep_info; 103 bl33_ep_info = *from_bl2->bl33_ep_info; 104 105 plat_rockchip_pmusram_prepare(); 106 107 /* there may have some board sepcific message need to initialize */ 108 params_early_setup(plat_params_from_bl2); 109 } 110 111 /******************************************************************************* 112 * Perform any BL3-1 platform setup code 113 ******************************************************************************/ 114 void bl31_platform_setup(void) 115 { 116 generic_delay_timer_init(); 117 plat_rockchip_soc_init(); 118 119 /* Initialize the gic cpu and distributor interfaces */ 120 plat_rockchip_gic_driver_init(); 121 plat_rockchip_gic_init(); 122 plat_rockchip_pmu_init(); 123 } 124 125 /******************************************************************************* 126 * Perform the very early platform specific architectural setup here. At the 127 * moment this is only intializes the mmu in a quick and dirty way. 128 ******************************************************************************/ 129 void bl31_plat_arch_setup(void) 130 { 131 plat_cci_init(); 132 plat_cci_enable(); 133 plat_configure_mmu_el3(BL31_RO_BASE, 134 BL_COHERENT_RAM_END - BL31_RO_BASE, 135 BL31_RO_BASE, 136 BL31_RO_LIMIT, 137 BL_COHERENT_RAM_BASE, 138 BL_COHERENT_RAM_END); 139 } 140