16fba6e04STony Xie /* 2c1185ffdSJulius Werner * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. 36fba6e04STony Xie * 482cb2c1aSdp-arm * SPDX-License-Identifier: BSD-3-Clause 56fba6e04STony Xie */ 66fba6e04STony Xie 76fba6e04STony Xie #include <assert.h> 809d40e0eSAntonio Nino Diaz 96fba6e04STony Xie #include <platform_def.h> 1009d40e0eSAntonio Nino Diaz 1109d40e0eSAntonio Nino Diaz #include <common/bl_common.h> 1209d40e0eSAntonio Nino Diaz #include <common/debug.h> 13*3e02c743SJulius Werner #include <common/desc_image_load.h> 1409d40e0eSAntonio Nino Diaz #include <drivers/console.h> 1509d40e0eSAntonio Nino Diaz #include <drivers/generic_delay_timer.h> 1609d40e0eSAntonio Nino Diaz #include <drivers/ti/uart/uart_16550.h> 1709d40e0eSAntonio Nino Diaz #include <lib/coreboot.h> 1809d40e0eSAntonio Nino Diaz #include <lib/mmio.h> 1909d40e0eSAntonio Nino Diaz #include <plat_private.h> 2009d40e0eSAntonio Nino Diaz #include <plat/common/platform.h> 216fba6e04STony Xie 226fba6e04STony Xie static entry_point_info_t bl32_ep_info; 236fba6e04STony Xie static entry_point_info_t bl33_ep_info; 246fba6e04STony Xie 256fba6e04STony Xie /******************************************************************************* 266fba6e04STony Xie * Return a pointer to the 'entry_point_info' structure of the next image for 276fba6e04STony Xie * the security state specified. BL33 corresponds to the non-secure image type 286fba6e04STony Xie * while BL32 corresponds to the secure image type. A NULL pointer is returned 296fba6e04STony Xie * if the image does not exist. 306fba6e04STony Xie ******************************************************************************/ 316fba6e04STony Xie entry_point_info_t *bl31_plat_get_next_image_ep_info(uint32_t type) 326fba6e04STony Xie { 336fba6e04STony Xie entry_point_info_t *next_image_info; 346fba6e04STony Xie 356fba6e04STony Xie next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; 36*3e02c743SJulius Werner assert(next_image_info->h.type == PARAM_EP); 376fba6e04STony Xie 386fba6e04STony Xie /* None of the images on this platform can have 0x0 as the entrypoint */ 396fba6e04STony Xie if (next_image_info->pc) 406fba6e04STony Xie return next_image_info; 416fba6e04STony Xie else 426fba6e04STony Xie return NULL; 436fba6e04STony Xie } 446fba6e04STony Xie 450d5ec955Stony.xie #pragma weak params_early_setup 46c1185ffdSJulius Werner void params_early_setup(u_register_t plat_param_from_bl2) 470d5ec955Stony.xie { 480d5ec955Stony.xie } 490d5ec955Stony.xie 506fba6e04STony Xie /******************************************************************************* 516fba6e04STony Xie * Perform any BL3-1 early platform setup. Here is an opportunity to copy 52a6238326SJohn Tsichritzis * parameters passed by the calling EL (S-EL1 in BL2 & EL3 in BL1) before they 536fba6e04STony Xie * are lost (potentially). This needs to be done before the MMU is initialized 546fba6e04STony Xie * so that the memory layout can be used while creating page tables. 556fba6e04STony Xie * BL2 has flushed this information to memory, so we are guaranteed to pick up 566fba6e04STony Xie * good data. 576fba6e04STony Xie ******************************************************************************/ 582d6f1f01SAntonio Nino Diaz void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, 592d6f1f01SAntonio Nino Diaz u_register_t arg2, u_register_t arg3) 606fba6e04STony Xie { 61890abc33SJulius Werner static console_16550_t console; 62890abc33SJulius Werner 63c1185ffdSJulius Werner params_early_setup(arg1); 643c250b9aSJulius Werner 653c250b9aSJulius Werner #if COREBOOT 663c250b9aSJulius Werner if (coreboot_serial.type) 67890abc33SJulius Werner console_16550_register(coreboot_serial.baseaddr, 68890abc33SJulius Werner coreboot_serial.input_hertz, 69890abc33SJulius Werner coreboot_serial.baud, 70890abc33SJulius Werner &console); 713c250b9aSJulius Werner #else 72220c33a2SChristoph Müllner console_16550_register(rockchip_get_uart_base(), PLAT_RK_UART_CLOCK, 73890abc33SJulius Werner PLAT_RK_UART_BAUDRATE, &console); 743c250b9aSJulius Werner #endif 756fba6e04STony Xie 766fba6e04STony Xie VERBOSE("bl31_setup\n"); 776fba6e04STony Xie 78*3e02c743SJulius Werner bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); 796fba6e04STony Xie } 806fba6e04STony Xie 816fba6e04STony Xie /******************************************************************************* 826fba6e04STony Xie * Perform any BL3-1 platform setup code 836fba6e04STony Xie ******************************************************************************/ 846fba6e04STony Xie void bl31_platform_setup(void) 856fba6e04STony Xie { 866704f425SAntonio Nino Diaz generic_delay_timer_init(); 876fba6e04STony Xie plat_rockchip_soc_init(); 886fba6e04STony Xie 896fba6e04STony Xie /* Initialize the gic cpu and distributor interfaces */ 906fba6e04STony Xie plat_rockchip_gic_driver_init(); 916fba6e04STony Xie plat_rockchip_gic_init(); 926fba6e04STony Xie plat_rockchip_pmu_init(); 936fba6e04STony Xie } 946fba6e04STony Xie 956fba6e04STony Xie /******************************************************************************* 966fba6e04STony Xie * Perform the very early platform specific architectural setup here. At the 976fba6e04STony Xie * moment this is only intializes the mmu in a quick and dirty way. 986fba6e04STony Xie ******************************************************************************/ 996fba6e04STony Xie void bl31_plat_arch_setup(void) 1006fba6e04STony Xie { 1016fba6e04STony Xie plat_cci_init(); 1026fba6e04STony Xie plat_cci_enable(); 1033e6945e9SHeiko Stuebner plat_configure_mmu_el3(BL_CODE_BASE, 1043e6945e9SHeiko Stuebner BL_COHERENT_RAM_END - BL_CODE_BASE, 1053e6945e9SHeiko Stuebner BL_CODE_BASE, 1063e6945e9SHeiko Stuebner BL_CODE_END, 10747497053SMasahiro Yamada BL_COHERENT_RAM_BASE, 10847497053SMasahiro Yamada BL_COHERENT_RAM_END); 1096fba6e04STony Xie } 110