xref: /rk3399_ARM-atf/plat/rockchip/common/aarch64/platform_common.c (revision 6331a31a66cdcf53421d3dccd3067f072c6da175)
1 /*
2  * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * Redistributions of source code must retain the above copyright notice, this
8  * list of conditions and the following disclaimer.
9  *
10  * Redistributions in binary form must reproduce the above copyright notice,
11  * this list of conditions and the following disclaimer in the documentation
12  * and/or other materials provided with the distribution.
13  *
14  * Neither the name of ARM nor the names of its contributors may be used
15  * to endorse or promote products derived from this software without specific
16  * prior written permission.
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
19  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
22  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28  * POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #include <arch_helpers.h>
32 #include <arm_gic.h>
33 #include <bl_common.h>
34 #include <cci.h>
35 #include <debug.h>
36 #include <string.h>
37 #include <xlat_tables.h>
38 #include <platform_def.h>
39 #include <plat_private.h>
40 
41 #ifdef PLAT_RK_CCI_BASE
42 static const int cci_map[] = {
43 	PLAT_RK_CCI_CLUSTER0_SL_IFACE_IX,
44 	PLAT_RK_CCI_CLUSTER1_SL_IFACE_IX
45 };
46 #endif
47 
48 /******************************************************************************
49  * Macro generating the code for the function setting up the pagetables as per
50  * the platform memory map & initialize the mmu, for the given exception level
51  ******************************************************************************/
52 #define DEFINE_CONFIGURE_MMU_EL(_el)					\
53 	void plat_configure_mmu_el ## _el(unsigned long total_base,	\
54 					  unsigned long total_size,	\
55 					  unsigned long ro_start,	\
56 					  unsigned long ro_limit,	\
57 					  unsigned long coh_start,	\
58 					  unsigned long coh_limit)	\
59 	{								\
60 		mmap_add_region(total_base, total_base,			\
61 				total_size,				\
62 				MT_MEMORY | MT_RW | MT_SECURE);		\
63 		mmap_add_region(ro_start, ro_start,			\
64 				ro_limit - ro_start,			\
65 				MT_MEMORY | MT_RO | MT_SECURE);		\
66 		mmap_add_region(coh_start, coh_start,			\
67 				coh_limit - coh_start,			\
68 				MT_DEVICE | MT_RW | MT_SECURE);		\
69 		mmap_add(plat_rk_mmap);					\
70 		init_xlat_tables();					\
71 									\
72 		enable_mmu_el ## _el(0);				\
73 	}
74 
75 /* Define EL3 variants of the function initialising the MMU */
76 DEFINE_CONFIGURE_MMU_EL(3)
77 
78 unsigned int plat_get_syscnt_freq2(void)
79 {
80 	return SYS_COUNTER_FREQ_IN_TICKS;
81 }
82 
83 void plat_cci_init(void)
84 {
85 #ifdef PLAT_RK_CCI_BASE
86 	/* Initialize CCI driver */
87 	cci_init(PLAT_RK_CCI_BASE, cci_map, ARRAY_SIZE(cci_map));
88 #endif
89 }
90 
91 void plat_cci_enable(void)
92 {
93 	/*
94 	 * Enable CCI coherency for this cluster.
95 	 * No need for locks as no other cpu is active at the moment.
96 	 */
97 #ifdef PLAT_RK_CCI_BASE
98 	cci_enable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
99 #endif
100 }
101 
102 void plat_cci_disable(void)
103 {
104 #ifdef PLAT_RK_CCI_BASE
105 	cci_disable_snoop_dvm_reqs(MPIDR_AFFLVL1_VAL(read_mpidr()));
106 #endif
107 }
108